Updating prebuilts and/or headers

d15f50688485e11293e0d0bd66d73655e79f7718 - nvcommon_build.sh
600af606544528acefdcda1ac9360385c7fb445e - nvbuild.sh
b59696219da8c2717d6dbc9c849992987bca93cc - arm-trusted-firmware/.commitlintrc.js
e3ed21e226909ec6866c0b56d967c274a54d9a02 - arm-trusted-firmware/package.json
2d62a7583b85631859c4143f08e0dc332e1cb87e - arm-trusted-firmware/.gitreview
49917248e01f92d5e2004b5729b9e342a40aae80 - arm-trusted-firmware/Makefile
7f3fadaf80e3c4745d24cb1a5881c7c5f4d898ba - arm-trusted-firmware/.checkpatch.conf
55bcfa0a03639a375c3f87b1d3286f526c41b207 - arm-trusted-firmware/.versionrc.js
5f8311228df51d284e4efc6c89e9d193dde99d11 - arm-trusted-firmware/.editorconfig
827aec79d725715df06ae1ec5b5b6378a4132040 - arm-trusted-firmware/changelog.yaml
c10d9e3662b48b6da5c81ce00879a16fd8cf3d60 - arm-trusted-firmware/.cz.json
0555d5f984963f02d51ce35187ffa47d2494fa53 - arm-trusted-firmware/.nvmrc
da14c19baefee3959f7c02f68db6cbe8c25d408e - arm-trusted-firmware/readme.rst
4be1608ee9ecffe46579874302bb223b8f8d2b89 - arm-trusted-firmware/package-lock.json
d8da3627085908a5f974b45528b85dc0a41a8b75 - arm-trusted-firmware/license.rst
2d32dba27247198d6cd35d150dc8eeba3c8ed8ff - arm-trusted-firmware/bl2u/bl2u.ld.S
0cd1ab24947e0ea5ce307a171756d88683d36cde - arm-trusted-firmware/bl2u/bl2u_main.c
0227b9aa908915e602a5839d4229f7832e99c76b - arm-trusted-firmware/bl2u/aarch32/bl2u_entrypoint.S
1df1aad13ba7e2ed5cb1ae4a6200d169a1715578 - arm-trusted-firmware/bl2u/aarch64/bl2u_entrypoint.S
b3620caffa1984c87c94e9a3c1a0fd54bcbf4302 - arm-trusted-firmware/tools/encrypt_fw/Makefile
08dcc81abf0dd5a951f1d7cb36e2d05628055bec - arm-trusted-firmware/tools/encrypt_fw/include/cmd_opt.h
f37ed62897799b6165569c0842904eb6fe5d21d5 - arm-trusted-firmware/tools/encrypt_fw/include/encrypt.h
843248736f6bce43a9ac3f11f9bfa6a094face5a - arm-trusted-firmware/tools/encrypt_fw/include/debug.h
29f5f62fba8f9c0fb9e528df8a7c5f9a264d9bad - arm-trusted-firmware/tools/encrypt_fw/src/cmd_opt.c
5093ed93e150e683b735ad26979460536e2419f3 - arm-trusted-firmware/tools/encrypt_fw/src/main.c
93d36734d229d79068472d13bb173cb9b1537d9d - arm-trusted-firmware/tools/encrypt_fw/src/encrypt.c
e6383f5a328565a9ebbfef64899ed79956fb48a1 - arm-trusted-firmware/tools/conventional-changelog-tf-a/package.json
9bdff25d946a2c61d8312e1f53c49802d66d3577 - arm-trusted-firmware/tools/conventional-changelog-tf-a/index.js
5e9ebb4c1ffaf478200ddbd8bd5bbef2b0f2d2f6 - arm-trusted-firmware/tools/conventional-changelog-tf-a/templates/commit-section.hbs
da39a3ee5e6b4b0d3255bfef95601890afd80709 - arm-trusted-firmware/tools/conventional-changelog-tf-a/templates/footer.hbs
bdd671375b10dbdabd4f1f87941d3071e275ff64 - arm-trusted-firmware/tools/conventional-changelog-tf-a/templates/commit.hbs
65198bc7a494eba7c91745808f3ada1e3034659a - arm-trusted-firmware/tools/conventional-changelog-tf-a/templates/note.hbs
85453d72f48122ba14bd00512fac19ef0fc42d07 - arm-trusted-firmware/tools/conventional-changelog-tf-a/templates/template.hbs
1d1032e5160d84f70af7f7ab6dddaf003244f768 - arm-trusted-firmware/tools/conventional-changelog-tf-a/templates/note-section.hbs
99f27ae0dfb07952b2130a819e32599cfc2d78c6 - arm-trusted-firmware/tools/conventional-changelog-tf-a/templates/header.hbs
2bbefb66f05e50612c3b0d215f0bd185e076cf20 - arm-trusted-firmware/tools/marvell/doimage/Makefile
0ec11eeb14668d925e198fc42145f8b0fd3d02d8 - arm-trusted-firmware/tools/marvell/doimage/doimage.c
c8f9244b21f28bb382b1befed8dce13e4eae06f9 - arm-trusted-firmware/tools/marvell/doimage/secure/csk_priv_pem2.key
f35a6333e76f3fb2bed05bad996a131317f5ac9d - arm-trusted-firmware/tools/marvell/doimage/secure/csk_priv_pem3.key
f848ecb51058182d4c908f7c9a88561dbdce34bd - arm-trusted-firmware/tools/marvell/doimage/secure/kak_priv_pem.key
8602871bb27d59d5b5ce180448e1ceb232027bad - arm-trusted-firmware/tools/marvell/doimage/secure/csk_priv_pem1.key
954bc6cdf269e0eaa9581057657a1e2bf9621f38 - arm-trusted-firmware/tools/marvell/doimage/secure/csk_priv_pem0.key
8fc012a12a4398216ad6fd4b97199ccd159711e5 - arm-trusted-firmware/tools/marvell/doimage/secure/sec_img_7K.cfg
5b6535dd6c94832d3113588ea938b9526b06b0fc - arm-trusted-firmware/tools/marvell/doimage/secure/sec_img_8K.cfg
d11fbb00e7e7d26b6b9470205838a13be7259b0c - arm-trusted-firmware/tools/sptool/sp_mk_generator.py
aeb453284713e6bac634404236fab26ae7b17c6e - arm-trusted-firmware/tools/sptool/Makefile
94e9758f25bc25bb3cf28c26f021394ee7ab7c76 - arm-trusted-firmware/tools/sptool/sptool.py
d1d13fd8efcddd123f275316a3a9bdec7f51b1f5 - arm-trusted-firmware/tools/sptool/spactions.py
01000b7d50599a58601322b9a12174d81bd80571 - arm-trusted-firmware/tools/renesas/rzg_layout_create/sa0.ld.S
f51f929a6294d60d681b03dbf0f3f1fe0835fa3a - arm-trusted-firmware/tools/renesas/rzg_layout_create/sa0.c
4085a8d4104eac744977d5ec6feacf08b8a1283a - arm-trusted-firmware/tools/renesas/rzg_layout_create/sa6.c
8c2b63db003e2e330f2af95b94c2132bc2fc9725 - arm-trusted-firmware/tools/renesas/rzg_layout_create/sa6.ld.S
3d9335fb1238d08df68e2770f69a0e1bec960069 - arm-trusted-firmware/tools/renesas/rzg_layout_create/makefile
a728eb1898ea80778d60fcf57b727f977c29ec98 - arm-trusted-firmware/tools/renesas/rcar_layout_create/sa0.ld.S
213e1746ba029a55b6baf19ac0d8863713811b64 - arm-trusted-firmware/tools/renesas/rcar_layout_create/sa0.c
b4ecd67c81a19d47e59f9a72dd81fc392fff3aea - arm-trusted-firmware/tools/renesas/rcar_layout_create/sa6.c
c6acebe37afdaba95dbaf9f814eb4bba5dd989a9 - arm-trusted-firmware/tools/renesas/rcar_layout_create/sa6.ld.S
ba6ab775fd9474718d717b35f4220e716f7b7ae6 - arm-trusted-firmware/tools/renesas/rcar_layout_create/makefile
58ef2523c26b02365fb70cb1cebc29cba026be23 - arm-trusted-firmware/tools/amlogic/Makefile
12473d63d565d1782e4e3273a27c29c04adaf86f - arm-trusted-firmware/tools/amlogic/doimage.c
3d16696dce452bf99b18bdd1a964fe7ad191477b - arm-trusted-firmware/tools/nxp/cert_create_helper/include/pdef_tbb_ext.h
46fb0f5a24245e631af2a4690c0d7202204c0e54 - arm-trusted-firmware/tools/nxp/cert_create_helper/include/pdef_tbb_cert.h
621d8ec57a445f0149ebb8b216ef913ed05f8754 - arm-trusted-firmware/tools/nxp/cert_create_helper/include/pdef_tbb_key.h
f328e450c8ae941e8109578f1721860acbfafbbe - arm-trusted-firmware/tools/nxp/cert_create_helper/src/pdef_tbb_cert.c
506a53ab2e813a5ce578765b25e1e3fe0f1e643e - arm-trusted-firmware/tools/nxp/cert_create_helper/src/pdef_tbb_key.c
4065b3a492865b1f4525586a648df384bf7c961a - arm-trusted-firmware/tools/nxp/cert_create_helper/src/pdef_tbb_ext.c
ee87af83d314b14a8d8a41acb7fa47c97f7dda56 - arm-trusted-firmware/tools/nxp/plat_fiptool/plat_def_uuid_config.c
294a1e169dc8c2e940e56cad57a08e5d4adb3b9f - arm-trusted-firmware/tools/nxp/create_pbl/Makefile
6883483605723caec745103ffaafc790ec284c8d - arm-trusted-firmware/tools/nxp/create_pbl/create_pbl.c
2ec990b299f9fd69d0e0a85e98faba9055f56bab - arm-trusted-firmware/tools/nxp/create_pbl/README
d66ad3c8e97d38face17234980203ac71836e11f - arm-trusted-firmware/tools/nxp/create_pbl/byte_swap.c
1474476f05acda23a8bb1e859fcc314baf5a4fda - arm-trusted-firmware/tools/stm32image/Makefile
75e7e633ff5fcf6dca970eef0c2acd786d23f188 - arm-trusted-firmware/tools/stm32image/stm32image.c
96a3fe32a70fc5d7ef351718fbf944ccc04d431d - arm-trusted-firmware/tools/memory/print_memory_map.py
3e405383b6376569f5f9c3443607b970223b6cb8 - arm-trusted-firmware/tools/cert_create/Makefile
134c6c14b6a384f0e036827b128d4adf08612d9a - arm-trusted-firmware/tools/cert_create/include/cmd_opt.h
8b842068cbb1b417974e3790f0b22384fd832557 - arm-trusted-firmware/tools/cert_create/include/cert.h
0a307fbdd842fe9ae8212a2362b356addf0a38df - arm-trusted-firmware/tools/cert_create/include/sha.h
e811f0559d11bef9f60e7037563e74106ee1a4a0 - arm-trusted-firmware/tools/cert_create/include/key.h
843248736f6bce43a9ac3f11f9bfa6a094face5a - arm-trusted-firmware/tools/cert_create/include/debug.h
492b505667cc68b67b20bf6bfc9fbd84bd06e701 - arm-trusted-firmware/tools/cert_create/include/ext.h
0c696ba78f7d568469b58576262a035b3074ae67 - arm-trusted-firmware/tools/cert_create/include/tbbr/tbb_ext.h
728ba9b1bbfe33e0ca3e33eb166f04922947e3e3 - arm-trusted-firmware/tools/cert_create/include/tbbr/tbb_key.h
a015fcfd89d3e63781911e5134884343975d6284 - arm-trusted-firmware/tools/cert_create/include/tbbr/tbb_cert.h
cea4dea6df116896b98ab50dd4ffcfed6918217a - arm-trusted-firmware/tools/cert_create/include/cca/cca_cot.h
596785e69869c848d5fdb306b8084f282876abe7 - arm-trusted-firmware/tools/cert_create/include/dualroot/cot.h
be863190f00aa6265cc9d462c89dea146f1acc0c - arm-trusted-firmware/tools/cert_create/src/sha.c
ff9e1a5c3c367224d54ebf6f55bf996b0ba5f190 - arm-trusted-firmware/tools/cert_create/src/cert.c
141db0ebbb3519ad3f12eef3776040eb6d3e7995 - arm-trusted-firmware/tools/cert_create/src/ext.c
a9191ea8a1afb334786e038f658601f93beebf24 - arm-trusted-firmware/tools/cert_create/src/key.c
29f5f62fba8f9c0fb9e528df8a7c5f9a264d9bad - arm-trusted-firmware/tools/cert_create/src/cmd_opt.c
b1fc9078f968b3df8ee4a6b0f4904babccb5964f - arm-trusted-firmware/tools/cert_create/src/main.c
c5571efb1999abfd481ddccdf9cfa8db65d5e440 - arm-trusted-firmware/tools/cert_create/src/tbbr/tbb_key.c
a71f6edc951824d84282d7f0262e1ebd260a5a38 - arm-trusted-firmware/tools/cert_create/src/tbbr/tbb_cert.c
11fe1d417bcbf3a47d588f48d738d47a156b9c49 - arm-trusted-firmware/tools/cert_create/src/tbbr/tbb_ext.c
32c65756f07a7b64355c8c9c6837c2dc818201fd - arm-trusted-firmware/tools/cert_create/src/cca/cot.c
87b7868a92308d1b74bbf003f8fb00f89c405d2c - arm-trusted-firmware/tools/cert_create/src/dualroot/cot.c
3d5b607383dc4f856b78413d5717b3dd825ef661 - arm-trusted-firmware/tools/fiptool/tbbr_config.c
65980df1c7c0151645806394b329a65285fe5869 - arm-trusted-firmware/tools/fiptool/Makefile
12207fca29ab69b8fccc71ef7a95f9d551ec744f - arm-trusted-firmware/tools/fiptool/win_posix.c
ac76d7753d0fb5d60a4fcebb22f8a4a5c8f48040 - arm-trusted-firmware/tools/fiptool/fiptool.c
6dcc9e2c01e4d8e4c0b531154c0598192ba190c7 - arm-trusted-firmware/tools/fiptool/fiptool_platform.h
323e507fdf87c7d4a94d0bbbaa72bd905c2d641d - arm-trusted-firmware/tools/fiptool/win_posix.h
ff33081f63178813dd9c9235d17538954c29d7c6 - arm-trusted-firmware/tools/fiptool/fiptool.h
30931543e94deea26c28007433bf6d837f1839aa - arm-trusted-firmware/tools/fiptool/tbbr_config.h
d47913d50cdf551a4f0677629c59c1464b96f606 - arm-trusted-firmware/tools/fiptool/Makefile.msvc
c725cbfb19ba6bb974427a20390a478e1a9e45ac - arm-trusted-firmware/tools/fiptool/fiptool
bef42ef1a358ce195d045dd1ff0aab9e20bc0af0 - arm-trusted-firmware/drivers/partition/partition.c
58ee2053df744e8e7840e5687f4ecfb2cd7a572e - arm-trusted-firmware/drivers/partition/gpt.c
7ff3e84af33c3fcf6ee55936d6400a52d52203b4 - arm-trusted-firmware/drivers/mentor/i2c/mi2cv.c
c83fb1312ae05c6e624572806f085c6919f189af - arm-trusted-firmware/drivers/coreboot/cbmem_console/aarch64/cbmem_console.S
1fa3c347f937895d6e5869cff641faf35158d0e0 - arm-trusted-firmware/drivers/intel/soc/stratix10/io/s10_memmap_qspi.c
6da3edf3b8285ad337a0fca3a94279c2fc1cee92 - arm-trusted-firmware/drivers/scmi-msg/base.c
0f8a382f7d1dc362cfb9bf7d2a7189987b1bd9f4 - arm-trusted-firmware/drivers/scmi-msg/entry.c
3793e73034176c719a8160e57d2216f834867aea - arm-trusted-firmware/drivers/scmi-msg/base.h
6854b6e16a5d00e32471a842ac82a42307f4fd25 - arm-trusted-firmware/drivers/scmi-msg/reset_domain.h
d0830b0dd0dcad2627d7e25042e0b04f9172507d - arm-trusted-firmware/drivers/scmi-msg/common.h
a9219fa6261f43e472c7b1655189ae66022de0e2 - arm-trusted-firmware/drivers/scmi-msg/clock.h
9a06fcf18608dead4701ec10a63da3ace748fe3d - arm-trusted-firmware/drivers/scmi-msg/smt.c
6494de9c4e6d28e03514a090db2224f8b96327ba - arm-trusted-firmware/drivers/scmi-msg/power_domain.h
87e2ccd433b23fc20ba9c6b329c0e70654df069e - arm-trusted-firmware/drivers/scmi-msg/power_domain.c
4df3d4456a8ec6d6ea78baf7e573f0357ddc3196 - arm-trusted-firmware/drivers/scmi-msg/clock.c
51f712caca20f1532dbd7a569fab515695f574f9 - arm-trusted-firmware/drivers/scmi-msg/reset_domain.c
366c422651f720b64f0d606e537b12713c405d8e - arm-trusted-firmware/drivers/fwu/fwu.c
27de4bff9c8b262626a7c87cd68c10f73b9cd88f - arm-trusted-firmware/drivers/measured_boot/rss/rss_measured_boot.c
150bd08bfbcc1de20e05b6d07950021df0a46322 - arm-trusted-firmware/drivers/measured_boot/event_log/event_print.c
78a4b08176acfbe2acf5b4bf9ef646887f76877c - arm-trusted-firmware/drivers/measured_boot/event_log/event_log.c
8e0afaebcd5d1ed41d30457bdb8543f3617640eb - arm-trusted-firmware/drivers/synopsys/emmc/dw_mmc.c
1d5e94fb3b734e7c9eb7b1628230f3d140a8e958 - arm-trusted-firmware/drivers/synopsys/ufs/dw_ufs.c
e352b30931747ba506a85329d7c6fe69935dd5b0 - arm-trusted-firmware/drivers/marvell/ccu.c
857ba1731ec174905f4cccd68d02bdd3abf08b6e - arm-trusted-firmware/drivers/marvell/amb_adec.c
d0ef41df34b7a9ed1d587f10727ba0ee57d04c83 - arm-trusted-firmware/drivers/marvell/ddr_phy_access.h
6256615787b3a1bb1f9b4fc3d64794006722b859 - arm-trusted-firmware/drivers/marvell/ap807_clocks_init.c
a275b56587e6c0c05df6a7985ad0cf0e2216e4f8 - arm-trusted-firmware/drivers/marvell/comphy.h
c8524aa6f76d32913ffaffda10350b753e429b5b - arm-trusted-firmware/drivers/marvell/ddr_phy_access.c
e082e89bfcb90fcea87099285d6eb142fff1f589 - arm-trusted-firmware/drivers/marvell/io_win.c
77e98f136f88749eb01cf7092f9d086cae652384 - arm-trusted-firmware/drivers/marvell/thermal.c
b724830f0762dc7701cc9fd88c863c7b53f405c5 - arm-trusted-firmware/drivers/marvell/iob.c
f00e9719e8be0259cb5e171298f2ffb0d09c4fef - arm-trusted-firmware/drivers/marvell/gwin.c
6dc9f5af1b3c165888d4faae36b6da72adb6faf0 - arm-trusted-firmware/drivers/marvell/cache_llc.c
c523b2dcff8e39c5cacc416584d42aa530a93315 - arm-trusted-firmware/drivers/marvell/mci.c
10ce6fa5d5bbc4205013818f591e235cbcadccd1 - arm-trusted-firmware/drivers/marvell/mg_conf_cm3/mg_conf_cm3.h
f89de6e4fae5d6f6d1778f6c5a92d7f25ab403b9 - arm-trusted-firmware/drivers/marvell/mg_conf_cm3/mg_conf_cm3.c
9a1f55dbc2fc4e8ca97f9af3e7d435f1bddfd83c - arm-trusted-firmware/drivers/marvell/mochi/cp110_setup.c
bb5f60fb041d3fbc6812ce56b8976c686be8105a - arm-trusted-firmware/drivers/marvell/mochi/ap807_setup.c
cd9af6970ea49226ec63b2b04d0b06b86d503eae - arm-trusted-firmware/drivers/marvell/mochi/apn806_setup.c
041d0631d9cb0fe39ee3d1f8d20629d3d2225f86 - arm-trusted-firmware/drivers/marvell/comphy/phy-comphy-3700.h
dc409874b01f2f616b65f4f9e8497ba172fb2535 - arm-trusted-firmware/drivers/marvell/comphy/phy-comphy-cp110.c
52740dfd3574268d954c81e6a708c55188bca7e1 - arm-trusted-firmware/drivers/marvell/comphy/comphy-cp110.h
6b20ef2ea4fdeded083ed64a100d2e10cc8c4fdb - arm-trusted-firmware/drivers/marvell/comphy/phy-comphy-3700.c
4fc44238fa459de070b3ffae100986f736c5e3d2 - arm-trusted-firmware/drivers/marvell/comphy/phy-default-porting-layer.h
1ceb9ca7a78559ee70cb2833d391d99c2ccb3334 - arm-trusted-firmware/drivers/marvell/comphy/phy-comphy-common.h
db0bb43d5c002bc3633403571c9e8c06da7c0ead - arm-trusted-firmware/drivers/marvell/comphy/phy-comphy-cp110.h
02f2c79a0efffc643c301848b83a26b232291cec - arm-trusted-firmware/drivers/marvell/uart/a3700_console.S
282cbabd8ee584e3d6c2657cd202c11bbbf31685 - arm-trusted-firmware/drivers/marvell/mc_trustzone/mc_trustzone.c
6426cc04f9e4ae36d19a6624130d17fd035ba491 - arm-trusted-firmware/drivers/marvell/mc_trustzone/mc_trustzone.h
5a1bf4459a810008901d22e77f2e66c2af4ca7f9 - arm-trusted-firmware/drivers/marvell/secure_dfx_access/dfx.h
12a1ccf32210f9e1106d8d27942f264ab96f58fd - arm-trusted-firmware/drivers/marvell/secure_dfx_access/armada_thermal.c
e586fb95d55e301bd75a1db9d6ac7b843f45984f - arm-trusted-firmware/drivers/marvell/secure_dfx_access/misc_dfx.c
78d0bb21fe92f684f28119691c173b36006dbbb5 - arm-trusted-firmware/drivers/io/io_semihosting.c
fe0286bc53aeb4cae686fb9d63d9ffe2283cf119 - arm-trusted-firmware/drivers/io/io_dummy.c
78ab979470824d9703736ca6da3735d7c11fcba1 - arm-trusted-firmware/drivers/io/io_mtd.c
88a6a7b48a8b3da04a2a2bb9d5bcb70f03c372d3 - arm-trusted-firmware/drivers/io/io_encrypted.c
858e3130488ef425faa5341098347a0cd446a49d - arm-trusted-firmware/drivers/io/io_memmap.c
bb264060cf147f5fd4feae216d66ad8c9c66f891 - arm-trusted-firmware/drivers/io/io_fip.c
a28c85766eedc583fd38c5f1cb94aa9d5caf8935 - arm-trusted-firmware/drivers/io/io_block.c
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0ee140a73378b09ce1db70b7ccede17d5b692b29 - arm-trusted-firmware/services/std_svc/rmmd/rmmd_main.c
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51c4bc5d5a6c9b18e2f3f2c951d3f8abe0869ba2 - arm-trusted-firmware/services/std_svc/rmmd/aarch64/rmmd_helpers.S
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11f6d99892672b2a62ea499ded71fefff2d8d805 - arm-trusted-firmware/services/std_svc/drtm/drtm_remediation.c
7b11c94a3b7c10b67086dc68c9677849a8bc9f27 - arm-trusted-firmware/services/std_svc/drtm/drtm_measurements.c
3510e57e814a2ad8cc236670963d9b8179968c88 - arm-trusted-firmware/services/std_svc/drtm/drtm_dma_prot.c
ef7031b55ae8ccff8614b097dab00ba1367d15ee - arm-trusted-firmware/services/std_svc/drtm/drtm_measurements.h
f65d0ef1d69e16dbd7b0c9c18aec330d4aba748f - arm-trusted-firmware/services/std_svc/drtm/drtm_main.c
a13fa14815a742133d25519d9616e0753aed9864 - arm-trusted-firmware/services/std_svc/drtm/drtm_res_address_map.c
b8207b17922c0b2192565df4c3bc9e1e9e726afa - arm-trusted-firmware/services/std_svc/sdei/sdei_state.c
e020a86b0568edbbb8e8a93f2cee43fc4812d475 - arm-trusted-firmware/services/std_svc/sdei/sdei_intr_mgmt.c
c8a8e3febebccece37ca7976f39c7db13be5882c - arm-trusted-firmware/services/std_svc/sdei/sdei_event.c
36f054958b6c01f03eed070113b49903ce936a5d - arm-trusted-firmware/services/std_svc/sdei/sdei_private.h
1e4e0e78fee886b98de1d70b344442002fd6344a - arm-trusted-firmware/services/std_svc/sdei/sdei_main.c
ed3a4e16186524a88ed19aa95176bc233b0928fe - arm-trusted-firmware/services/std_svc/sdei/sdei_dispatch.S
37b01eb1ed4da3bb42e9ba829719b6d771d1c8b4 - arm-trusted-firmware/services/std_svc/trng/trng_main.c
c53e4b9cdb4eaee27196d9759c484c4faeaf7d06 - arm-trusted-firmware/services/std_svc/trng/trng_entropy_pool.h
6f50d5acbea1843b211e9064fb4d55a8687ba336 - arm-trusted-firmware/services/std_svc/trng/trng_entropy_pool.c
32f05b17684cd616a34fd51c98e75162d384217a - arm-trusted-firmware/services/arm_arch_svc/arm_arch_svc_setup.c
75c196ade8ef57a9775c286e3c2f88b52c492e67 - arm-trusted-firmware/bl31/bl31_context_mgmt.c
cc44e2fa243d2b48575f0896f62dafb0a8a3f893 - arm-trusted-firmware/bl31/bl31.ld.S
aff16dda38db2be9fd694ec17e83c6aeb84cf3e5 - arm-trusted-firmware/bl31/bl31_main.c
ae44163001e4ade4c2e29f6afb43316e7584ee41 - arm-trusted-firmware/bl31/interrupt_mgmt.c
1e24f28e3ea18e28d03ff1be1d17a39ed84a20ab - arm-trusted-firmware/bl31/ehf.c
77af4fd72df52040aa9b967e5a6ef1aaeacb22a2 - arm-trusted-firmware/bl31/bl31_traps.c
cd127daed96f6e9ba46db71649655534093c6ca9 - arm-trusted-firmware/bl31/aarch64/ea_delegate.S
bc19019ea8f8942a074959edd36837982d35f12b - arm-trusted-firmware/bl31/aarch64/runtime_exceptions.S
7c846b0cc5af2d57b0a9ccac7bb940b95f682bce - arm-trusted-firmware/bl31/aarch64/crash_reporting.S
ffb792493df46745086f05d8b8a44c8745cc6f0c - arm-trusted-firmware/bl31/aarch64/bl31_entrypoint.S
a4208974e4c39b113510787cccd6c941971d46ee - arm-trusted-firmware/fdts/stm32mp15xx-dhcom-pdk2.dtsi
c49dfbfab50db6d0014130e8d213b6a8113c9525 - arm-trusted-firmware/fdts/stm32mp153.dtsi
a88bff2feebe3949acee8413241a06f4643f5419 - arm-trusted-firmware/fdts/n1sdp-multi-chip.dts
8a853676b7323e4490ffcf918d0061e70b9ab0d6 - arm-trusted-firmware/fdts/fvp-base-psci-common.dtsi
79d8f41f2a5afa474094fe763ef4ee39909d283b - arm-trusted-firmware/fdts/stm32mp157c-odyssey-fw-config.dts
b6c1ef3fe03ee01cae9a90776cf4e18be5070804 - arm-trusted-firmware/fdts/rtsm_ve-motherboard.dtsi
d0ca311ee090d9d69c82273e0e6f4d65bb330554 - arm-trusted-firmware/fdts/stm32mp157d-ed1-fw-config.dts
dbed6c5c0e011af658818b570feee9c093e65a26 - arm-trusted-firmware/fdts/stm32mp135f-dk-fw-config.dts
9ba3ae553db0be8969881ea12aba908298bee353 - arm-trusted-firmware/fdts/fvp-base-gicv3-psci.dts
910ac0ace6638b52d04843f12c3f0f521eb4f4e5 - arm-trusted-firmware/fdts/corstone700_fpga.dts
10bae29f18be4785b789ca4c08398643163c76be - arm-trusted-firmware/fdts/cot_descriptors.dtsi
c8fd8ec89618a1cf2384c117aa86de6a6f748825 - arm-trusted-firmware/fdts/stm32mp13-fw-config.dtsi
8a70c913e436a192e4ec040bfdc235e56eb6bd74 - arm-trusted-firmware/fdts/stm32mp15xx-osd32.dtsi
d0ca311ee090d9d69c82273e0e6f4d65bb330554 - arm-trusted-firmware/fdts/stm32mp157a-avenger96-fw-config.dts
39ca5b339d21ea4068206120199d10ab11b3a92e - arm-trusted-firmware/fdts/stm32mp15-pinctrl.dtsi
bbe441adbb4706bbc2d792a33b888f441d489177 - arm-trusted-firmware/fdts/juno.dts
abbe0e5a7c63995c207b1995649e3a6ed6b4221a - arm-trusted-firmware/fdts/stm32mp15xc.dtsi
dc880b2cbd39cde08860e8ebf3cb4b92bbb21748 - arm-trusted-firmware/fdts/stm32mp15xxab-pinctrl.dtsi
195376b3fa6a4af6db8e90af65ae62d649d506c1 - arm-trusted-firmware/fdts/fvp-defs-dynamiq.dtsi
ee1bb06de6ee0eba0fe695f5c7f9dbc12abb6f3e - arm-trusted-firmware/fdts/fvp-base-gicv3-psci-dynamiq-common.dtsi
d0ca311ee090d9d69c82273e0e6f4d65bb330554 - arm-trusted-firmware/fdts/stm32mp157a-ed1-fw-config.dts
4fa3b6d4bddfb09bf8b8ac8f78bc5806a1063cf6 - arm-trusted-firmware/fdts/stm32mp157c-dk2.dts
775896f2dacd473d7e9aeae79154270439d15e7b - arm-trusted-firmware/fdts/fvp-ve-Cortex-A7x1.dts
4e388ba63ace4d4df9d1abc9e400e0588da4b439 - arm-trusted-firmware/fdts/stm32mp157c-ed1.dts
2f05be7afa52d4db4c62e213a91e5efc3908193a - arm-trusted-firmware/fdts/stm32mp157c-lxa-mc1.dts
9b3b205955072832ef708f17e0263101865c13c1 - arm-trusted-firmware/fdts/stm32mp15-bl32.dtsi
f7ba40a101d1f02c70445a0d783a347ed212cf03 - arm-trusted-firmware/fdts/stm32mp157d-dk1-fw-config.dts
0203c56a6aaec146dfc7e5851db0142b2d9edc04 - arm-trusted-firmware/fdts/stm32mp157c-odyssey-som.dtsi
4d121467e71a4bd15241201c1c23fbb169901959 - arm-trusted-firmware/fdts/a5ds.dts
a120c4c89b1562f49a4d3533b3f500e946f46224 - arm-trusted-firmware/fdts/tc.dts
f7ba40a101d1f02c70445a0d783a347ed212cf03 - arm-trusted-firmware/fdts/stm32mp157a-dk1-fw-config.dts
e5866956ed22d66798a7ed86b2f223ef2ed59054 - arm-trusted-firmware/fdts/stm32mp131.dtsi
9ca89fcc131c223dc7f257c86f5677ae3b6dae7d - arm-trusted-firmware/fdts/morello-soc.dts
33afbee5fd7bbf5c15449c00db2a57cd4ba0634e - arm-trusted-firmware/fdts/fvp-ve-Cortex-A5x1.dts
c028d02d6d68dfd3c16c8ea9c6e247c72a911abc - arm-trusted-firmware/fdts/fvp-foundation-motherboard.dtsi
f92cb32ea29e10232721e9d596972e82444c21d2 - arm-trusted-firmware/fdts/stm32mp15xxad-pinctrl.dtsi
d0ca311ee090d9d69c82273e0e6f4d65bb330554 - arm-trusted-firmware/fdts/stm32mp157a-ev1-fw-config.dts
5d5ddb74e5499f300b5d1800520a4651078d347b - arm-trusted-firmware/fdts/fvp-foundation-gicv3-psci.dts
79d8f41f2a5afa474094fe763ef4ee39909d283b - arm-trusted-firmware/fdts/stm32mp157c-lxa-mc1-fw-config.dts
d0ca311ee090d9d69c82273e0e6f4d65bb330554 - arm-trusted-firmware/fdts/stm32mp157f-ed1-fw-config.dts
a2179d252faf4859c7a7e68d3ba75a0955f53d37 - arm-trusted-firmware/fdts/stm32mp157c-odyssey.dts
d0ca311ee090d9d69c82273e0e6f4d65bb330554 - arm-trusted-firmware/fdts/stm32mp157c-ev1-fw-config.dts
0fec14d4dc8c75bbdea73be1457f5ed47458cb9a - arm-trusted-firmware/fdts/fvp-foundation-gicv2-psci.dts
266d21043cd7cb1e457def745a1a90b859ba0be7 - arm-trusted-firmware/fdts/fvp-defs.dtsi
84f2fbf7e3f43a269b2ec65171b627dfab1ebffe - arm-trusted-firmware/fdts/stm32mp133.dtsi
8693e118ad32484388e5072264c6544a4c7e69f3 - arm-trusted-firmware/fdts/stm32mp13-bl2.dtsi
08e1154998efab771552e2671de34b775b2ca963 - arm-trusted-firmware/fdts/stm32mp157a-avenger96.dts
5ab2cb4f026f883cf11454d7ca2822c99bcf65ce - arm-trusted-firmware/fdts/stm32mp135f-dk.dts
a6ef63af22c25465b4276c77535b30d8baaa1ea4 - arm-trusted-firmware/fdts/arm_fpga.dts
2975b8960cae049843178f072921ce9c826e8822 - arm-trusted-firmware/fdts/stm32mp135.dtsi
07dea9d014bf6f86c5ceed73c6656d32a583cd5e - arm-trusted-firmware/fdts/fvp-base-gicv2-psci.dts
561d58d7c0fe33f9ab8972df13dd6343378a5023 - arm-trusted-firmware/fdts/stm32mp13xc.dtsi
9c409a5e63830a8252f05627060449b59408b7b6 - arm-trusted-firmware/fdts/stm32mp13xf.dtsi
992348633a6518e2d0464e4afe90c22c87a617a6 - arm-trusted-firmware/fdts/stm32mp13-ddr3-1x4Gb-1066-binF.dtsi
d0ca311ee090d9d69c82273e0e6f4d65bb330554 - arm-trusted-firmware/fdts/stm32mp157f-ev1-fw-config.dts
ca1bb28fb60b80437e687827d9c6459d97e36ee7 - arm-trusted-firmware/fdts/morello.dtsi
59f777f521b3de55f482d1b9623951a1dc5c0046 - arm-trusted-firmware/fdts/stm32mp157c-ev1.dts
c078bf1220e11a54b0ae9d20bf948f1f4cb30d37 - arm-trusted-firmware/fdts/stm32mp15-ddr.dtsi
f0f10a0dcdd4cf762612a46effc427b39f801fc6 - arm-trusted-firmware/fdts/juno-ethosn.dtsi
bc6c22a9eb6a331b29f27c4c829076992d321463 - arm-trusted-firmware/fdts/fvp-base-gicv3-psci-1t.dts
d0ca311ee090d9d69c82273e0e6f4d65bb330554 - arm-trusted-firmware/fdts/stm32mp157c-ed1-fw-config.dts
6b86a9e9c6c06841937a884fcc7b91e67ce3b81c - arm-trusted-firmware/fdts/stm32mp13xd.dtsi
a035ecb2738ee727c5cce5cde80d6a9225206fdf - arm-trusted-firmware/fdts/fvp-base-gicv3-psci-dynamiq-2t.dts
180b7b537e0272e8e8ce9e631259c8bb1c9a7bb6 - arm-trusted-firmware/fdts/stm32mp15xx-dhcor-io1v8.dtsi
2d9983ae7b41417977f671f99eec7d6c8f5a99be - arm-trusted-firmware/fdts/stm32mp15xxaa-pinctrl.dtsi
d0ca311ee090d9d69c82273e0e6f4d65bb330554 - arm-trusted-firmware/fdts/stm32mp157d-ev1-fw-config.dts
a50dec7e2783a8212860dc362ed39193bd7980e6 - arm-trusted-firmware/fdts/fvp-base-gicv3-psci-dynamiq.dts
ebdd8c67e9833bb5ed3c45b38112dff58af15403 - arm-trusted-firmware/fdts/stm32mp15-fw-config.dtsi
6b86a9e9c6c06841937a884fcc7b91e67ce3b81c - arm-trusted-firmware/fdts/stm32mp13xa.dtsi
1eec69a2fb20f914f15b04407b66d3758c2b48e8 - arm-trusted-firmware/fdts/stm32mp15xx-dhcor-avenger96.dtsi
ca71563d0fa28538f143c0ae69e1f638dfb82942 - arm-trusted-firmware/fdts/stm32mp157c-dhcom-pdk2.dts
e89eb8adf0cc60e3d4860de6e443eab803fe34ec - arm-trusted-firmware/fdts/stm32mp15xx-dkx.dtsi
d0ca311ee090d9d69c82273e0e6f4d65bb330554 - arm-trusted-firmware/fdts/stm32mp157a-dhcor-avenger96-fw-config.dts
fafc1a46bd195774df21a32f1e87a087f14e2c67 - arm-trusted-firmware/fdts/stm32mp15-ddr3-2x4Gb-1066-binG.dtsi
bbadcb3a4067c694d778aa897c37cfbf52dbb796 - arm-trusted-firmware/fdts/stm32mp15xx-dhcom-som.dtsi
0406f39f568a59a508af277447007c21f12a6dd7 - arm-trusted-firmware/fdts/stm32mp151.dtsi
79f46e10c0482b6f495a6a16f4e3721ec6ad5d0f - arm-trusted-firmware/fdts/stm32mp15xx-dhcor-som.dtsi
f7ba40a101d1f02c70445a0d783a347ed212cf03 - arm-trusted-firmware/fdts/stm32mp157c-dk2-fw-config.dts
ddb3d9266ce77ac3e0746820b562a07f35eafb01 - arm-trusted-firmware/fdts/n1sdp.dtsi
7b7f266b622d5c0683632221803d79a1f5f80e32 - arm-trusted-firmware/fdts/morello-fvp.dts
122430dfffc3d549a6991bc3154850d76b80c2bb - arm-trusted-firmware/fdts/stm32mp157a-dk1.dts
390a6cef77d9095a9c98b9abe19eaaa6eedbdb73 - arm-trusted-firmware/fdts/stm32mp15-ddr3-1x4Gb-1066-binG.dtsi
f7ba40a101d1f02c70445a0d783a347ed212cf03 - arm-trusted-firmware/fdts/stm32mp157f-dk2-fw-config.dts
f99071420aca4da5f493b73afa3d3777206e23d7 - arm-trusted-firmware/fdts/n1sdp-single-chip.dts
ca0ac09e5eb628e7c9a43b6fb0e1e24ce5c836e6 - arm-trusted-firmware/fdts/stm32mp157a-dhcor-avenger96.dts
ac548bc11fadca6cc0c3eb4d0a551c4f1917fb4b - arm-trusted-firmware/fdts/fvp-base-gicv2.dtsi
b97ef7b89b0064ff2dcadf45495d02f7a2a5aa07 - arm-trusted-firmware/fdts/stm32mp157c-dhcom-pdk2-fw-config.dts
094f752c659ba4c70dae4bfdd3041ffdc45d6451 - arm-trusted-firmware/fdts/corstone700.dtsi
fdc05334cd630b63cf2fd11add62d6580489d832 - arm-trusted-firmware/fdts/stm32mp13-ddr.dtsi
4ae95220b0fb426eaa4f25852ab261389c875af5 - arm-trusted-firmware/fdts/stm32mp1-cot-descriptors.dtsi
c1d24ce6492d52d78484c4b3cf9d2466dbf9c0b0 - arm-trusted-firmware/fdts/stm32mp157.dtsi
b61926af906ac72d7ffe15c3a30ce22c0ecce8ae - arm-trusted-firmware/fdts/fvp-base-gicv3.dtsi
8a029ef453949855d4148edd185ebf88c64e67f9 - arm-trusted-firmware/fdts/stm32mp13-pinctrl.dtsi
3b21b710cc058aa0493ac54f0e9fbc7b2547734f - arm-trusted-firmware/fdts/stm32mp15-ddr3-dhsom-2x4Gb-1066-binG.dtsi
a61a77e18f14a9ba0916b5d0c1d4c7b0e07d1441 - arm-trusted-firmware/fdts/stm32mp15xxac-pinctrl.dtsi
20769b04e4fa588ef10d7460a5b4a9061c70ebfa - arm-trusted-firmware/fdts/corstone700_fvp.dts
e46dda91eeaf889c50bf363cdc9fcf0017c45fdc - arm-trusted-firmware/fdts/stm32mp15-bl2.dtsi
ce8e6c97e3af86cafccb6b9ffe857b9c1ec62598 - arm-trusted-firmware/plat/qti/sc7180/inc/qti_secure_io_cfg.h
19c93a98e1f08d21eaa65898889b3f74f7fca312 - arm-trusted-firmware/plat/qti/sc7180/inc/platform_def.h
576c57f662c322a2eac3565e848ea0179d7290a1 - arm-trusted-firmware/plat/qti/sc7180/inc/qti_rng_io.h
25ffc66bfd8596789ed4e6ec3329a46ce29927d6 - arm-trusted-firmware/plat/qti/sc7180/inc/qti_map_chipinfo.h
d99874d76998c7025371fc6e19def1521bfacc2d - arm-trusted-firmware/plat/qti/sc7280/inc/qti_secure_io_cfg.h
db1632b3d9b656b70c43049ed9e7ff1859e2ca1d - arm-trusted-firmware/plat/qti/sc7280/inc/platform_def.h
8b0399819af138f97f2f4270408c66b5d23b6052 - arm-trusted-firmware/plat/qti/sc7280/inc/qti_rng_io.h
9e0b31305ede1a8540fd77a9083d96cc98db3f47 - arm-trusted-firmware/plat/qti/sc7280/inc/qti_map_chipinfo.h
f12c8a79f6141094db1aac3d48ac6ea34800ff6d - arm-trusted-firmware/plat/qti/common/src/qti_stack_protector.c
aeecda36338ac151632b50ce13795833a9f6ce3b - arm-trusted-firmware/plat/qti/common/src/pm_ps_hold.c
f3b7fa7c62db7248cf8b50316244b8239596f267 - arm-trusted-firmware/plat/qti/common/src/qti_rng.c
825f74a7f38dc32847afc499110e74db3937935f - arm-trusted-firmware/plat/qti/common/src/qti_syscall.c
fcc252758f191a6ca9bc59db1e5ea226fa79d1ea - arm-trusted-firmware/plat/qti/common/src/qti_bl31_setup.c
3fc5e394e0d8ea8b2367dec56d27e29444d67bfb - arm-trusted-firmware/plat/qti/common/src/qti_common.c
26a9cbddd8b9a236e5d0f3550807554e23563f18 - arm-trusted-firmware/plat/qti/common/src/qti_gic_v3.c
accf2747a7781193d7806b7d3d6b6de2a7c9d5e8 - arm-trusted-firmware/plat/qti/common/src/qti_interrupt_svc.c
bea1c249fdc7e365ba7e5d773a7e312de9345fb8 - arm-trusted-firmware/plat/qti/common/src/spmi_arb.c
ac89500a8d77a91b9b24a426b3394744bf74efb5 - arm-trusted-firmware/plat/qti/common/src/qti_topology.c
7fc1d5b81ce41fbda7e5fda0ba2e22acdf4d5934 - arm-trusted-firmware/plat/qti/common/src/qti_pm.c
e1c323c2517fcdcdc4c19a1be62b15dcf31174ae - arm-trusted-firmware/plat/qti/common/src/aarch64/qti_helpers.S
7547a5ef92ec4ac40eed5a73041ef25902042bf2 - arm-trusted-firmware/plat/qti/common/src/aarch64/qti_uart_console.S
a015f785f3a8598abf893b7534677029f8d88010 - arm-trusted-firmware/plat/qti/common/src/aarch64/qti_kryo4_gold.S
0a334ecdfcaa10aaf8316d9a9824e5b72a5a2beb - arm-trusted-firmware/plat/qti/common/src/aarch64/qti_kryo6_gold.S
e613029e9a1503a47ce38fb17df6f5002f8f1919 - arm-trusted-firmware/plat/qti/common/src/aarch64/qti_kryo4_silver.S
54e64bbb0d58ddc5eb65cf980f9355513e861265 - arm-trusted-firmware/plat/qti/common/src/aarch64/qti_kryo6_silver.S
a492ca7a1a6a0dc9b988c09a6838be72f3a00cc3 - arm-trusted-firmware/plat/qti/common/inc/qti_board_def.h
7bc95caff2b0700d04cc28cec44bcae1965e8b73 - arm-trusted-firmware/plat/qti/common/inc/qti_plat.h
0b01452153b97f032c89b81698730bd0211ee4cf - arm-trusted-firmware/plat/qti/common/inc/qti_rng.h
af87d6c46e8e3304b92c90ed0111bb3066bac8e1 - arm-trusted-firmware/plat/qti/common/inc/qti_interrupt_svc.h
f00660ee7d40d5826515fe5266e50d2172c12bc1 - arm-trusted-firmware/plat/qti/common/inc/spmi_arb.h
1d172cb4df58b173035b99b5855545b25fd764be - arm-trusted-firmware/plat/qti/common/inc/qti_uart_console.h
2c7d5721030a2353cd649ad2cf4da49242ed3195 - arm-trusted-firmware/plat/qti/common/inc/qti_cpu.h
5901fe33e7d63a4a03e1b95469b48c8299d178f6 - arm-trusted-firmware/plat/qti/common/inc/aarch64/plat_macros.S
1a6c92af22149cf7ac8cccac367bfc9610d45ab3 - arm-trusted-firmware/plat/qti/qtiseclib/src/qtiseclib_interface_stub.c
4e66aa575523181fefb5720d798a257e98a26003 - arm-trusted-firmware/plat/qti/qtiseclib/src/qtiseclib_cb_interface.c
5db76531814dda261416dc016b511d807c3a4ba5 - arm-trusted-firmware/plat/qti/qtiseclib/inc/qtiseclib_defs.h
a28527a439c34c2ff37a3bd1ace46fb9ddb4f357 - arm-trusted-firmware/plat/qti/qtiseclib/inc/qtiseclib_cb_interface.h
186065ea9c6a4a2d16c200d4d07466514f5a1c29 - arm-trusted-firmware/plat/qti/qtiseclib/inc/qtiseclib_interface.h
885aa0bbda57cb30366ac8f9ea09f3f8e7ad31da - arm-trusted-firmware/plat/qti/qtiseclib/inc/sc7180/qtiseclib_defs_plat.h
3e4d34962a59227a5d8d494f35e80b77fdf8d61e - arm-trusted-firmware/plat/qti/qtiseclib/inc/sc7280/qtiseclib_defs_plat.h
6e7e984a8e5dfab7008759c759d8244470f3dae2 - arm-trusted-firmware/plat/qti/msm8916/msm8916_cpu_boot.c
2cfbd336aca6ffd917aac7811b326bc53c734d1c - arm-trusted-firmware/plat/qti/msm8916/msm8916_bl31_setup.c
e08f230adb59004c64e07444599554c275f1643a - arm-trusted-firmware/plat/qti/msm8916/msm8916_pm.h
3b21be43300990b373aae5fc9fe86650293e6465 - arm-trusted-firmware/plat/qti/msm8916/msm8916_gicv2.h
455f78881f3e452bc906dd8e2dd74d7e668f33dd - arm-trusted-firmware/plat/qti/msm8916/msm8916_gicv2.c
ec2741df6c60880f2d8d7c157dcda59d0c50eacd - arm-trusted-firmware/plat/qti/msm8916/msm8916_pm.c
180bf4b2deb975b6753f7b845e0055ea91a2aa13 - arm-trusted-firmware/plat/qti/msm8916/msm8916_topology.c
07c3221b9d62d08349ed7bc9f4f1e779f524ec32 - arm-trusted-firmware/plat/qti/msm8916/include/msm8916_mmap.h
8150ca146a9314d5192e1e394975bb932029bd0b - arm-trusted-firmware/plat/qti/msm8916/include/uartdm_console.h
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91be000247752e30dfd222eef60029b13936f320 - arm-trusted-firmware/plat/qti/msm8916/aarch64/msm8916_helpers.S
fd14d1c817b69bd4a42046e3a208b999bffc7e36 - arm-trusted-firmware/plat/qti/msm8916/aarch64/uartdm_console.S
1ea7a5c813a861814cb6a9635ab2899599b1f14e - arm-trusted-firmware/plat/intel/soc/stratix10/bl31_plat_setup.c
8598eec66d15027434f5e31ce76936d555fb60f0 - arm-trusted-firmware/plat/intel/soc/stratix10/bl2_plat_setup.c
db28b2738f48c2d2751af6dee5456298ec578706 - arm-trusted-firmware/plat/intel/soc/stratix10/include/s10_memory_controller.h
0ecc6c7913824d78deaeaa2c01ec8b40e2bacbc6 - arm-trusted-firmware/plat/intel/soc/stratix10/include/socfpga_plat_def.h
fbf4ab727479f904a0ae30ca600e339277fc9c11 - arm-trusted-firmware/plat/intel/soc/stratix10/include/s10_pinmux.h
6569c6244a923e1aa7f5ce62d1edef532b9c61e2 - arm-trusted-firmware/plat/intel/soc/stratix10/include/s10_mmc.h
78da5bc74c17e2a2fc3eeb3eec9ac39a6b54684c - arm-trusted-firmware/plat/intel/soc/stratix10/include/s10_clock_manager.h
70667783807950b851233233349f9cadef62b70d - arm-trusted-firmware/plat/intel/soc/stratix10/soc/s10_memory_controller.c
87dc55fea317913960f41df594ea406bd410da89 - arm-trusted-firmware/plat/intel/soc/stratix10/soc/s10_mmc.c
165df3d4e79eedab33c9012f09d6e960f68d4ce3 - arm-trusted-firmware/plat/intel/soc/stratix10/soc/s10_clock_manager.c
5a527e1803e29b659091fe8cf586adaf527a55dd - arm-trusted-firmware/plat/intel/soc/stratix10/soc/s10_pinmux.c
744622161f66d8947e1701aedf45d2e4c911d98f - arm-trusted-firmware/plat/intel/soc/common/socfpga_sip_svc.c
0c8169624b733658b1eee7afa553ac38e2f2660d - arm-trusted-firmware/plat/intel/soc/common/socfpga_storage.c
3e96caf672e37f83d553d90424f092bd1e55c0e8 - arm-trusted-firmware/plat/intel/soc/common/socfpga_sip_svc_v2.c
98e7e0c1e8b661cfd05aacfbfc969aea710cf145 - arm-trusted-firmware/plat/intel/soc/common/socfpga_psci.c
659bce34ee85d1001adb313d9a639d66d3a89deb - arm-trusted-firmware/plat/intel/soc/common/socfpga_image_load.c
ecfa5e68e1c5043d25b54cab656ce201d1bab865 - arm-trusted-firmware/plat/intel/soc/common/socfpga_delay_timer.c
cc4b0a911ae0f00cfc94310c6a9d60716e9a1064 - arm-trusted-firmware/plat/intel/soc/common/socfpga_topology.c
9c1ab97bc7e1b8a4c4fdbdc721a1ad1605842cd3 - arm-trusted-firmware/plat/intel/soc/common/bl2_plat_mem_params_desc.c
c9354b6d74c4a24fae2207b5b999882056d88e91 - arm-trusted-firmware/plat/intel/soc/common/drivers/qspi/cadence_qspi.h
41479908d06f853d367898b86dda07763652f4c7 - arm-trusted-firmware/plat/intel/soc/common/drivers/qspi/cadence_qspi.c
c72a5bba918c6067f6a77a639c42bc477c71de2c - arm-trusted-firmware/plat/intel/soc/common/drivers/wdt/watchdog.c
5c64677609f95ebafb78a49847ca9c07c1a3aa87 - arm-trusted-firmware/plat/intel/soc/common/drivers/wdt/watchdog.h
40a8cdcc9de34b1816ae44611e3eb25846bdce83 - arm-trusted-firmware/plat/intel/soc/common/drivers/ccu/ncore_ccu.c
5e8868245cddc9cd3bff4ded0c90d2f8b356920d - arm-trusted-firmware/plat/intel/soc/common/drivers/ccu/ncore_ccu.h
152aac97afc14f46701c2c6191022a02a8bf6c8b - arm-trusted-firmware/plat/intel/soc/common/include/socfpga_reset_manager.h
41d7e3ea3d55787ad71372ec8b0bf6ba1b7f7eef - arm-trusted-firmware/plat/intel/soc/common/include/socfpga_system_manager.h
970f387d2b06ae8e286bce0ae31cce567cfbc9f4 - arm-trusted-firmware/plat/intel/soc/common/include/platform_def.h
ffac73fe826ff46223b2ddaebd9e7206528dfe33 - arm-trusted-firmware/plat/intel/soc/common/include/socfpga_emac.h
b1757fca7c0b4611f05ff58ccf57fd05a1cdce19 - arm-trusted-firmware/plat/intel/soc/common/include/socfpga_fcs.h
4dd7031ad5db9e76642ee94035b1dc3209a508bb - arm-trusted-firmware/plat/intel/soc/common/include/socfpga_private.h
3eb20b0d72778ce95cdd02e0732ff2485fdcbe49 - arm-trusted-firmware/plat/intel/soc/common/include/plat_macros.S
00f501d1e338fcfdee5a84ea4618b4800bb66b13 - arm-trusted-firmware/plat/intel/soc/common/include/socfpga_noc.h
c23a6bade313d779668249feebdf126a3bebf3e0 - arm-trusted-firmware/plat/intel/soc/common/include/socfpga_mailbox.h
386b0fdaa7ee713193bb54beb3607996260be346 - arm-trusted-firmware/plat/intel/soc/common/include/socfpga_sip_svc.h
0e535605a23a91a4da7cb7a80263fb88f42d5b03 - arm-trusted-firmware/plat/intel/soc/common/include/socfpga_f2sdram_manager.h
3886a4a113d64631d91373640cc1e9d6ad0f9de5 - arm-trusted-firmware/plat/intel/soc/common/include/socfpga_handoff.h
23d9dff6e9c23385b4ccea7791e18d709f29f6d0 - arm-trusted-firmware/plat/intel/soc/common/soc/socfpga_handoff.c
e574f0019a7633a4bdd77aca757ca8eb9578b909 - arm-trusted-firmware/plat/intel/soc/common/soc/socfpga_reset_manager.c
05cf124f63ca2ad812cdaf29b4c53a36bd5772c0 - arm-trusted-firmware/plat/intel/soc/common/soc/socfpga_mailbox.c
ab30d05818b8bad26af22d404704a8359dc1b6aa - arm-trusted-firmware/plat/intel/soc/common/soc/socfpga_firewall.c
dbb5c27c52afd2347aa5d78b423a051d694a5c1e - arm-trusted-firmware/plat/intel/soc/common/soc/socfpga_emac.c
35147be6f6f43142d92f8f49026c79d220570691 - arm-trusted-firmware/plat/intel/soc/common/sip/socfpga_sip_fcs.c
8b1c7bd1975b587b7b972a8471ba45698080074c - arm-trusted-firmware/plat/intel/soc/common/sip/socfpga_sip_ecc.c
c93b1e05180647b1752b51838d7b935bf554e073 - arm-trusted-firmware/plat/intel/soc/common/aarch64/platform_common.c
d7e8f58ba8eb1fbdee758371be39f1e404609ad4 - arm-trusted-firmware/plat/intel/soc/common/aarch64/plat_helpers.S
0b122983293e62477b54bc9dc2db6ae570a37866 - arm-trusted-firmware/plat/intel/soc/agilex/bl31_plat_setup.c
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2cbef8a830bfec6a533910d7a00ca01de32629c3 - arm-trusted-firmware/plat/intel/soc/agilex/include/agilex_mmc.h
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83dddfbc36bd0b0d2132cb5fdce3a0c4e4a546e0 - arm-trusted-firmware/plat/intel/soc/agilex/include/agilex_clock_manager.h
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0701baf6d3a2c6d67485a189fa41e9c33fd20ca4 - arm-trusted-firmware/plat/intel/soc/agilex/soc/agilex_memory_controller.c
3c317104013baa1af66596ba8f1eef175f48843d - arm-trusted-firmware/plat/intel/soc/agilex/soc/agilex_mmc.c
92d9e49e6c214fc90bb4c35e673bc023e1c15880 - arm-trusted-firmware/plat/intel/soc/agilex/soc/agilex_clock_manager.c
16fa99d266e68db425dc073b83184b96d58bd140 - arm-trusted-firmware/plat/intel/soc/n5x/bl31_plat_setup.c
886bf1383cdc15c386329821d32302b814036a6c - arm-trusted-firmware/plat/intel/soc/n5x/include/socfpga_plat_def.h
40c2d9f804ed183a8befa38d61bdd2164d711b34 - arm-trusted-firmware/plat/marvell/armada/a3k/common/plat_pm.c
5ce8b4638274f9c66287b2f3662bb0bfcfc00074 - arm-trusted-firmware/plat/marvell/armada/a3k/common/a3700_ea.c
d00c0cf869839d6cd370b5b6c58e8d066705e2e1 - arm-trusted-firmware/plat/marvell/armada/a3k/common/marvell_plat_config.c
344f94187e37e08b2f532eb66281e7e28e7702c5 - arm-trusted-firmware/plat/marvell/armada/a3k/common/io_addr_dec.c
1b64a7198143a5ec5cbe075762bfc0f47e7eded0 - arm-trusted-firmware/plat/marvell/armada/a3k/common/cm3_system_reset.c
a8ca841fb42e9bb5a9c071732f25138003b82d96 - arm-trusted-firmware/plat/marvell/armada/a3k/common/plat_cci.c
4e66aa51fabafab21b8e01fa4f3d49fc8fe6a97e - arm-trusted-firmware/plat/marvell/armada/a3k/common/a3700_sip_svc.c
f0aaac82be8c1b465622b1b82d8514de62c2e937 - arm-trusted-firmware/plat/marvell/armada/a3k/common/dram_win.c
6a269296c2d98fb8f6f4c1736696c4e6081cbc88 - arm-trusted-firmware/plat/marvell/armada/a3k/common/include/a3700_pm.h
6c89be0e3e7e102687ce8d216227785edce4db33 - arm-trusted-firmware/plat/marvell/armada/a3k/common/include/ddr_info.h
61ab3a7cf4de99459f74b40ee4aa7c4c063f92ab - arm-trusted-firmware/plat/marvell/armada/a3k/common/include/platform_def.h
71cc1316bcad08255d76ad0ad858f47d681be60d - arm-trusted-firmware/plat/marvell/armada/a3k/common/include/a3700_plat_def.h
0e8b8f431e24f28a92fcd4fb9d46eb87a1113db4 - arm-trusted-firmware/plat/marvell/armada/a3k/common/include/io_addr_dec.h
12bd9050e1d74b888a3866cf8ff79d17103fd0f2 - arm-trusted-firmware/plat/marvell/armada/a3k/common/include/plat_macros.S
58c7ff47a2230af870313a655dcab4f22dd64957 - arm-trusted-firmware/plat/marvell/armada/a3k/common/include/dram_win.h
6a97369a4a693cf002e5f5f6ece32516e5978068 - arm-trusted-firmware/plat/marvell/armada/a3k/common/aarch64/a3700_common.c
80f0ae31f4c2b57b330b01be44b293f6aa2cef72 - arm-trusted-firmware/plat/marvell/armada/a3k/common/aarch64/a3700_clock.S
965bc32da1f0ff9aa830bcede48eaca19cbe3b29 - arm-trusted-firmware/plat/marvell/armada/a3k/common/aarch64/plat_helpers.S
716620282caf3210c15f6795e996035311a8ddd8 - arm-trusted-firmware/plat/marvell/armada/a3k/a3700/plat_bl31_setup.c
2cecd73b6df5a49196420939a6810672640ce165 - arm-trusted-firmware/plat/marvell/armada/a3k/a3700/mvebu_def.h
8f4af50a0df849dd31970be55e943ee4302b0472 - arm-trusted-firmware/plat/marvell/armada/a3k/a3700/board/pm_src.c
9a52294343831155772b4411f11af6c989dbd182 - arm-trusted-firmware/plat/marvell/armada/a8k/a80x0/mvebu_def.h
c0c43ed673f4f38bd78a3d145c4ff0f553bf3032 - arm-trusted-firmware/plat/marvell/armada/a8k/a80x0/board/dram_port.c
027eab15e763f75779fca4721b6612e1cef0f74a - arm-trusted-firmware/plat/marvell/armada/a8k/a80x0/board/marvell_plat_config.c
80de920eee6f0214b1cfb2cf104cd6d295bb478b - arm-trusted-firmware/plat/marvell/armada/a8k/a80x0/board/phy-porting-layer.h
c7d9738b5d030b72c12bb9649d2dfb58e180b5b8 - arm-trusted-firmware/plat/marvell/armada/a8k/a70x0_amc/mvebu_def.h
eecb4e28621a6ea2bbe58371406ef5f58590424c - arm-trusted-firmware/plat/marvell/armada/a8k/a70x0_amc/board/dram_port.c
8eca9aa01df9af91fe07386e941d7557eae7d0ce - arm-trusted-firmware/plat/marvell/armada/a8k/a70x0_amc/board/marvell_plat_config.c
b79710e67347483f51ba3aa8fcb25a7f7dbb5083 - arm-trusted-firmware/plat/marvell/armada/a8k/a70x0/mvebu_def.h
e0382b98cbf2ae3613453ec924646d5af8b1f11e - arm-trusted-firmware/plat/marvell/armada/a8k/a70x0/board/dram_port.c
a3184b54f314a3880b11bd80e9ace2a825e4e251 - arm-trusted-firmware/plat/marvell/armada/a8k/a70x0/board/marvell_plat_config.c
9a52294343831155772b4411f11af6c989dbd182 - arm-trusted-firmware/plat/marvell/armada/a8k/a80x0_puzzle/mvebu_def.h
4d33d263a3f05c3d8f3400a45afc2dd7f1792669 - arm-trusted-firmware/plat/marvell/armada/a8k/a80x0_puzzle/board/dram_port.c
f1c6500edd19c1540f562c4ea2dba8443a7cd419 - arm-trusted-firmware/plat/marvell/armada/a8k/a80x0_puzzle/board/marvell_plat_config.c
7bdf0ea1da45eaab8f21dca700b29582ccc57d0a - arm-trusted-firmware/plat/marvell/armada/a8k/a80x0_puzzle/board/system_power.c
266ed9c2a714504a190f6bdd10db0d40815a428a - arm-trusted-firmware/plat/marvell/armada/a8k/common/plat_pm.c
f1e7a83b618d37eb2df8dcc4cff814b934a4ab74 - arm-trusted-firmware/plat/marvell/armada/a8k/common/plat_thermal.c
c96d4c2fac061ca1e3be3600ee8748de11d20ed0 - arm-trusted-firmware/plat/marvell/armada/a8k/common/plat_pm_trace.c
bc3edb20ef2a7baebacce2c631f800cb6d206bbc - arm-trusted-firmware/plat/marvell/armada/a8k/common/plat_bl1_setup.c
3f6403fd39850e34f4c3bd674ccf8170f74af43d - arm-trusted-firmware/plat/marvell/armada/a8k/common/plat_bl31_setup.c
4f7afd096359c9aad1f7852029a643db033fe7c7 - arm-trusted-firmware/plat/marvell/armada/a8k/common/plat_ble_setup.c
8d8ccf9d72fb421744052b95f2dc698844542a67 - arm-trusted-firmware/plat/marvell/armada/a8k/common/ble/ble_mem.S
29b7013d6e080d93a60b3780f10310e29aaa6bbb - arm-trusted-firmware/plat/marvell/armada/a8k/common/ble/ble_main.c
04e2455b39d088cb56ccb73dac9c842fb6f6b7eb - arm-trusted-firmware/plat/marvell/armada/a8k/common/ble/ble.ld.S
9fe71c8db281a9fc253c959e2bf8d7ed5b59f658 - arm-trusted-firmware/plat/marvell/armada/a8k/common/include/ddr_info.h
0f1625972d53fdedca61514318bdfd1ca806ac51 - arm-trusted-firmware/plat/marvell/armada/a8k/common/include/a8k_plat_def.h
eb840b0d5bb6e8cbd42b1ab32b72baec165926e7 - arm-trusted-firmware/plat/marvell/armada/a8k/common/include/platform_def.h
86c5d3b710ba9b63aaf82c0f9dc1606c22176f45 - arm-trusted-firmware/plat/marvell/armada/a8k/common/include/plat_macros.S
3145664e80460f27bc2fd8cda127e916e518678f - arm-trusted-firmware/plat/marvell/armada/a8k/common/include/mentor_i2c_plat.h
97ae958df0c9d8f54ff36a7803fe0ba27434e45c - arm-trusted-firmware/plat/marvell/armada/a8k/common/mss/mss_pm_ipc.h
9acdf9fa5a506b13c376584f49b42a4f437af6c5 - arm-trusted-firmware/plat/marvell/armada/a8k/common/mss/mss_bl2_setup.c
cc11d9f29f29d9c9366f3e6c66183d38e3031ab7 - arm-trusted-firmware/plat/marvell/armada/a8k/common/mss/mss_pm_ipc.c
392f1834ac5b4679e9ae724c7cf1f3a20c0e566a - arm-trusted-firmware/plat/marvell/armada/a8k/common/mss/mss_bl31_setup.c
f83bec0cc962f915447a4582455414387713f7ac - arm-trusted-firmware/plat/marvell/armada/a8k/common/mss/mss_defs.h
4b2131b48e6b858b49e7e4d819172c5bc729f213 - arm-trusted-firmware/plat/marvell/armada/a8k/common/aarch64/plat_arch_config.c
01f390bd22a88039e1fc5f2d062ca126dae34478 - arm-trusted-firmware/plat/marvell/armada/a8k/common/aarch64/a8k_common.c
919f5232edc5f6c3ec1670dedf5bf25fbb59356f - arm-trusted-firmware/plat/marvell/armada/a8k/common/aarch64/plat_helpers.S
29e2e91f84a20d0c2f220e0eba6c447909e5aab4 - arm-trusted-firmware/plat/marvell/armada/a8k/a70x0_mochabin/mvebu_def.h
8211399dfbf7994faafa28d85d5d232265c000fe - arm-trusted-firmware/plat/marvell/armada/a8k/a70x0_mochabin/board/dram_port.c
e26cc9cf2cffd853101d24b0e6cade82ff5f5cbe - arm-trusted-firmware/plat/marvell/armada/a8k/a70x0_mochabin/board/marvell_plat_config.c
99aea1bcabb4f6d0d7452ad42116629d21bb2b61 - arm-trusted-firmware/plat/marvell/armada/a8k/a70x0_mochabin/board/phy-porting-layer.h
9a52294343831155772b4411f11af6c989dbd182 - arm-trusted-firmware/plat/marvell/armada/a8k/a80x0_mcbin/mvebu_def.h
25524fffee705cfc27dd670e05523c5de9ef0ed6 - arm-trusted-firmware/plat/marvell/armada/a8k/a80x0_mcbin/board/dram_port.c
586996360a2bcce38bf90fa0b1b7a20a45c6e26b - arm-trusted-firmware/plat/marvell/armada/a8k/a80x0_mcbin/board/marvell_plat_config.c
1a879218f61e83b5068e40a2b093fdb4ab851a4d - arm-trusted-firmware/plat/marvell/armada/common/marvell_ddr_info.c
db23baf6374a79472a4b930f1fd68144d4f314a1 - arm-trusted-firmware/plat/marvell/armada/common/marvell_bl2_setup.c
c6e2fab47d050265fe94d5ce57fd1a3a684da2c9 - arm-trusted-firmware/plat/marvell/armada/common/marvell_topology.c
2c689ed8bfb3abf1dc9ea37ffaa8aa9479649eac - arm-trusted-firmware/plat/marvell/armada/common/marvell_bl31_setup.c
5f97ccaef3ab26b2710ad26fb0fdbd9facfd0b7d - arm-trusted-firmware/plat/marvell/armada/common/marvell_gicv3.c
e8797c2639ec349e76fc1946c984275c010e4cc0 - arm-trusted-firmware/plat/marvell/armada/common/marvell_console.c
6ea11f2ef3d7978e714cdf621aeb7c8719c7edf3 - arm-trusted-firmware/plat/marvell/armada/common/marvell_bl1_setup.c
59510c739cc2d9619a9a5c21e1cbf1bb05094867 - arm-trusted-firmware/plat/marvell/armada/common/marvell_pm.c
c785e8c07a0fa5d01b9ecf8eee873f7a18697e3a - arm-trusted-firmware/plat/marvell/armada/common/mrvl_sip_svc.c
79f7407103c1059afb212382689fff9c6a4f4350 - arm-trusted-firmware/plat/marvell/armada/common/marvell_io_storage.c
0ff28a152c1c0997120e1e3a5fe654f1ae19ac60 - arm-trusted-firmware/plat/marvell/armada/common/marvell_cci.c
69ee13cde36accbde0f355f89f9cc2b5d1aa2cb9 - arm-trusted-firmware/plat/marvell/armada/common/marvell_image_load.c
9fa0f4b8209945eb39ccee90bcc305efbe10f211 - arm-trusted-firmware/plat/marvell/armada/common/marvell_gicv2.c
ea896d0f1d011e14c4411020d73d083c22eac783 - arm-trusted-firmware/plat/marvell/armada/common/plat_delay_timer.c
42d2fb2461687118d1f9e79ed2ae2a274cc91c45 - arm-trusted-firmware/plat/marvell/armada/common/mss/mss_ipc_drv.h
44573513efade3da9aa2ca94c3d4069a8af646fd - arm-trusted-firmware/plat/marvell/armada/common/mss/mss_mem.h
56e5fda520a793a37c7e8daa1ecfe2354b26e99e - arm-trusted-firmware/plat/marvell/armada/common/mss/mss_ipc_drv.c
872e517062b5b548f6de42424dfb8290309f6773 - arm-trusted-firmware/plat/marvell/armada/common/mss/mss_scp_bootloader.h
5cecfb1042c66b79c4c4c9bc5961fd91b34c880f - arm-trusted-firmware/plat/marvell/armada/common/mss/mss_scp_bl2_format.h
0bb02e303d4c696fe34379bc2d5dd9f2fe16229d - arm-trusted-firmware/plat/marvell/armada/common/mss/mss_scp_bootloader.c
a71cc21b90eb5b1d29b125e9c98c3e50f9a145bc - arm-trusted-firmware/plat/marvell/armada/common/aarch64/marvell_helpers.S
0842c4cae12a7c22367b83357a2c824d060dee67 - arm-trusted-firmware/plat/marvell/armada/common/aarch64/marvell_common.c
c990f5d612bc8d238855b21005f4771531af3124 - arm-trusted-firmware/plat/marvell/armada/common/aarch64/marvell_bl2_mem_params_desc.c
65b77a7dbb8e28f892af2bf3b76eff17c87a9cbd - arm-trusted-firmware/plat/marvell/octeontx/otx2/t91/t9130/mvebu_def.h
a1f884a99e9e14ac83551e73429b0cf7a2c5aa0d - arm-trusted-firmware/plat/marvell/octeontx/otx2/t91/t9130/board/dram_port.c
147f2e7e737cb6a5eb1dd98a0deed8c0462d2041 - arm-trusted-firmware/plat/marvell/octeontx/otx2/t91/t9130/board/marvell_plat_config.c
2311f962795291fdd649a3acb3d3fcee85e19d11 - arm-trusted-firmware/plat/marvell/octeontx/otx2/t91/t9130/board/phy-porting-layer.h
60baba93a9e38f989d8f3fdfb045849d1edc2d69 - arm-trusted-firmware/plat/marvell/octeontx/otx2/t91/t9130_cex7_eval/board/marvell_plat_config.c
d25ef41e434700921c3427ff0dac7aba4b81e1ba - arm-trusted-firmware/plat/xilinx/versal/versal_ipi.c
7a7cc273f02a2bb687d9cbdb064ea628cf8ae499 - arm-trusted-firmware/plat/xilinx/versal/plat_topology.c
a72274d6a08a1768eebe97dcee5b711d1d1ea691 - arm-trusted-firmware/plat/xilinx/versal/bl31_versal_setup.c
359fecdbc2aea1f92150901c3b69081173688574 - arm-trusted-firmware/plat/xilinx/versal/plat_versal.c
ae93ab3d9073a13aaab98c76cbff9539cb6b8402 - arm-trusted-firmware/plat/xilinx/versal/plat_psci.c
f241ecfc0ce4c6677cbaca2991578232a4c20ad7 - arm-trusted-firmware/plat/xilinx/versal/sip_svc_setup.c
b32dca9e82fc194265815e96dc44c232f292898f - arm-trusted-firmware/plat/xilinx/versal/versal_gicv3.c
3ee0b3ebf248c8195e9dea15b7601482c3fb9c9d - arm-trusted-firmware/plat/xilinx/versal/include/versal_def.h
5126174019498cc7fe5c93b70f586b64eb2f6761 - arm-trusted-firmware/plat/xilinx/versal/include/plat_private.h
1a5dc34056175e8444f3545c0f174dff3dcb536b - arm-trusted-firmware/plat/xilinx/versal/include/plat_pm_common.h
734b58fe20a10f52da076fc2667f0bf5bd8c8d39 - arm-trusted-firmware/plat/xilinx/versal/include/platform_def.h
50268618a09434af24c4a339c20a1b7b4a2e4901 - arm-trusted-firmware/plat/xilinx/versal/include/plat_ipi.h
d43cd481e9d0acc960fc0f51fbeb274b0ec28712 - arm-trusted-firmware/plat/xilinx/versal/include/plat_macros.S
9dbd3610b2589c93fc91024ed8d39f4e5725d8ec - arm-trusted-firmware/plat/xilinx/versal/pm_service/pm_defs.h
67797b5d7b79d4fe75c894faa289f6d4deac5929 - arm-trusted-firmware/plat/xilinx/versal/pm_service/pm_node.h
7725db323b24ae5a9fadf6a242bc50d82835b86b - arm-trusted-firmware/plat/xilinx/versal/pm_service/pm_api_sys.h
95df6ca84bc196e5f5b6e22cce245ae78217a107 - arm-trusted-firmware/plat/xilinx/versal/pm_service/pm_api_sys.c
4248e970a1ba169aa4892274e272df8e52df5e00 - arm-trusted-firmware/plat/xilinx/versal/pm_service/pm_client.c
a3cd953fef7447b80fc303931cdb6e6e0a9cb0da - arm-trusted-firmware/plat/xilinx/versal/pm_service/pm_svc_main.h
984dedbce16b4eb8de9a934f61b48768753b7d7a - arm-trusted-firmware/plat/xilinx/versal/pm_service/pm_svc_main.c
6b87bc415258116316a3b89d124ff4be9d5fd944 - arm-trusted-firmware/plat/xilinx/versal/aarch64/versal_helpers.S
17c00132a2d1c14af4ec8aac0677c8cec6838112 - arm-trusted-firmware/plat/xilinx/versal/aarch64/versal_common.c
4cc25fc42bd45d2db2be80b630d57a12fc244ab4 - arm-trusted-firmware/plat/xilinx/zynqmp/bl31_zynqmp_setup.c
9eafad8129f35d9d02d9cc93d60e653c41e3b321 - arm-trusted-firmware/plat/xilinx/zynqmp/zynqmp_ehf.c
e3f68c1d366163959ee86ecdeed4a1400a451117 - arm-trusted-firmware/plat/xilinx/zynqmp/plat_topology.c
4018dd905c37ab4e205c88450ef0d6b0a1d45041 - arm-trusted-firmware/plat/xilinx/zynqmp/zynqmp_sdei.c
ea6d37faa54c270b3c68586b921a880ead5d06fd - arm-trusted-firmware/plat/xilinx/zynqmp/plat_psci.c
06c4f927cc1972bc5c9da0d5a445bd2e617e9e23 - arm-trusted-firmware/plat/xilinx/zynqmp/plat_zynqmp.c
a56515dee5e536d653d6f81080b25c90afbcd220 - arm-trusted-firmware/plat/xilinx/zynqmp/sip_svc_setup.c
3c9875ea4481fc73b7478362a4d3fb716a56ce1c - arm-trusted-firmware/plat/xilinx/zynqmp/zynqmp_ipi.c
51f1c62f9ff5f61f509efbd45107c18e9d199569 - arm-trusted-firmware/plat/xilinx/zynqmp/include/plat_private.h
fcc8c8052c715326e932fd7e210fe0beefa2d175 - arm-trusted-firmware/plat/xilinx/zynqmp/include/plat_pm_common.h
804ff5cf868ee33695565baa638b234a4fb88f0d - arm-trusted-firmware/plat/xilinx/zynqmp/include/platform_def.h
ece26f9de6cb348c48126562b55e4a6b7e3275ed - arm-trusted-firmware/plat/xilinx/zynqmp/include/plat_ipi.h
8ede155c56692751835019579474fd5fbda5ba26 - arm-trusted-firmware/plat/xilinx/zynqmp/include/plat_macros.S
3126b7881aa02ce6b3375b4c5fc63b612a49d311 - arm-trusted-firmware/plat/xilinx/zynqmp/include/zynqmp_def.h
19fc437eb2fad50da7e96ada0f240279ec999548 - arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_defs.h
15cd9e7e290094d6002d1934f0e3c8c9fc024fa8 - arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_api_clock.h
0f260822c28ad7d167b9e6518455595189f44d56 - arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_api_ioctl.c
53dfba6afcea5d904e8bc0154b54bb40dc2e373d - arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_api_sys.h
6595a97b0d15954b0fdf5ce2a0dab9eee0f95cf6 - arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_api_pinctrl.c
1f232985388dd1bc7f786370a7d5262c0022ed0a - arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_api_pinctrl.h
a2440b2db19c0d9b8afd5de045b6af7197f9d1c9 - arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_api_sys.c
17c2b51fe84ffb00f831d2dc387700fd9ec3df71 - arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_client.c
86a5a63e53f6e9e9369f277e88db5ddf8947f749 - arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_svc_main.h
b6ef82c65316f3bfd6fa3fbd79088a652c04c455 - arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_api_ioctl.h
493682fea368bdb72b7efa045ae43eaead367f65 - arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_svc_main.c
5cc1b6fa9d7c8c883304ec32fd2fb3268abce7d9 - arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/pm_api_clock.c
f82a0ba91d921f8782dbacd326cf93f93d406ff3 - arm-trusted-firmware/plat/xilinx/zynqmp/tsp/tsp_plat_setup.c
625ae1615d3ffcf7e9729014864cef8550139b20 - arm-trusted-firmware/plat/xilinx/zynqmp/aarch64/zynqmp_common.c
bca57ae928a46e00c62d44205c7238c103d89723 - arm-trusted-firmware/plat/xilinx/zynqmp/aarch64/zynqmp_helpers.S
052bcf3e3faadeecd571f842f4acddd8e5ebc9c9 - arm-trusted-firmware/plat/xilinx/versal_net/bl31_versal_net_setup.c
bd2f98d5580345c25ebef9aa23a21577aad582a7 - arm-trusted-firmware/plat/xilinx/versal_net/versal_net_ipi.c
0bd5915515d8c23e7e331b6086287b2219e72329 - arm-trusted-firmware/plat/xilinx/versal_net/plat_psci_pm.c
5027c913c3c05768e6940b33572c26060600dda8 - arm-trusted-firmware/plat/xilinx/versal_net/plat_topology.c
041003fe9f65969fe198a0fa296c5f55d19e467d - arm-trusted-firmware/plat/xilinx/versal_net/plat_psci.c
7d4dffbd821b16f6280da0d85589e54112af561b - arm-trusted-firmware/plat/xilinx/versal_net/sip_svc_setup.c
5a179f8f1e79815b3b2ff741d750d8e30edf887c - arm-trusted-firmware/plat/xilinx/versal_net/versal_net_gicv3.c
1a77c8bcca937be5c1bd35a38bb5b7ccea0086a1 - arm-trusted-firmware/plat/xilinx/versal_net/include/plat_private.h
263a46ff8b559789752c4a6407d8baea90978bd2 - arm-trusted-firmware/plat/xilinx/versal_net/include/plat_pm_common.h
b983f677eb7e6502b569fda58d4bc74f2c278106 - arm-trusted-firmware/plat/xilinx/versal_net/include/platform_def.h
7c7e0815080db04ce31603877d4a391ffbe8c937 - arm-trusted-firmware/plat/xilinx/versal_net/include/plat_ipi.h
843bf8581070f83c6ed1cecc93eb4358f0a18877 - arm-trusted-firmware/plat/xilinx/versal_net/include/versal_net_def.h
75b5f8d16b2af5b0f7bda432ba1d2dec2cfd56ff - arm-trusted-firmware/plat/xilinx/versal_net/include/plat_macros.S
02b48cd3c217599176d86b00b98acf959a42b990 - arm-trusted-firmware/plat/xilinx/versal_net/pm_service/pm_client.c
f8acccd8f94d785953e24d764a4a12a6cd86393f - arm-trusted-firmware/plat/xilinx/versal_net/aarch64/versal_net_common.c
9f621e3103cc6252e44148714e3a20d4d3f79781 - arm-trusted-firmware/plat/xilinx/versal_net/aarch64/versal_net_helpers.S
70a3081ce068629c8ad7e61e96d23da774a4dac5 - arm-trusted-firmware/plat/xilinx/common/ipi.c
76d25750fdd11451198c4f9e0850aa537a773df6 - arm-trusted-firmware/plat/xilinx/common/plat_startup.c
127d5b6672e9e114dfed723d5cd61b804def4b5f - arm-trusted-firmware/plat/xilinx/common/include/ipi.h
60cc821ff7abe1f421c5e66630717c6e30154c10 - arm-trusted-firmware/plat/xilinx/common/include/plat_startup.h
ab5c0545a54fbd173cbecbb576dddfc7238419af - arm-trusted-firmware/plat/xilinx/common/include/pm_common.h
d9b73bfa7792124a294a3c3f64980e36dd06c458 - arm-trusted-firmware/plat/xilinx/common/include/pm_ipi.h
88bc86a89827430321362f9dcaa7bc3d8e023059 - arm-trusted-firmware/plat/xilinx/common/include/pm_client.h
6e4f82021a75a4172004be07c575351283307cea - arm-trusted-firmware/plat/xilinx/common/ipi_mailbox_service/ipi_mailbox_svc.c
4862191b3291da0974839d79ccc335c03151a333 - arm-trusted-firmware/plat/xilinx/common/ipi_mailbox_service/ipi_mailbox_svc.h
010c7e9ea00c3336aa39f3a0ec508f771614e097 - arm-trusted-firmware/plat/xilinx/common/pm_service/pm_ipi.c
33ec06e0674715932071745b37498c738414ee8f - arm-trusted-firmware/plat/ti/k3/include/platform_def.h
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734674f35450e45ca0c58c9036e71a978ef8407d - arm-trusted-firmware/plat/ti/k3/include/k3_gicv3.h
da89ff4506058f3e90a127f4e7d79a7d86057bfd - arm-trusted-firmware/plat/ti/k3/include/plat_macros.S
96d874b239805cfedc0fadfd9f07eed0e423a919 - arm-trusted-firmware/plat/ti/k3/common/k3_helpers.S
170634ac25c995303394743ee26ab4f2265800ca - arm-trusted-firmware/plat/ti/k3/common/k3_topology.c
4677f1e48833ef10dc9d9ed492dfe849c8466b05 - arm-trusted-firmware/plat/ti/k3/common/k3_console.c
17f32476111c7a6c8fbb1903c6f09ddcd7a2188a - arm-trusted-firmware/plat/ti/k3/common/k3_psci.c
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27b2ba24623a62aa30daea138411571e17aeb579 - arm-trusted-firmware/plat/ti/k3/common/drivers/sec_proxy/sec_proxy.h
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2318551075aa817413a9db54c0d7e55dbfbf6e86 - arm-trusted-firmware/plat/ti/k3/common/drivers/ti_sci/ti_sci.c
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571ddc2a22b19054342209337c7bbaa4bca47f54 - arm-trusted-firmware/plat/ti/k3/board/j784s4/include/board_def.h
85bfc710f2f6c79b7c0e025f6f6e653d16f39bb7 - arm-trusted-firmware/plat/ti/k3/board/generic/include/board_def.h
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3fa3a563994fcf2710324634950265fc8f9d7850 - arm-trusted-firmware/plat/allwinner/sun50i_r329/sunxi_power.c
2870bd5728ae0e5857fadde22b048a6fcf6ee2d3 - arm-trusted-firmware/plat/allwinner/sun50i_r329/include/sunxi_ccu.h
d430caf710295e9e77a240b785740fdde6705e26 - arm-trusted-firmware/plat/allwinner/sun50i_r329/include/sunxi_mmap.h
1acbdb220cff8edffa7cc7fd4808f71574b90966 - arm-trusted-firmware/plat/allwinner/sun50i_r329/include/sunxi_spc.h
f8fae43c9902bbf818480c6633e05fc6b751aabd - arm-trusted-firmware/plat/allwinner/sun50i_r329/include/sunxi_cpucfg.h
f5a23e3802d2c1d7b94a9fb3c62e5b43cf3283ac - arm-trusted-firmware/plat/allwinner/sun50i_h616/sunxi_idle_states.c
786942614a650ccd6930f2bd19bb42b2b539e1f9 - arm-trusted-firmware/plat/allwinner/sun50i_h616/sunxi_power.c
1590f260f1febbedf931a1596cea2d2e437ea92b - arm-trusted-firmware/plat/allwinner/sun50i_h616/include/sunxi_ccu.h
2b80f35aa1746d608c2eac4eec351c292e0298f0 - arm-trusted-firmware/plat/allwinner/sun50i_h616/include/sunxi_mmap.h
3dde76eb498c889851714b3d8e6749211c62bbec - arm-trusted-firmware/plat/allwinner/sun50i_h616/include/sunxi_spc.h
0ba24eb82465b3d3ad4e293692984b972663d57c - arm-trusted-firmware/plat/allwinner/sun50i_h616/include/sunxi_cpucfg.h
7c04eab85ab52983fe11df7e0b2bd05d9500729d - arm-trusted-firmware/plat/allwinner/common/sunxi_common.c
704da3ea1b61d5106a6172712ecf6a80b1528bf0 - arm-trusted-firmware/plat/allwinner/common/arisc_off.S
a35cee830ec32f0b3aadec9d5859cc0edde18ca0 - arm-trusted-firmware/plat/allwinner/common/sunxi_pm.c
f2bc1957fa87b9880744d070c964b7803c7bf295 - arm-trusted-firmware/plat/allwinner/common/sunxi_topology.c
1475b73e29f2726ff49707c2527361e6a4b1e9d2 - arm-trusted-firmware/plat/allwinner/common/sunxi_scpi_pm.c
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522a372bd9aee035e1cde2200f2e599f19d6a040 - arm-trusted-firmware/plat/allwinner/common/sunxi_bl31_setup.c
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2514153e63bbcc5513712db8766fd278fa3b0d44 - arm-trusted-firmware/plat/allwinner/sun50i_h6/include/sunxi_mmap.h
3dde76eb498c889851714b3d8e6749211c62bbec - arm-trusted-firmware/plat/allwinner/sun50i_h6/include/sunxi_spc.h
0b8b7ce5f06e24ad7b853125e17507934dfc45e5 - arm-trusted-firmware/plat/allwinner/sun50i_h6/include/sunxi_cpucfg.h
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3f4f908a2f0a6a7660d40d79215077ee248f740e - arm-trusted-firmware/plat/allwinner/sun50i_a64/include/sunxi_mmap.h
2c5ad97e48086e62d1d58d1d8289ac4ab3153179 - arm-trusted-firmware/plat/allwinner/sun50i_a64/include/sunxi_spc.h
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c7afb73f40f0759cd775aec59723f92f7dd54435 - arm-trusted-firmware/plat/common/plat_bl1_common.c
9a2a266c43747a7efa24c0b5dcc1f8cd7affd77d - arm-trusted-firmware/plat/common/plat_gicv3.c
8020a28923a271101b29516f4997bb7a1b8a6708 - arm-trusted-firmware/plat/common/plat_spmd_manifest.c
dd38f3a1079a17328d48c8cb719713d4de7361a6 - arm-trusted-firmware/plat/common/ubsan.c
195d9f6a57eaa5525666a31bad43c24c5b6f8cc7 - arm-trusted-firmware/plat/common/plat_gicv2.c
ca3750949173b2315d20907e7c6da4a66f32a5cf - arm-trusted-firmware/plat/common/plat_bl_common.c
ec9195d2ba3b66b6f4258c18a36b14a5cf41ac55 - arm-trusted-firmware/plat/common/plat_psci_common.c
5e22516412e81af7bbc52e0e460447cf2d1d63f3 - arm-trusted-firmware/plat/common/plat_log_common.c
36144ebe1637da9185e2256593f8aa7307d0cccb - arm-trusted-firmware/plat/common/tbbr/plat_tbbr.c
f742befce701fed79ec16b324c92409b36838226 - arm-trusted-firmware/plat/common/aarch32/plat_sp_min_common.c
2f11ce1b9cf6e69ec84aaca831735fcb77ab9bc8 - arm-trusted-firmware/plat/common/aarch32/platform_helpers.S
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578b46ce0ccf74ba18ce1747df871537294d4ddf - arm-trusted-firmware/plat/common/aarch32/platform_mp_stack.S
05ebeff6ee2416ab2697799fb338367a03b0ba75 - arm-trusted-firmware/plat/common/aarch32/plat_common.c
c8eab49f9d5326ffc974d2ba7c05bd411df90eb1 - arm-trusted-firmware/plat/common/aarch32/crash_console_helpers.S
53568d8d4a43005d8a1be8a379cf0f4b7ddc5637 - arm-trusted-firmware/plat/common/aarch64/platform_helpers.S
1fe60996e262523b671b678aa41a510a2cfa2ce9 - arm-trusted-firmware/plat/common/aarch64/platform_up_stack.S
785a7be686f124f8b30c5f96bbdc9670988f49c2 - arm-trusted-firmware/plat/common/aarch64/platform_mp_stack.S
ebd158bd333d7179cda2ea7ec89f06269458ddd6 - arm-trusted-firmware/plat/common/aarch64/plat_common.c
8bf3a22931bb5a18034f1275429068834943cb9e - arm-trusted-firmware/plat/common/aarch64/plat_ehf.c
8be9392135f6389b22910a9e22011c2e5abc6708 - arm-trusted-firmware/plat/common/aarch64/crash_console_helpers.S
da446db6b40b974a31d66ba55f23047f28d3f748 - arm-trusted-firmware/plat/arm/css/sgi/sgi_interconnect.c
c6341f0f666b8a901520e32310b18a323af9f925 - arm-trusted-firmware/plat/arm/css/sgi/sgi_topology.c
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a12ad9fe2e578f1c9186976a41033a398307aba6 - arm-trusted-firmware/plat/arm/css/sgi/sgi_ras.c
a0d413ba6f916898703d3e92672a47e884f0a460 - arm-trusted-firmware/plat/arm/css/sgi/sgi_plat.c
11d8cfb6e0edafbb6ddbc2ea973d521e8a6cbeb6 - arm-trusted-firmware/plat/arm/css/sgi/sgi_image_load.c
76bbec9213c7d768e35fc8eb3833867643da0627 - arm-trusted-firmware/plat/arm/css/sgi/sgi_bl31_setup.c
138c1bc36bb3c91d2b2d9f5ac1702aa0975c850c - arm-trusted-firmware/plat/arm/css/sgi/include/sgi_soc_platform_def_v2.h
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39df7df7edfc75c87a8874267d8a593a05b50fd6 - arm-trusted-firmware/plat/arm/css/sgi/include/sgi_variant.h
81b2886ee53d898274e18c14f6f466511d2c6dda - arm-trusted-firmware/plat/arm/css/sgi/include/sgi_base_platform_def.h
5972e7acb9e93b201406ff9cf0cbab522f942eb3 - arm-trusted-firmware/plat/arm/css/sgi/include/sgi_ras.h
27f76e3e4eb310e1d6262b27f27f55010b9ffda0 - arm-trusted-firmware/plat/arm/css/sgi/include/sgi_soc_css_def_v2.h
b45c063aa1fdf9280c52020500ae6e83d71244c5 - arm-trusted-firmware/plat/arm/css/sgi/include/plat_macros.S
42a0e02948578c19827684fd1870be1821b76c66 - arm-trusted-firmware/plat/arm/css/sgi/include/sgi_soc_platform_def.h
c388d0822e5ef0bf97db4c66ab46d4088421f0e6 - arm-trusted-firmware/plat/arm/css/sgi/include/sgi_dmc620_tzc_regions.h
b30c67527c7802085733426c8c113a7ab2492ce8 - arm-trusted-firmware/plat/arm/css/sgi/include/sgi_plat.h
aeb8a1b51452a7c1b9088cd2cc5f0c6ab2590b45 - arm-trusted-firmware/plat/arm/css/sgi/aarch64/sgi_helper.S
f00b456e46701cc6a1e2b31fdd93091805ab0809 - arm-trusted-firmware/plat/arm/css/common/css_bl1_setup.c
75cc05419580aa9e613157ed0cacf5e0447c7d7b - arm-trusted-firmware/plat/arm/css/common/css_bl2u_setup.c
3bc7caa521ce87bd672c20940f330d81613afdc1 - arm-trusted-firmware/plat/arm/css/common/css_topology.c
e35946648a3f4e38af67096b19e7cbe49324a3e2 - arm-trusted-firmware/plat/arm/css/common/css_bl2_setup.c
24eb9c67fbb392767ee5be52c7e73641f4c74abd - arm-trusted-firmware/plat/arm/css/common/css_pm.c
29476751ce928c5170b93c840f4fd925619fb9f9 - arm-trusted-firmware/plat/arm/css/common/aarch32/css_helpers.S
3ddcf64aa2f7a53edf4016ea4d4c636a371f4516 - arm-trusted-firmware/plat/arm/css/common/aarch64/css_helpers.S
bb20b499eb4fed681f076d21eeabaaf686b1c7fe - arm-trusted-firmware/plat/arm/common/arm_bl2_setup.c
60e57974dbb765f8039eca7d2d1eb2d1c984b6f1 - arm-trusted-firmware/plat/arm/common/arm_bl1_setup.c
c3c969f538ef3f3853d867a2c9c020723e5adc66 - arm-trusted-firmware/plat/arm/common/arm_tzc_dmc500.c
9ac215f26148ab94b630463319c086d3e8b88c31 - arm-trusted-firmware/plat/arm/common/arm_bl2_el3_setup.c
5f8fb896e304dbb204531641566de21b2e53a426 - arm-trusted-firmware/plat/arm/common/arm_tzc400.c
dd2c481628c54d07d905a85f08e527943473d31b - arm-trusted-firmware/plat/arm/common/arm_nor_psci_mem_protect.c
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53d385569ada7ff06030853184930078d8a2e4d8 - arm-trusted-firmware/plat/arm/common/arm_cci.c
000e2caa19a9821e0bb2e5c0a9ee102f7e0d8d99 - arm-trusted-firmware/plat/arm/common/arm_dyn_cfg_helpers.c
f156559b1bbad3210329982534bb9f8f47d3bd0a - arm-trusted-firmware/plat/arm/common/arm_bl31_setup.c
8d5a41b0cad025e83538d4508b8de54c96dd6be8 - arm-trusted-firmware/plat/arm/common/arm_pm.c
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c568af7da3024b7d6747f5fb2b560fea22018e31 - arm-trusted-firmware/plat/arm/common/arm_dyn_cfg.c
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758c96ae68613d1d656825a271d08c5c7f4ee780 - arm-trusted-firmware/plat/arm/common/arm_gicv3.c
3b628c17fd98697338a0997a380df8a81c7d2e66 - arm-trusted-firmware/plat/arm/common/arm_bl2u_setup.c
9b812991736d46b06d462799a31eb49ffae96260 - arm-trusted-firmware/plat/arm/common/arm_gicv2.c
667de698f76e8d0b6d6f1b85f8012f3bed27e925 - arm-trusted-firmware/plat/arm/common/arm_ccn.c
9e473b6458e0a41a90cfd20021aa925abeeb0a49 - arm-trusted-firmware/plat/arm/common/trp/arm_trp_setup.c
361186531a919bdc7825945fec639bf0db44800f - arm-trusted-firmware/plat/arm/common/fconf/fconf_nv_cntr_getter.c
c67f1c965e03e1e11a2032a79f3592845f4eb1d8 - arm-trusted-firmware/plat/arm/common/fconf/arm_fconf_io.c
dce55e77a6a4b9da7a42be37f5bba717d0c353e0 - arm-trusted-firmware/plat/arm/common/fconf/fconf_sdei_getter.c
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3ddfbb8ae3448f315371d7a3a814bea1d055cd3a - arm-trusted-firmware/plat/arm/common/fconf/arm_fconf_sp.c
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8c6171b381cfc6eca906ce2f7e2e6658895380ca - arm-trusted-firmware/plat/arm/common/aarch32/arm_helpers.S
2147b3c541e549d0bc01f00aed57c924d90d6003 - arm-trusted-firmware/plat/arm/common/aarch32/arm_bl2_mem_params_desc.c
3237cf84bb44f0cc5b45b74d69d2934525543135 - arm-trusted-firmware/plat/arm/common/sp_min/arm_sp_min_setup.c
cacda44b3716b65a5c30eedd17ed5a1335b8597b - arm-trusted-firmware/plat/arm/common/tsp/arm_tsp_setup.c
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cc6a2551546758984d250e491c5c077149044f98 - arm-trusted-firmware/plat/arm/common/aarch64/arm_helpers.S
3fc67b6c1c162e05c28e1ac8a50d8a35ec97eb2c - arm-trusted-firmware/plat/arm/common/aarch64/arm_bl2_mem_params_desc.c
1177013eddcf476b6a6d1f3367ae319363663450 - arm-trusted-firmware/plat/arm/common/aarch64/arm_pauth.c
8543903cea745c6c6709fd524622d3d5d3fd8df2 - arm-trusted-firmware/plat/arm/common/aarch64/arm_sdei.c
08fffa1ca580eaca04a26cfc974edd901c2997b1 - arm-trusted-firmware/plat/arm/soc/common/soc_css_security.c
87d9fc22d1228a7faf0c17443f9d5afd194e4334 - arm-trusted-firmware/plat/arm/board/fvp_ve/fvp_ve_err.c
103c2c1d17da9dfaab63bca2f61e6bd21aa82c19 - arm-trusted-firmware/plat/arm/board/fvp_ve/fvp_ve_bl2_setup.c
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6733f3383940d86208b8239c1d08d9221c2c2929 - arm-trusted-firmware/plat/arm/board/fvp_ve/fvp_ve_common.c
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300e69aa5df2f362bc3ddf1c430fe3fab03f11da - arm-trusted-firmware/plat/arm/board/fvp_ve/fvp_ve_def.h
2ff5ebca71b32318bae21e3dbb7699236b9cbe61 - arm-trusted-firmware/plat/arm/board/fvp_ve/aarch32/fvp_ve_helpers.S
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19f1b6fffc9b7e4d8a55730d5dc6740b06415c71 - arm-trusted-firmware/plat/arm/board/fvp_ve/include/platform_def.h
996afef966d673534a7502180616ba362cdb0d9c - arm-trusted-firmware/plat/arm/board/fvp_ve/fdts/fvp_ve_tb_fw_config.dts
a857b4f74c6a05502271795dcd7a71f24a024b41 - arm-trusted-firmware/plat/arm/board/fvp_ve/fdts/fvp_ve_fw_config.dts
0b886935846ab1d278829932851b6cc492f106cc - arm-trusted-firmware/plat/arm/board/juno/juno_bl31_setup.c
50963e02933b9165b4b2c2a4b8ce7f8cc758df7d - arm-trusted-firmware/plat/arm/board/juno/juno_trusted_boot.c
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8a5716ff7852804effaf5810a335e69d3a788a50 - arm-trusted-firmware/plat/arm/board/juno/juno_trng.c
b9b538be910b8f73b7432358e0f07f30e602b2cb - arm-trusted-firmware/plat/arm/board/juno/jmptbl.i
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07f098d234d16533d40b505e91dbb1aae1712650 - arm-trusted-firmware/plat/arm/board/juno/juno_security.c
905aac590f6fdf10096fd3e0f4bb661a2953acfb - arm-trusted-firmware/plat/arm/board/juno/juno_bl1_setup.c
0ff3d7a6c51d9752cc2a86bb19e800a94245eea2 - arm-trusted-firmware/plat/arm/board/juno/juno_stack_protector.c
419b6382a2607911be10024a6287e69289234326 - arm-trusted-firmware/plat/arm/board/juno/juno_topology.c
17d854b860806d6ad8af6ee63952524a3bcbd9e9 - arm-trusted-firmware/plat/arm/board/juno/juno_pm.c
53c5a79a63bf1f5551016da97e29bf8702e32ad3 - arm-trusted-firmware/plat/arm/board/juno/juno_def.h
6cea3743018f1d02cac51c8d78a92561ea46ce14 - arm-trusted-firmware/plat/arm/board/juno/juno_bl2_setup.c
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319dfb0515299119770970eb5953825ab7abd95c - arm-trusted-firmware/plat/arm/board/juno/aarch32/juno_helpers.S
9bc7c91b290d19799c80d9254b6d86d7dcbf3e94 - arm-trusted-firmware/plat/arm/board/juno/include/platform_def.h
53f8c45c8436fb9bb4378cd8782a0b7d8037e5d2 - arm-trusted-firmware/plat/arm/board/juno/include/plat_macros.S
805360ecd38e071b1f2e9b60704130be813557e2 - arm-trusted-firmware/plat/arm/board/juno/fdts/juno_tb_fw_config.dts
dfc9edcda0daf49b40451e94c30405aa901ef204 - arm-trusted-firmware/plat/arm/board/juno/fdts/juno_fw_config.dts
4780ddabb988fa673f07503011a00242d2ea9faa - arm-trusted-firmware/plat/arm/board/juno/aarch64/juno_helpers.S
d2cf1d7868d3a048734caa91b018fb43f56c36dd - arm-trusted-firmware/plat/arm/board/corstone700/sp_min/corstone700_sp_min_setup.c
8908fa02b1140f0d45e9bdcc3d5552190eb3af41 - arm-trusted-firmware/plat/arm/board/corstone700/common/corstone700_security.c
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df9742f665da99900fe4a3fdc0b6fbcc02209a0f - arm-trusted-firmware/plat/arm/board/corstone700/common/corstone700_pm.c
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3d1a55d785180dd11beb8473207268d04543695a - arm-trusted-firmware/plat/arm/board/corstone700/common/corstone700_helpers.S
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c7a771e05849f4d7b946b8b3c32ba774fbff39dd - arm-trusted-firmware/plat/arm/board/corstone700/common/drivers/mhu/corstone700_mhu.c
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3c1fd619c9a1da90f7af84b9c6e1b8eceb5e7a20 - arm-trusted-firmware/plat/arm/board/corstone700/common/include/platform_def.h
cdf2af8fe7e5ba8b9ff36e04a33ebff2cf20f79b - arm-trusted-firmware/plat/arm/board/a5ds/a5ds_bl2_setup.c
7d714f8f2b3f7274c9d2e73eaa5d46215c7d3911 - arm-trusted-firmware/plat/arm/board/a5ds/a5ds_err.c
be0cd4f5f48b5eb3a64885536643645036173809 - arm-trusted-firmware/plat/arm/board/a5ds/a5ds_common.c
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c6fdde231ff1fe0ddb8f585bd3fead2a7f2f0f46 - arm-trusted-firmware/plat/arm/board/a5ds/a5ds_security.c
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142d4bce7860550461e2498ba8c9f4ebb17d902d - arm-trusted-firmware/plat/arm/board/a5ds/aarch32/a5ds_helpers.S
a8eb0724c2056ed80453ea31aa3ebc822e93ffa2 - arm-trusted-firmware/plat/arm/board/a5ds/sp_min/a5ds_sp_min_setup.c
189ef1e9d436f631711b2a4bd2e75efb635a322a - arm-trusted-firmware/plat/arm/board/a5ds/include/platform_def.h
996afef966d673534a7502180616ba362cdb0d9c - arm-trusted-firmware/plat/arm/board/a5ds/fdts/a5ds_tb_fw_config.dts
adc821bdac8aebcefb26e3f8cd54497b3b8dfab4 - arm-trusted-firmware/plat/arm/board/a5ds/fdts/a5ds_fw_config.dts
866a21334d0661b2dde96c9ea5c2e2c99e649ab3 - arm-trusted-firmware/plat/arm/board/rdn1edge/rdn1edge_trusted_boot.c
851570d1add4283d5a01ff4893f1558decb2d6e9 - arm-trusted-firmware/plat/arm/board/rdn1edge/rdn1edge_topology.c
1d0b4260fe8a6c2a5d54c62bf8f386935c28968b - arm-trusted-firmware/plat/arm/board/rdn1edge/rdn1edge_plat.c
561594e99d3e16d7826006d518e141e9a58eadec - arm-trusted-firmware/plat/arm/board/rdn1edge/rdn1edge_security.c
7d37a6f29bbe666c9db7538d4d7a123d1ab40b17 - arm-trusted-firmware/plat/arm/board/rdn1edge/rdn1edge_err.c
432792585d2507e4ec5aa343420eb1a274a819c2 - arm-trusted-firmware/plat/arm/board/rdn1edge/include/platform_def.h
5d0744ed59fc75ba7204d9d0083fbc0cd64e74d6 - arm-trusted-firmware/plat/arm/board/rdn1edge/fdts/rdn1edge_fw_config.dts
869fa43b401d5d394651f9d1bd9eb784b7ebb14d - arm-trusted-firmware/plat/arm/board/rdn1edge/fdts/rdn1edge_tb_fw_config.dts
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f06e3bb0c501f8c6d86fc8db78e724dcf47cb291 - arm-trusted-firmware/plat/arm/board/common/swd_rotpk/arm_swd_rotpk_rsa_sha256.bin
80a8b20bcc3bcbf794bc78499c52841c807ec68e - arm-trusted-firmware/plat/arm/board/common/swd_rotpk/arm_dev_swd_rotpk.S
4907b4eaa1230000b1db585d555d4fd41be655b8 - arm-trusted-firmware/plat/arm/board/common/swd_rotpk/README
ee231e4311e32bd023dc5df9d23a580c2109fe2a - arm-trusted-firmware/plat/arm/board/common/swd_rotpk/arm_swd_rotprivk_rsa.pem
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2b0cf90adf32af769b93e85764f195737286be65 - arm-trusted-firmware/plat/arm/board/common/rotpk/arm_rotpk_rsa_sha256.bin
64194de14ee2424df1ca72d388c407f3d0c16184 - arm-trusted-firmware/plat/arm/board/common/rotpk/arm_rotprivk_ecdsa.pem
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c4cd605f9796351468c8e3427ec60a3ab5966a93 - arm-trusted-firmware/plat/arm/board/common/rotpk/arm_dev_rotpk.S
a819075a49fd85dede74b56ddededf2f4c046f07 - arm-trusted-firmware/plat/arm/board/common/protpk/arm_protprivk_rsa.pem
cdb90754cb9118d6571aad9c3846b2c410f708d1 - arm-trusted-firmware/plat/arm/board/common/protpk/arm_protpk_rsa_sha256.bin
aa5febfe9cf8a923785e2509c54c7e03032167e7 - arm-trusted-firmware/plat/arm/board/common/protpk/README
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885dbc360b97a82697b2978ae8f5665ba4878080 - arm-trusted-firmware/plat/arm/board/common/aarch64/board_arm_helpers.S
bbb015479be8a51c7ec691d5a9283657dd1b6de1 - arm-trusted-firmware/plat/arm/board/morello/morello_plat.c
275ff8fd1cb66a02cc8ca9b9494035d3aa7f8ebf - arm-trusted-firmware/plat/arm/board/morello/morello_image_load.c
846d7f92ffe6c368d0d0b85ffa36409b0dd04caf - arm-trusted-firmware/plat/arm/board/morello/morello_trusted_boot.c
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03a2e96479894138f50468a179aa59836db7df08 - arm-trusted-firmware/plat/arm/board/morello/morello_bl2_setup.c
c855687b5adb537f1a56e37496a708864bd72650 - arm-trusted-firmware/plat/arm/board/morello/morello_bl1_setup.c
4f730b658c4d20887e0c7d6293b90f37cf62fa26 - arm-trusted-firmware/plat/arm/board/morello/morello_bl31_setup.c
0105670429d8a205bc698cf69de09044501a55a1 - arm-trusted-firmware/plat/arm/board/morello/morello_topology.c
710e4ce5fe08ed123d1977361a4bbf49dff07ba9 - arm-trusted-firmware/plat/arm/board/morello/morello_def.h
59b5177c9b302f117bea58642d758d747224eaed - arm-trusted-firmware/plat/arm/board/morello/morello_interconnect.c
021dca0ec2928f72c45e98a602338d8a2bb08cc2 - arm-trusted-firmware/plat/arm/board/morello/morello_err.c
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5361abb465b0253014c38facafec374dd284699a - arm-trusted-firmware/plat/arm/board/morello/include/plat_macros.S
bf30791c97940cf78bee90bb458a53b2480a4154 - arm-trusted-firmware/plat/arm/board/morello/fdts/morello_nt_fw_config.dts
a95b1476c52a6213400f2402811d15e5d82d7d83 - arm-trusted-firmware/plat/arm/board/morello/fdts/morello_tb_fw_config.dts
9c4c899115425303ba08c836c2a6ca740418160b - arm-trusted-firmware/plat/arm/board/morello/fdts/morello_fw_config.dts
1c3ff5d4d35a2aa211380dea2b252236f3dae0b1 - arm-trusted-firmware/plat/arm/board/morello/aarch64/morello_helper.S
70fd1afdd7b31d55ddd95d7018ba66095315083e - arm-trusted-firmware/plat/arm/board/arm_fpga/fpga_topology.c
89a8aeb02e2a9467d783383e96d830647443b99d - arm-trusted-firmware/plat/arm/board/arm_fpga/fpga_bl31_setup.c
0ca4a4d2749cd227831e57d361b8c16ee0f3cf03 - arm-trusted-firmware/plat/arm/board/arm_fpga/fpga_gicv3.c
15269f87cab6dfa65ce9cbaacbb13ee9cf2af583 - arm-trusted-firmware/plat/arm/board/arm_fpga/fpga_pm.c
fe445cbd11196fc3c69cdcbc6be5cdbc4354026b - arm-trusted-firmware/plat/arm/board/arm_fpga/build_axf.ld.S
1cfbd3237d5138875eda5a3f57ebd08f452c4992 - arm-trusted-firmware/plat/arm/board/arm_fpga/kernel_trampoline.S
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78391ad4c170cb70d2db6ad5639108f4f6020dc6 - arm-trusted-firmware/plat/arm/board/arm_fpga/rom_trampoline.S
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86553039cac69d2003776608e4a3172af5f6263d - arm-trusted-firmware/plat/arm/board/arm_fpga/fpga_console.c
6631f2221faec011381242d2e2011d9eda3e9780 - arm-trusted-firmware/plat/arm/board/arm_fpga/include/platform_def.h
87820ef2083d1576c3d29546b46fb922eafa3737 - arm-trusted-firmware/plat/arm/board/arm_fpga/include/plat_macros.S
205b5febc22c83179a2fc6c9005499ef61e8f347 - arm-trusted-firmware/plat/arm/board/arm_fpga/aarch64/fpga_helpers.S
866a21334d0661b2dde96c9ea5c2e2c99e649ab3 - arm-trusted-firmware/plat/arm/board/sgi575/sgi575_trusted_boot.c
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3aff6d693c63d2b2dc58205e075552c4f14e24c2 - arm-trusted-firmware/plat/arm/board/sgi575/sgi575_security.c
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77c37592e064ebc47319196a2468d4a75a6ff7de - arm-trusted-firmware/plat/arm/board/sgi575/fdts/sgi575_tb_fw_config.dts
9f8fd7d90d63ffe6d71473664ec09b7aa4cdf607 - arm-trusted-firmware/plat/arm/board/sgi575/fdts/sgi575_fw_config.dts
1f85fcf3a3d2c0bd5a8c5e848a4841400b54f9fe - arm-trusted-firmware/plat/arm/board/fvp_r/fvp_r_private.h
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2ce9cd0a5ef399a537316089ff1451da165bdd42 - arm-trusted-firmware/plat/arm/board/fvp_r/fvp_r_bl1_entrypoint.S
2b7e3adfdb026d5ab4fa54d23c6ff105d9d5e633 - arm-trusted-firmware/plat/arm/board/fvp_r/fvp_r_bl1_setup.c
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5f78d5ae0c4547371279bfc19196f01fb454e3b6 - arm-trusted-firmware/plat/arm/board/fvp_r/fvp_r_bl1_arch_setup.c
deb3a6a31fba479e597c0ae722532692996e2372 - arm-trusted-firmware/plat/arm/board/fvp_r/fvp_r_common.c
860f2b3b1633322a3865add4e226f457c1a7237d - arm-trusted-firmware/plat/arm/board/fvp_r/fvp_r_bl1_exceptions.S
181e66fa9c41732917a323ee0fe465da3b5ce36d - arm-trusted-firmware/plat/arm/board/fvp_r/fvp_r_stack_protector.c
efd5139ee502cdc5570d9ec338ee84b3410067fd - arm-trusted-firmware/plat/arm/board/fvp_r/fvp_r_misc_helpers.S
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866a21334d0661b2dde96c9ea5c2e2c99e649ab3 - arm-trusted-firmware/plat/arm/board/rdn2/rdn2_trusted_boot.c
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3693a7e757b2541552b2c91c91a0dba2d6a0a8de - arm-trusted-firmware/plat/arm/board/rdn2/rdn2_security.c
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79e40d92dcde7f9d17195a4a63d0608730af9c4b - arm-trusted-firmware/plat/arm/board/rde1edge/rde1edge_topology.c
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0397a242841f6193faacaba41c8326032a1e7729 - arm-trusted-firmware/plat/arm/board/rde1edge/fdts/rde1edge_tb_fw_config.dts
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0c9d3267229403366a43f37306593c660c95628b - arm-trusted-firmware/plat/arm/board/fvp/fvp_drtm_measurement.c
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9becd5a35328d19646bc14bdbf52f66571aad713 - arm-trusted-firmware/plat/arm/board/fvp/fvp_el3_spmc_logical_sp.c
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71418933f8bb76fa971723d4cb9bc6748a009f33 - arm-trusted-firmware/plat/arm/board/fvp/fvp_bl2_el3_setup.c
10c7154aeb64129154f13657841ad8f9aee6af85 - arm-trusted-firmware/plat/arm/board/fvp/fvp_trusted_boot.c
19591a34444effbe25bc3245bb68e6462bda0024 - arm-trusted-firmware/plat/arm/board/fvp/fvp_pm.c
0cd688de833f2a18c6d772bd627a60f6ada7351b - arm-trusted-firmware/plat/arm/board/fvp/fvp_drtm_stub.c
9fc1159cfd38294a716a80afd2da3ca690fcb25b - arm-trusted-firmware/plat/arm/board/fvp/fvp_realm_attest_key.c
aed35e7aa732be73eef26face244c3acdee67640 - arm-trusted-firmware/plat/arm/board/fvp/fvp_console.c
06847bf81aa287adc738ca7e18e792f817de2227 - arm-trusted-firmware/plat/arm/board/fvp/fvp_plat_attest_token.c
20e8179e5c61147fc2d627dbb503babac430603c - arm-trusted-firmware/plat/arm/board/fvp/fvp_def.h
f6099efde790e929572be29c9d98bcfa1864e8e4 - arm-trusted-firmware/plat/arm/board/fvp/fvp_el3_spmc.c
82ed42473643f46d039c3fed625bfc4c52a73ea9 - arm-trusted-firmware/plat/arm/board/fvp/fvp_drtm_addr.c
1f4bd385163a4d08851a30681746396352c6d77b - arm-trusted-firmware/plat/arm/board/fvp/fvp_bl2_setup.c
df0b10a5b65cf57a485f5eb846e0cfa7e64c429b - arm-trusted-firmware/plat/arm/board/fvp/fvp_io_storage.c
2394ce186fe1fd2d76b8a728058bf8c779d8495e - arm-trusted-firmware/plat/arm/board/fvp/fvp_drtm_err.c
6f76c4d8ae1abb640a62785bfc535bcb485f9511 - arm-trusted-firmware/plat/arm/board/fvp/fvp_topology.c
ef9c5a0fb7265f1ba0f41a24b4aefa35781372dd - arm-trusted-firmware/plat/arm/board/fvp/fvp_common.c
1924351967826f1ad9898254b30419ba2e7fb9cc - arm-trusted-firmware/plat/arm/board/fvp/fvp_bl2u_setup.c
83e404fdd5bc4dda0b68b92d365d6e9b047f13d3 - arm-trusted-firmware/plat/arm/board/fvp/fconf/fconf_nt_config_getter.c
10fc5531e7b7d5ac9ffba191f525b64179843eae - arm-trusted-firmware/plat/arm/board/fvp/fconf/fconf_hw_config_getter.c
2c7ccf1e47b4fdac9dc7745e506f4194cce2e498 - arm-trusted-firmware/plat/arm/board/fvp/aarch32/fvp_helpers.S
e4fcdd5d1b362e5247f4877f39ac24a55a02619f - arm-trusted-firmware/plat/arm/board/fvp/sp_min/fvp_sp_min_setup.c
c6b81accb44678a523485111e3a272cfda2337aa - arm-trusted-firmware/plat/arm/board/fvp/include/fvp_critical_data.h
7ae5efc596f9378d386e60bc5f50985eb9cb361d - arm-trusted-firmware/plat/arm/board/fvp/include/platform_def.h
aaff5cd1241ce58ab9627da89fb4860390a0864b - arm-trusted-firmware/plat/arm/board/fvp/include/fconf_nt_config_getter.h
aed581dcf8acf86f277ecf028cc1eec4f0c081fc - arm-trusted-firmware/plat/arm/board/fvp/include/plat_macros.S
84180022623ad574044b9436e62202ee5635c6ae - arm-trusted-firmware/plat/arm/board/fvp/include/fconf_hw_config_getter.h
1f6772f1b9358e6acc890bc4475a57f68cebc72d - arm-trusted-firmware/plat/arm/board/fvp/include/plat.ld.S
5601a00daf6c8ba481f1addc03652d97efe84a3c - arm-trusted-firmware/plat/arm/board/fvp/fdts/fvp_soc_fw_config.dts
aba68daa32f394274fa0c7b3ebb2d77514e105da - arm-trusted-firmware/plat/arm/board/fvp/fdts/event_log.dtsi
9ad16d4008c6be1847f6efb82008607aff0ebaf3 - arm-trusted-firmware/plat/arm/board/fvp/fdts/optee_sp_manifest.dts
e4d213d66811bdfc6375016599a2f2a901043fe5 - arm-trusted-firmware/plat/arm/board/fvp/fdts/fvp_fw_config.dts
6d68ca2eec213a5065a5f8754f9544fa16682719 - arm-trusted-firmware/plat/arm/board/fvp/fdts/fvp_tb_fw_config.dts
df9f20c998402fb612824aeec7d618e97e023cb8 - arm-trusted-firmware/plat/arm/board/fvp/fdts/fvp_spmc_optee_sp_manifest.dts
33a1a8c0c5e1f8f806d0dbe69adab509f55301be - arm-trusted-firmware/plat/arm/board/fvp/fdts/fvp_nt_fw_config.dts
56e13f4a58600986e9375220ad5ff2f9c55cb305 - arm-trusted-firmware/plat/arm/board/fvp/fdts/fvp_tsp_sp_manifest.dts
26761d08528feec31bb15a854b65dd46629135fe - arm-trusted-firmware/plat/arm/board/fvp/fdts/fvp_tsp_fw_config.dts
fa01aa43bab7bb9524735734f410da8758264bdd - arm-trusted-firmware/plat/arm/board/fvp/fdts/fvp_spmc_manifest.dts
b59b8589b390aaea5c26a9621713fe3d78e47e8b - arm-trusted-firmware/plat/arm/board/fvp/tsp/fvp_tsp_setup.c
d5a6187ffa8ab68518e9d896c2d50bbf600d68cd - arm-trusted-firmware/plat/arm/board/fvp/aarch64/fvp_helpers.S
3f4bcd29ccbf7cd09dfe8275846469b38db62e2f - arm-trusted-firmware/plat/arm/board/fvp/aarch64/fvp_ras.c
70913ecf05a6e846d99d63213b643de746a371e8 - arm-trusted-firmware/plat/arm/board/corstone1000/include/plat_macros.S
5562bd387d6506e0db4a62fe23b24cd1c5046754 - arm-trusted-firmware/plat/arm/board/corstone1000/common/corstone1000_stack_protector.c
665dd624982ad98f765987aa9abfb2a29f195e2d - arm-trusted-firmware/plat/arm/board/corstone1000/common/corstone1000_bl2_mem_params_desc.c
c10b97a1764fe4c02c0a7ae81b0a75313edeed05 - arm-trusted-firmware/plat/arm/board/corstone1000/common/corstone1000_helpers.S
1e7fe4ccc25d366dfe5f6a14851dab68001bdb13 - arm-trusted-firmware/plat/arm/board/corstone1000/common/corstone1000_topology.c
fbb932100f4228bb8fe153a58d84898837188f8b - arm-trusted-firmware/plat/arm/board/corstone1000/common/corstone1000_err.c
b9f80852b169e9c137876fadebe0782792162fe4 - arm-trusted-firmware/plat/arm/board/corstone1000/common/corstone1000_security.c
b8986dac246e932ea1ba7ee38e8e8ede263e1b24 - arm-trusted-firmware/plat/arm/board/corstone1000/common/corstone1000_trusted_boot.c
22a37f39d795371d274a9f3846b68a893966da33 - arm-trusted-firmware/plat/arm/board/corstone1000/common/corstone1000_pm.c
ec5c4655dfd1f5f6c9cde2f1dea202506c0ea6b8 - arm-trusted-firmware/plat/arm/board/corstone1000/common/corstone1000_plat.c
35364097d95fff4d6dcac3d39086e9bd15167caf - arm-trusted-firmware/plat/arm/board/corstone1000/common/include/platform_def.h
16e3686521725b2e8cf355c2d990811fc260a02c - arm-trusted-firmware/plat/arm/board/corstone1000/common/fdts/corstone1000_spmc_manifest.dts
07a42e98f0211f264decd0d40369a5a22999a7a4 - arm-trusted-firmware/plat/arm/board/rdv1/rdv1_err.c
daecdf40f28b13596b217b424164a59b35baa192 - arm-trusted-firmware/plat/arm/board/rdv1/rdv1_plat.c
1c209493074be7ae85b1aafe237784f10e2b7093 - arm-trusted-firmware/plat/arm/board/rdv1/rdv1_topology.c
866a21334d0661b2dde96c9ea5c2e2c99e649ab3 - arm-trusted-firmware/plat/arm/board/rdv1/rdv1_trusted_boot.c
39dd88b06678aa7f03906487a206a758c69bb621 - arm-trusted-firmware/plat/arm/board/rdv1/rdv1_security.c
eb03bd37d9fe5130c83a90a8f6b4ae6ec5a70c9f - arm-trusted-firmware/plat/arm/board/rdv1/include/platform_def.h
3fa6109549ac24e3e9727ec6cfc9c34111cf53c9 - arm-trusted-firmware/plat/arm/board/rdv1/fdts/rdv1_fw_config.dts
77c37592e064ebc47319196a2468d4a75a6ff7de - arm-trusted-firmware/plat/arm/board/rdv1/fdts/rdv1_tb_fw_config.dts
4eee465e298e33cc2776504ed671b987022fb333 - arm-trusted-firmware/plat/arm/board/rdv1/fdts/rdv1_nt_fw_config.dts
04538cf26382d09d8e2c07c0b46f13a5b099236a - arm-trusted-firmware/plat/arm/board/rdv1mc/rdv1mc_topology.c
584cb4b05aeec673c6c04da7c3885037b079afa4 - arm-trusted-firmware/plat/arm/board/rdv1mc/rdv1mc_err.c
b53ded92528c275e65fc5654ce2f65a96096309b - arm-trusted-firmware/plat/arm/board/rdv1mc/rdv1mc_plat.c
866a21334d0661b2dde96c9ea5c2e2c99e649ab3 - arm-trusted-firmware/plat/arm/board/rdv1mc/rdv1mc_trusted_boot.c
3f70fab8ee8fcd7926df2c977d9380f53cbbb9f6 - arm-trusted-firmware/plat/arm/board/rdv1mc/rdv1mc_security.c
d44f2f7e1a20469a2ffaccbde28906fdcc5a60e6 - arm-trusted-firmware/plat/arm/board/rdv1mc/include/platform_def.h
3fa6109549ac24e3e9727ec6cfc9c34111cf53c9 - arm-trusted-firmware/plat/arm/board/rdv1mc/fdts/rdv1mc_fw_config.dts
77c37592e064ebc47319196a2468d4a75a6ff7de - arm-trusted-firmware/plat/arm/board/rdv1mc/fdts/rdv1mc_tb_fw_config.dts
c139b0b044ff0f3122d7f6e5b65703bc3fbee8d2 - arm-trusted-firmware/plat/arm/board/rdv1mc/fdts/rdv1mc_nt_fw_config.dts
1f68f4b41cf660f6aecbd9c91cffd25b5da791a9 - arm-trusted-firmware/plat/arm/board/tc/tc_err.c
e359fea3cdefe52d1384eaf4e3657d1a8639ce5c - arm-trusted-firmware/plat/arm/board/tc/tc_trusted_boot.c
4820529d3f2dd58d5a256494c687006b2eff63ad - arm-trusted-firmware/plat/arm/board/tc/tc_bl2_measured_boot.c
c14c384694fa6f799c7df9925a9afa420147bc48 - arm-trusted-firmware/plat/arm/board/tc/tc_plat.c
89a5e32d31fb4109758d8eab72df17a1e36004e9 - arm-trusted-firmware/plat/arm/board/tc/tc_common_measured_boot.c
28488a6123a3f6e963e45167297c24b033c4ea20 - arm-trusted-firmware/plat/arm/board/tc/tc_bl31_setup.c
e12be214b71705c426b59f867e2c1e12d74eb660 - arm-trusted-firmware/plat/arm/board/tc/tc_topology.c
ded1714043a17b1985c18754683ddcc8a2954d2a - arm-trusted-firmware/plat/arm/board/tc/tc_bl2_setup.c
4335b9a6f68fb49824b223397621a29f3d1030c9 - arm-trusted-firmware/plat/arm/board/tc/tc_interconnect.c
fc718361b3f42b952f8b5b107ca5aeacc22f9dc5 - arm-trusted-firmware/plat/arm/board/tc/tc_bl1_measured_boot.c
ae19b2b5534ecfc11125374e36d9e8f859a89eda - arm-trusted-firmware/plat/arm/board/tc/tc_security.c
519d8a1e3c1a9b5ad5b03d86b69451ba3ac67a95 - arm-trusted-firmware/plat/arm/board/tc/include/platform_def.h
12e15891d91866e073604872dd843da7a55ab1ca - arm-trusted-firmware/plat/arm/board/tc/include/plat_macros.S
8ad72d03b3ba43d1683a1303fee28ea1c7be281d - arm-trusted-firmware/plat/arm/board/tc/include/tc_helpers.S
9660ea0d565256c4b8a124a3b15c393be1d5f9b0 - arm-trusted-firmware/plat/arm/board/tc/include/tc_plat.h
b6a0718fcdad5e07263ed41c89641a47d843eb14 - arm-trusted-firmware/plat/arm/board/tc/fdts/tc_tb_fw_config.dts
46c4eb5b1105e6fcf9a5ebc8bb219b4f6250ef79 - arm-trusted-firmware/plat/arm/board/tc/fdts/tc_fw_config.dts
6d8e682b0e92f3c4b0317af9db0cf378942f0637 - arm-trusted-firmware/plat/arm/board/tc/fdts/tc_spmc_optee_sp_manifest.dts
dd7dfe59caab52d2698deda4e52c6508f481ea7a - arm-trusted-firmware/plat/arm/board/tc/fdts/tc_spmc_manifest.dts
4b2fa306464372689007dbc453675d5ea6a5783d - arm-trusted-firmware/plat/arm/board/n1sdp/n1sdp_def.h
e50d2dd98343b489f7e7c65c66462d77e358058e - arm-trusted-firmware/plat/arm/board/n1sdp/n1sdp_plat.c
31f172efc8e16bf86bc5a0266155410faa98e56d - arm-trusted-firmware/plat/arm/board/n1sdp/n1sdp_trusted_boot.c
7104250da7bca258ddb0bf081570d32f8900092b - arm-trusted-firmware/plat/arm/board/n1sdp/n1sdp_interconnect.c
65f4dae233a8130318848bb4b108b07c4580d531 - arm-trusted-firmware/plat/arm/board/n1sdp/n1sdp_image_load.c
17cc0bef584ee2a5b4315f60a6c07b461b64cdbd - arm-trusted-firmware/plat/arm/board/n1sdp/n1sdp_bl31_setup.c
7d80d6700188f44364662e46113af9036afedcbc - arm-trusted-firmware/plat/arm/board/n1sdp/n1sdp_topology.c
8bb93dc2fa4e107a6a9b7eaa82259298199588b3 - arm-trusted-firmware/plat/arm/board/n1sdp/n1sdp_bl2_setup.c
4497a7586471f072a94ff5a066931c86dcb6fd2d - arm-trusted-firmware/plat/arm/board/n1sdp/n1sdp_security.c
c0478746f7abb1567136588aa75b9ec5142ebcea - arm-trusted-firmware/plat/arm/board/n1sdp/n1sdp_bl1_setup.c
c12269118b21e6143b6706a81b90cf54740d000e - arm-trusted-firmware/plat/arm/board/n1sdp/n1sdp_err.c
cd7e3d3de668bb687ba56bcc08c15894451c4181 - arm-trusted-firmware/plat/arm/board/n1sdp/include/platform_def.h
b45c063aa1fdf9280c52020500ae6e83d71244c5 - arm-trusted-firmware/plat/arm/board/n1sdp/include/plat_macros.S
138fe343329f375a545d7daa55144c70b2cbddb8 - arm-trusted-firmware/plat/arm/board/n1sdp/fdts/n1sdp_tb_fw_config.dts
85ebc38bf15e709a94617d0e22454746189c93a0 - arm-trusted-firmware/plat/arm/board/n1sdp/fdts/n1sdp_optee_spmc_manifest.dts
7f1a7e1c53ebc90c5254e41517a96e05072b6af6 - arm-trusted-firmware/plat/arm/board/n1sdp/fdts/n1sdp_nt_fw_config.dts
9da6c3964d40da13feef13c16d595d7266ce7e68 - arm-trusted-firmware/plat/arm/board/n1sdp/fdts/n1sdp_fw_config.dts
4b16feb977654bc82a89a104dc5b31b167bf17d1 - arm-trusted-firmware/plat/arm/board/n1sdp/aarch64/n1sdp_helper.S
1690035b8b9571d77eafa8b4dc7d1b5145635c1a - arm-trusted-firmware/plat/qemu/common/qemu_common.c
16002a1a28f7ec581aae95aba10964655f89c5dc - arm-trusted-firmware/plat/qemu/common/qemu_pm.c
00fcc8b29bf97f9ede1c2dfbe40db7ef83c72695 - arm-trusted-firmware/plat/qemu/common/qemu_spmd_manifest.c
16be159c4a5d2a3878237098afe450cac07536d1 - arm-trusted-firmware/plat/qemu/common/qemu_trusted_boot.c
c154631e1880ac14882cbb7ec28846bcac331126 - arm-trusted-firmware/plat/qemu/common/qemu_bl31_setup.c
fcbaa96813c363c3db4933b80039d532e1252dc7 - arm-trusted-firmware/plat/qemu/common/qemu_io_storage.c
21efcb8ca3eeadb04af0ad8b5dbff0a548221482 - arm-trusted-firmware/plat/qemu/common/qemu_bl2_setup.c
8ebb840a06cb6dddf6c0fd5fe4a612f832842576 - arm-trusted-firmware/plat/qemu/common/qemu_bl2_mem_params_desc.c
2085009221c46e8e62ac297e819084f4b6087615 - arm-trusted-firmware/plat/qemu/common/qemu_rotpk.S
d78bd11a3e46b66140586c01d9f834a788316251 - arm-trusted-firmware/plat/qemu/common/qemu_gicv2.c
a58c658f18083c55761b946dd01b034df662dada - arm-trusted-firmware/plat/qemu/common/topology.c
930aace47c80c680938c0b2934fc56ba412930da - arm-trusted-firmware/plat/qemu/common/qemu_private.h
95a9e39672a85b16243df6db511e352e068b90ee - arm-trusted-firmware/plat/qemu/common/qemu_bl1_setup.c
ec654aff1a7a4e282bbbe2dc13b2042b9534eb61 - arm-trusted-firmware/plat/qemu/common/qemu_gicv3.c
3ca3d10548276087940fd7af8f274b1b68378322 - arm-trusted-firmware/plat/qemu/common/qemu_stack_protector.c
ce499ea5552f0a580d2d730cd86b20a544fb4759 - arm-trusted-firmware/plat/qemu/common/qemu_console.c
51d8305f79f4736a224811e549fd92ffee6e2134 - arm-trusted-firmware/plat/qemu/common/qemu_spm.c
854064daf74a72113baf3004985576f30ed85540 - arm-trusted-firmware/plat/qemu/common/qemu_image_load.c
674a4514924db14c06277e39651b46250347d7a4 - arm-trusted-firmware/plat/qemu/common/aarch32/plat_helpers.S
553cd30299445b034280689989176963a39f2b4d - arm-trusted-firmware/plat/qemu/common/sp_min/sp_min_setup.c
f58716f140fa8f450f8073fca6f98a8eda79bbc2 - arm-trusted-firmware/plat/qemu/common/include/plat_macros.S
fe635c884df368ae689c259f9ac0787b17064bb4 - arm-trusted-firmware/plat/qemu/common/aarch64/plat_helpers.S
a1a54b73ef6817449b27e96c2b447c7d42812d47 - arm-trusted-firmware/plat/qemu/qemu/qemu_measured_boot.c
550744a18b4aa7236d084b7faa39941e6e0fea6f - arm-trusted-firmware/plat/qemu/qemu/qemu_helpers.c
a1a12a4a2a7978cb4f20160ecc843dc94ea76cf2 - arm-trusted-firmware/plat/qemu/qemu/qemu_bl1_measured_boot.c
5c21f6d26dfbcc5e7fefe1ca8e7bc4deeef4eb32 - arm-trusted-firmware/plat/qemu/qemu/qemu_common_measured_boot.c
25a1420f59573a9a4daa0ba527157db311b5df67 - arm-trusted-firmware/plat/qemu/qemu/include/platform_def.h
a3366d3ea9b4a5a823b365b0a4fe16dd24af7388 - arm-trusted-firmware/plat/qemu/qemu_sbsa/sbsa_private.h
f2efe87ffe7cd41bf5ac442c75b40fb2593a8fbb - arm-trusted-firmware/plat/qemu/qemu_sbsa/sbsa_topology.c
151cea63605746875bff4fceaa296485033aa280 - arm-trusted-firmware/plat/qemu/qemu_sbsa/sbsa_pm.c
46b611bd4d5b4370f104fdcc62cf5da040ec7970 - arm-trusted-firmware/plat/qemu/qemu_sbsa/include/platform_def.h
e3aeb1fcc3d0ea558495c190263daaff95f76f64 - arm-trusted-firmware/plat/renesas/rcar/bl2_plat_setup.c
716e1c7c79baa403b9c5d0ef120f23d8cac8e802 - arm-trusted-firmware/plat/renesas/common/plat_pm.c
514484b073de3f03a0c25885d1947529d0863273 - arm-trusted-firmware/plat/renesas/common/bl2_secure_setting.c
12b42e58567a9ecd3d1d63318cb5ec7011a41573 - arm-trusted-firmware/plat/renesas/common/plat_storage.c
a977937122b0a3096d2974c21e1d01713d54ef5b - arm-trusted-firmware/plat/renesas/common/plat_topology.c
ffd1e457886f1089d9c344f701ec17dc97f8f074 - arm-trusted-firmware/plat/renesas/common/rcar_common.c
5f9406be82d4cf619e442556228de3e2d1283e39 - arm-trusted-firmware/plat/renesas/common/plat_image_load.c
d414d4d769295e5a493cf3e77c9c51626ee0e6fb - arm-trusted-firmware/plat/renesas/common/bl2_interrupt_error.c
ae71ad3a55f0e9c013697f9775e6c12c0ff7bd74 - arm-trusted-firmware/plat/renesas/common/bl2_cpg_init.c
9e2b414041c35052396135ebdc28539af32c2593 - arm-trusted-firmware/plat/renesas/common/bl31_plat_setup.c
ea086669ab75f559b2e65b291fea3af158c18bd2 - arm-trusted-firmware/plat/renesas/common/bl2_plat_mem_params_desc.c
aa601d2e26e65cab57efac1579ef07d5a4966f23 - arm-trusted-firmware/plat/renesas/common/include/rcar_version.h
2f021b7dce5115d413267052dd5b471ceff900cf - arm-trusted-firmware/plat/renesas/common/include/rcar_private.h
939b904cc911a51e5bfd33fc817d5c5b22e55400 - arm-trusted-firmware/plat/renesas/common/include/platform_def.h
72226e12e556432cb547181aa73e0d55c5c8777f - arm-trusted-firmware/plat/renesas/common/include/plat_macros.S
f4aa97332efbbc8e20e48e338443fd3b9c208830 - arm-trusted-firmware/plat/renesas/common/include/plat.ld.S
f99514b828a7a7fe6f0063a291c023d74a2c9bd2 - arm-trusted-firmware/plat/renesas/common/include/rcar_def.h
64ef91e2bf3528ac94c8eb79c5c3f80113257721 - arm-trusted-firmware/plat/renesas/common/include/registers/lifec_registers.h
f773e9cbe28c8c27bd7013b66cd612cd63f790fc - arm-trusted-firmware/plat/renesas/common/include/registers/axi_registers.h
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3c4b66c3e0e2ea740399f2ac87b9c61af5c45031 - arm-trusted-firmware/plat/renesas/common/aarch64/platform_common.c
2b4770445484da2ea7c1061c5e772905f5f9eda9 - arm-trusted-firmware/plat/renesas/common/aarch64/plat_helpers.S
d9c373f0351531965e8097178bbc13ede3af7485 - arm-trusted-firmware/plat/renesas/rzg/bl2_plat_setup.c
4dbec584881036aa37e59b66185d958a695a455d - arm-trusted-firmware/plat/nvidia/tegra/drivers/memctrl/memctrl_v1.c
164348d605c323efb61920d24f91b3e8067e2cff - arm-trusted-firmware/plat/nvidia/tegra/drivers/memctrl/memctrl_v2.c
4d04fd613146842b18904061da84f5958c44b16b - arm-trusted-firmware/plat/nvidia/tegra/drivers/flowctrl/flowctrl.c
fb218e655fd6a3d77f969fce9cd6cb5dd0a6c5b2 - arm-trusted-firmware/plat/nvidia/tegra/drivers/gpcdma/gpcdma.c
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58fc3b165ee7a61397eef3e9f2065858876ce9de - arm-trusted-firmware/plat/nvidia/tegra/drivers/spe/shared_console.S
6f1dca2fba8be7758cfe4395226b2e4be820e3f1 - arm-trusted-firmware/plat/nvidia/tegra/drivers/pmc/pmc.c
8d9b8ebe2f8407dfc849bee6942b55d0a9c76d41 - arm-trusted-firmware/plat/nvidia/tegra/drivers/bpmp/bpmp.c
2a6016cc527d04ca332373c0d14542d5176aebf8 - arm-trusted-firmware/plat/nvidia/tegra/drivers/psc/psc_mailbox.c
8724a95f2af055e28a26a7fa510e1e2312dbb435 - arm-trusted-firmware/plat/nvidia/tegra/drivers/bpmp_ipc/ivc.h
29b42ced515a2a6ab925492a74ebb472d35665a9 - arm-trusted-firmware/plat/nvidia/tegra/drivers/bpmp_ipc/intf.h
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1ad3acb2c35dab529632e51cfd8a1977d0a3e495 - arm-trusted-firmware/plat/nvidia/tegra/include/drivers/pmc.h
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249831518e8554837fb8750d200cb4b786c2d683 - arm-trusted-firmware/plat/nvidia/tegra/include/t194/tegra_def.h
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8617ceef396a9a7f9b5e9e1a4866cede187f6ba6 - arm-trusted-firmware/plat/nvidia/tegra/common/tegra_sdei.c
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3ec4772e3564c951724bc646a368912365c2070a - arm-trusted-firmware/plat/nvidia/tegra/common/tegra_platform.c
bbb547cc93729fd63ae5da22480a94dc84ad6fbf - arm-trusted-firmware/plat/nvidia/tegra/common/tegra_sip_calls.c
348ad39495b7209e9858421f7bd1a02f9712a410 - arm-trusted-firmware/plat/nvidia/tegra/common/tegra_pauth.c
c7104ef4a0ccb4a2ceb01951a0c8442349cf4ca7 - arm-trusted-firmware/plat/nvidia/tegra/common/tegra_delay_timer.c
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c97649b9bd33d9e7f4268f6ddc79d603a3a317f2 - arm-trusted-firmware/plat/nvidia/tegra/common/tegra_fiq_glue.c
fa85e2dbd21318c0c3aeb697b4dfc2d7a5a07e6f - arm-trusted-firmware/plat/nvidia/tegra/common/tegra_pm.c
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0c5a65d7362595eff6d472ba23ccde7af61d9ce8 - arm-trusted-firmware/plat/nvidia/tegra/common/tegra_io_storage.c
55b938cb527f31dfe8ec3b11bd74470694eec560 - arm-trusted-firmware/plat/nvidia/tegra/common/tegra_gicv2.c
c00b9f5780cdfda81db3419b659966b43f39373f - arm-trusted-firmware/plat/nvidia/tegra/common/aarch64/tegra_helpers.S
bf02f90c1795b9e26f314ab310c0ba4e389257e4 - arm-trusted-firmware/plat/nvidia/tegra/soc/t186/plat_secondary.c
0dd6e3b7ed73b5e77f6ebc89320058cde70900c2 - arm-trusted-firmware/plat/nvidia/tegra/soc/t186/plat_trampoline.S
8ed0428c2133d5bcc570a67baa3ebdd5208cc7bd - arm-trusted-firmware/plat/nvidia/tegra/soc/t186/plat_setup.c
106e68f73e09c8f51c620c0dd840b42ea6dbd67f - arm-trusted-firmware/plat/nvidia/tegra/soc/t186/plat_sip_calls.c
5b9c61a07970be31ce559c1b2c78acc41d5223e3 - arm-trusted-firmware/plat/nvidia/tegra/soc/t186/plat_smmu.c
c7611d91a504dd3fe52ee769f9fa2d4f469010a8 - arm-trusted-firmware/plat/nvidia/tegra/soc/t186/plat_memctrl.c
a94f3bf95a41f47e1aae597082786cb5b8978350 - arm-trusted-firmware/plat/nvidia/tegra/soc/t186/plat_psci_handlers.c
34309aaec4559a7c2094873802490b96b9cf9dc1 - arm-trusted-firmware/plat/nvidia/tegra/soc/t186/drivers/include/t18x_ari.h
34e8d1c4e060805a3f55969aabbd211dc6b08fbd - arm-trusted-firmware/plat/nvidia/tegra/soc/t186/drivers/include/mce_private.h
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326d37fa1c2f92a2e56baf3391479c3dd1365396 - arm-trusted-firmware/plat/nvidia/tegra/soc/t186/drivers/se/se.c
4588d011d8dbc1073379954dcdfb1c437cf9d4ce - arm-trusted-firmware/plat/nvidia/tegra/soc/t186/drivers/mce/nvg.c
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0a76eef9a0cb2d3c1fffc2a886eab6fdabb34997 - arm-trusted-firmware/plat/nvidia/tegra/soc/t186/drivers/mce/mce.c
015badf34dbdf2955bc1dc9f4b22627bde8f9f9c - arm-trusted-firmware/plat/nvidia/tegra/soc/t186/drivers/mce/aarch64/nvg_helpers.S
c2cd522ab9668274cd7bf26fde63e9dbc9a94f28 - arm-trusted-firmware/plat/nvidia/tegra/soc/t234/plat_secondary.c
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3d01d365783ad5b2ce0f76df72a4a10db3d9a10d - arm-trusted-firmware/plat/nvidia/tegra/soc/t234/plat_memctrl.c
5539d4b4adbd8a16367417d468bc7c27a07fa94a - arm-trusted-firmware/plat/nvidia/tegra/soc/t234/plat_ras.c
ddd85e1d0b1de3e76efb8ac87a71e7d4441b2795 - arm-trusted-firmware/plat/nvidia/tegra/soc/t234/plat_psci_handlers.c
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2cbef431f380eae34ec9bf1e4f71c37df3219721 - arm-trusted-firmware/plat/nvidia/tegra/soc/t234/drivers/mce/mce.c
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ba0a312824b0782a438e265e86a6e9d7638032db - arm-trusted-firmware/plat/nvidia/tegra/soc/t194/plat_smmu.c
595bafd552b05d81a25e9916fe91779e18beddda - arm-trusted-firmware/plat/nvidia/tegra/soc/t194/plat_memctrl.c
c55c5c502ca4117b327d32cc3fef8203d3c64731 - arm-trusted-firmware/plat/nvidia/tegra/soc/t194/plat_ras.c
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0cdfadd153db5ee7d515adb01dd35d62e546226a - arm-trusted-firmware/plat/nvidia/tegra/soc/t194/drivers/mce/nvg.c
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2321fbf75d8e96d90a1b6f6a14160c91b949cabc - arm-trusted-firmware/plat/amlogic/common/aml_scpi.c
1c810633809eed169ef7ae47da01b6326b111a64 - arm-trusted-firmware/plat/amlogic/common/aml_console.c
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22fc306f5f9b6613312023233481baaf99493614 - arm-trusted-firmware/plat/amlogic/common/aml_sip_svc.c
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1b86970e6e211ba1548f3469a4682db7c31577f1 - arm-trusted-firmware/plat/amlogic/common/aml_mhu.c
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11b25502ea937dd88b3986d358aad3eff9f39c71 - arm-trusted-firmware/plat/nxp/common/psci/aarch64/psci_utils.S
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003b4e0c6ab04fb9bd51037a2c976e8e9a1e90dc - arm-trusted-firmware/plat/nxp/common/tbbr/nxp_rotpk.S
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99de11a8e1d6aa0d67bff400dc27222a3f67bda3 - arm-trusted-firmware/plat/nxp/common/tbbr/x509_tbbr.c
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cb4accb6830f44fe050021fd6e32cca1a8acf7ee - arm-trusted-firmware/plat/nxp/common/setup/ls_bl31_setup.c
475644583f7d46ef814913dcdcfddfa706f9f9bb - arm-trusted-firmware/plat/nxp/common/setup/ls_io_storage.c
d736c2075e7e15a400e61a1db310a4d1b43bffd2 - arm-trusted-firmware/plat/nxp/common/setup/ls_image_load.c
7159132c839b1d3568d7b7b03da30f6d03e5336e - arm-trusted-firmware/plat/nxp/common/setup/ls_interrupt_mgmt.c
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6694d9cc9520a800f00a344d9cc1c534b6e88d91 - arm-trusted-firmware/plat/nxp/common/setup/ls_bl2_el3_setup.c
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9c72b3ecd5d5982e63db876f7dfefb7cbac10bea - arm-trusted-firmware/plat/nxp/common/sip_svc/sip_svc.c
27f86d14fd5ce72d0aaa417b4c893049acc97e1c - arm-trusted-firmware/plat/nxp/common/sip_svc/include/sipsvc.h
be62a5510efe4bb10130935015fc6c12d3b02ed4 - arm-trusted-firmware/plat/nxp/common/sip_svc/aarch64/sipsvc.S
2c5220969ad934f5e3904f8b72774332826fb89d - arm-trusted-firmware/plat/nxp/common/aarch64/ls_helpers.S
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08360ed6a8b3d051a5cad1cb6e001cf1600b7ac8 - arm-trusted-firmware/plat/nxp/common/ocram/ocram.h
5e45989256d4cb803eb129882666969d3d952ac6 - arm-trusted-firmware/plat/nxp/common/ocram/aarch64/ocram.S
1fc45a1f2166ae38c534bcf389857b89c441c5af - arm-trusted-firmware/plat/nxp/soc-ls1088a/soc.c
0f6a22f1e28fcb385608a72a297b0cbd67935113 - arm-trusted-firmware/plat/nxp/soc-ls1088a/soc.def
11e2d32b094714041c63cf972054b12b7c0db04e - arm-trusted-firmware/plat/nxp/soc-ls1088a/ls1088ardb/platform_def.h
344959df5ba88c1bf9ce847e6735395045c1253c - arm-trusted-firmware/plat/nxp/soc-ls1088a/ls1088ardb/platform.c
9c8add03dd402a33b546ebe338030483a6e30892 - arm-trusted-firmware/plat/nxp/soc-ls1088a/ls1088ardb/plat_def.h
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30d19335e7872d98487de84b2cc1cfad32bc26ad - arm-trusted-firmware/plat/nxp/soc-ls1088a/ls1088ardb/ddr_init.c
11e2d32b094714041c63cf972054b12b7c0db04e - arm-trusted-firmware/plat/nxp/soc-ls1088a/ls1088aqds/platform_def.h
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3328578a5401038f068eded4991d6a403c5276b7 - arm-trusted-firmware/plat/nxp/soc-ls1088a/ls1088aqds/plat_def.h
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492d3f0900343c093e718ba1816eb94bfc3931e9 - arm-trusted-firmware/plat/nxp/soc-ls1088a/aarch64/ls1088a.S
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189fa51ba04371ccab55ac105b7dfe77c07f3552 - arm-trusted-firmware/plat/nxp/soc-lx2160a/soc.def
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2881529cc073176412af0c380690bab77add20c5 - arm-trusted-firmware/plat/nxp/soc-lx2160a/lx2160aqds/plat_def.h
353f72fa699efe7dc63602a04a220dd43adb85ba - arm-trusted-firmware/plat/nxp/soc-lx2160a/lx2160aqds/policy.h
d07e54f7cdb54922dac5c758dd79b5adb4d9e93f - arm-trusted-firmware/plat/nxp/soc-lx2160a/lx2160aqds/ddr_init.c
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764850c7f4814c83fc8b48d4a353c5ae2836edf6 - arm-trusted-firmware/plat/nxp/soc-lx2160a/lx2160ardb/ddr_init.c
c515220a4c8200d4212a8d951e49a9022e7bef2f - arm-trusted-firmware/plat/nxp/soc-lx2160a/lx2162aqds/platform_def.h
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e8ecd59dc257f4918515a132b0c4787bc1890021 - arm-trusted-firmware/plat/nxp/soc-lx2160a/lx2162aqds/ddr_init.c
63c93614b627d3a013d8176aa4248010115eecf0 - arm-trusted-firmware/plat/nxp/soc-lx2160a/aarch64/lx2160a_warm_rst.S
3e9660b08500144943aee803a37816f45307d66b - arm-trusted-firmware/plat/nxp/soc-lx2160a/aarch64/lx2160a.S
ed1f52b1a3d4ce48135556f32d8667c7367494d8 - arm-trusted-firmware/plat/nxp/soc-lx2160a/aarch64/lx2160a_helpers.S
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859878633110369cd34a10f6683227f6b49d0006 - arm-trusted-firmware/plat/nxp/soc-ls1043a/ls1043ardb/platform.c
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3268f346c7eb1578007b13a160c4c3d08efe2c0b - arm-trusted-firmware/plat/nxp/soc-ls1028a/ls1028ardb/ddr_init.c
033fd89d203e44c446aba6134e51e46a7d9cf324 - arm-trusted-firmware/plat/nxp/soc-ls1028a/aarch64/ls1028a_helpers.S
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5fa3e198d6ad7a764cb058e6e88fa12a0d8ffe85 - arm-trusted-firmware/plat/socionext/uniphier/uniphier_nand.c
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456820f5853d3f1676ee19bf63b9c360ed9a80a8 - arm-trusted-firmware/plat/socionext/uniphier/uniphier_io_storage.c
21ef9559c64415fef54f3373f28fde4fa86d92d3 - arm-trusted-firmware/plat/socionext/uniphier/uniphier_topology.c
05b8fac4f5d6b8cee9465b541e992f27f071fe8f - arm-trusted-firmware/plat/socionext/uniphier/uniphier_console.S
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ab09cd5d8d3222857a607791bee8b31359314aa9 - arm-trusted-firmware/plat/socionext/uniphier/uniphier_bl31_setup.c
91e3ef5fbfd42b725b57f2608d1934a5c717de3b - arm-trusted-firmware/plat/socionext/uniphier/uniphier_tbbr.c
2b022afd58ed2221e8abc99099867eab0c42c326 - arm-trusted-firmware/plat/socionext/uniphier/uniphier_emmc.c
7cb14fc4ccfe79fe8ffb080b91337e263775111d - arm-trusted-firmware/plat/socionext/uniphier/uniphier_syscnt.c
d342acec84b75ea4f64204404f0a54b4158920e1 - arm-trusted-firmware/plat/socionext/uniphier/uniphier_usb.c
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7518b6009c736b543504a3f84be4cbd20e8d9f0c - arm-trusted-firmware/plat/socionext/uniphier/uniphier_scp.c
69a2371870f65a855d9ff7c728f2e9c32882aa2c - arm-trusted-firmware/plat/socionext/uniphier/uniphier_bl2_setup.c
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ad344a675d5f4bf3287a6e32451b462c3ea7d29c - arm-trusted-firmware/plat/socionext/uniphier/uniphier_rotpk.S
98c1438c270db5db7bd6f971cb928420df53c1b7 - arm-trusted-firmware/plat/socionext/uniphier/uniphier_image_desc.c
516680ab29649a33ea07ffa922f3b18448e61e55 - arm-trusted-firmware/plat/socionext/uniphier/uniphier_psci.c
26621302eaceca62d3b0e8224c6c14d5ea08df38 - arm-trusted-firmware/plat/socionext/uniphier/uniphier_xlat_setup.c
006db753e22b1119a67d4f76bd213bf3de08be09 - arm-trusted-firmware/plat/socionext/uniphier/uniphier_gicv3.c
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30db57b3d947cfae86d4cb1fbd7d79f7365fe01d - arm-trusted-firmware/plat/socionext/uniphier/uniphier_smp.S
30d16489f342eed522b276128737ad41acb82ba9 - arm-trusted-firmware/plat/socionext/uniphier/uniphier_helpers.S
dd16d7be9af0988718096ec4af552732207ad390 - arm-trusted-firmware/plat/socionext/uniphier/uniphier_console_setup.c
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8bea3f2da202b83b97d9b86e32cb50d5c17cae7e - arm-trusted-firmware/plat/socionext/uniphier/include/plat_macros.S
d181839ef722d36e8a51c126deb67a2eae64c527 - arm-trusted-firmware/plat/socionext/uniphier/tsp/uniphier_tsp_setup.c
f43a62ef3a99346a097b8813441539c5354436fc - arm-trusted-firmware/plat/socionext/synquacer/sq_ccn.c
a8796cf9a2847c8c6d4851d911b9bd0622450b48 - arm-trusted-firmware/plat/socionext/synquacer/sq_io_storage.c
a11d578ee6af8315da34f383d53ad866c3acb944 - arm-trusted-firmware/plat/socionext/synquacer/sq_image_desc.c
a32f17d7db01cfb7a14811a914ba2066581d29a1 - arm-trusted-firmware/plat/socionext/synquacer/sq_spm.c
fabaf9f847297853dc77c6577d5049ea4ab77809 - arm-trusted-firmware/plat/socionext/synquacer/sq_bl2_setup.c
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94f1c76a8b066bc8d833c5c6d9d83cc9d34c7f6a - arm-trusted-firmware/plat/socionext/synquacer/sq_helpers.S
9b1262ca8c6950227a294b789fb3e53dfa2086b1 - arm-trusted-firmware/plat/socionext/synquacer/sq_topology.c
77fff6026c1390b1ee72fb8b325459f621ba78e3 - arm-trusted-firmware/plat/socionext/synquacer/sq_psci.c
8286dff95425dddb9a5b25ffda50460831781793 - arm-trusted-firmware/plat/socionext/synquacer/sq_xlat_setup.c
572ea5edf4e0c46c76fdc9b6eb08197c585be8b5 - arm-trusted-firmware/plat/socionext/synquacer/sq_rotpk.S
46f95ebc32523d9f1cccec7e9619f41394a601cf - arm-trusted-firmware/plat/socionext/synquacer/sq_bl31_setup.c
b8adf13173155303a49ce111d0e2bf30bae8a3c8 - arm-trusted-firmware/plat/socionext/synquacer/sq_tbbr.c
961c660b9e7a5641523d5d23b5396c2a2a67746e - arm-trusted-firmware/plat/socionext/synquacer/drivers/mhu/sq_mhu.c
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b6784404cec981a185e6f44ef689f28b7d9513e3 - arm-trusted-firmware/plat/socionext/synquacer/drivers/scpi/sq_scpi.c
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f57f50699d6a8f3902d4673f01ec3ff0d6931d29 - arm-trusted-firmware/plat/socionext/synquacer/drivers/scp/sq_scp.c
3feac02c8c7ca9aa51ae9f96e7c204d43856d111 - arm-trusted-firmware/plat/socionext/synquacer/include/platform_def.h
71b4d3a8866abd87734eafad2ffcf269d273af25 - arm-trusted-firmware/plat/socionext/synquacer/include/sq_common.h
9f24e8fcbc08c61f43c8041c0464cae65fe01ce8 - arm-trusted-firmware/plat/socionext/synquacer/include/plat_macros.S
ef74e9cda94f07bf3061b037195287d609c0c6b4 - arm-trusted-firmware/plat/socionext/synquacer/include/plat.ld.S
43da4a7bd6435c6cc7d733e6363a59cacabb9ef5 - arm-trusted-firmware/plat/brcm/common/brcm_mhu.c
02ea7c4006c2910720bf4a85c3766c293d4cb8e5 - arm-trusted-firmware/plat/brcm/common/brcm_mhu.h
c02bbae941528cbae0665016d62e54bfffb74444 - arm-trusted-firmware/plat/brcm/common/brcm_bl2_setup.c
bc616aa281d726780f6a73b3986accbe986e780f - arm-trusted-firmware/plat/brcm/common/brcm_bl2_mem_params_desc.c
9b8db7387e47af68fc183fe909d3060d65438cb2 - arm-trusted-firmware/plat/brcm/common/brcm_io_storage.c
43088754fcc9a1fcbb6308988d79eca0c2771d5a - arm-trusted-firmware/plat/brcm/common/brcm_ccn.c
389238486613bb86c6032f788a4605c782e7475c - arm-trusted-firmware/plat/brcm/common/brcm_gicv3.c
d083c67e189d3cd3712a827a23e28d0aaf2964d1 - arm-trusted-firmware/plat/brcm/common/brcm_bl31_setup.c
303c81103a6ebbdf9e4afc16b17d17195a5b9238 - arm-trusted-firmware/plat/brcm/common/brcm_scpi.h
6d6865834cfc5ce82506bf1ef6df2e3cb196e028 - arm-trusted-firmware/plat/brcm/common/brcm_scpi.c
48faf64df1848d8493a3f273494ea883a4aafb0c - arm-trusted-firmware/plat/brcm/common/brcm_common.c
2ef6d891873792dd5af17cc1091f369c0865c70d - arm-trusted-firmware/plat/brcm/common/brcm_image_load.c
1dea9a2af71a56fe60929b854a2c73220603d2be - arm-trusted-firmware/plat/brcm/board/stingray/include/timer_sync.h
2817bede11ad2da4d5612a155f5a76e30b62de62 - arm-trusted-firmware/plat/brcm/board/stingray/include/paxc.h
2c4acf78dfd7c25c281471b6717273ff7920fea8 - arm-trusted-firmware/plat/brcm/board/stingray/include/ncsi.h
4bc4735b9e7c2a5eab8ae91a28d110dd24a42d75 - arm-trusted-firmware/plat/brcm/board/stingray/include/sdio.h
2ef5c016a1130291e30fb58c1e1b397bb15a531c - arm-trusted-firmware/plat/brcm/board/stingray/include/platform_sotp.h
1e67ee0873eb29816b418096b514d39c3aeb7d27 - arm-trusted-firmware/plat/brcm/board/stingray/include/swreg.h
cc26d153c04427651e12bf00d19497e5bd8cb7a3 - arm-trusted-firmware/plat/brcm/board/stingray/include/platform_usb.h
a6bea74c09e847241ba6a156aff89b12670cc98b - arm-trusted-firmware/plat/brcm/board/stingray/include/scp_cmd.h
d823df9c59408673229302e557a65ad1c404e047 - arm-trusted-firmware/plat/brcm/board/stingray/include/platform_def.h
bbaec5f331d8cf8f24898a8d172190c5f7940b6a - arm-trusted-firmware/plat/brcm/board/stingray/include/ihost_pm.h
90c98d478915f89433c419b06613a52965aeeef6 - arm-trusted-firmware/plat/brcm/board/stingray/include/sr_utils.h
bd25c5d9d7605649bc1d1dee9a734ccb130101c3 - arm-trusted-firmware/plat/brcm/board/stingray/include/fsx.h
10104d7d5d9eeeb545dea9ac306deb2c5cf46036 - arm-trusted-firmware/plat/brcm/board/stingray/include/plat_macros.S
0228e24fbe8ff775ac7a709f272d375a8e7aa3bf - arm-trusted-firmware/plat/brcm/board/stingray/include/scp_utils.h
eeabf0e8e4cda99b503b2ea41298aff2d87e1278 - arm-trusted-firmware/plat/brcm/board/stingray/include/ddr_init.h
8c57e437d9f4b2b49f005f899624af9b47121102 - arm-trusted-firmware/plat/brcm/board/stingray/include/crmu_def.h
0ef862af40a95d70feda6b8367e6e7452e90099b - arm-trusted-firmware/plat/brcm/board/stingray/include/board_info.h
b0a1c672d4d7095f6e7ec5305e084cb3a29a790e - arm-trusted-firmware/plat/brcm/board/stingray/include/bl33_info.h
76dbcdb10f12f01d94b3c70d2f8562b0cc8b233a - arm-trusted-firmware/plat/brcm/board/stingray/include/paxb.h
491a5116f054df365b530dc8b09613f1178c2d8a - arm-trusted-firmware/plat/brcm/board/stingray/include/sr_def.h
9765542d155d4fc37ee167eda672c6a33030ca8c - arm-trusted-firmware/plat/brcm/board/stingray/include/iommu.h
e7629876236e444ee69e40c96440f3f24b16fefe - arm-trusted-firmware/plat/brcm/board/stingray/include/usb_phy.h
d15b82eea2aaa023805036e829ee46cd08ea72ed - arm-trusted-firmware/plat/brcm/board/stingray/src/iommu.c
52a5e5247c12940390abe486ab490a1d8929feb4 - arm-trusted-firmware/plat/brcm/board/stingray/src/paxb.c
0283858faf5651d4db16f0e4b8bcaadd40bcabe1 - arm-trusted-firmware/plat/brcm/board/stingray/src/scp_cmd.c
f89deabe82fe9129f1dde3fb24e57c940e008913 - arm-trusted-firmware/plat/brcm/board/stingray/src/bl2_setup.c
c01d8b9f9c48a1185129c492ab1f8ce1134ed892 - arm-trusted-firmware/plat/brcm/board/stingray/src/scp_utils.c
e9f5650def0bf0c03c50ad69056cf6ff9d71a715 - arm-trusted-firmware/plat/brcm/board/stingray/src/tz_sec.c
78d2915d5c3a6c4b75eb97c897cd4e58b4d5b962 - arm-trusted-firmware/plat/brcm/board/stingray/src/topology.c
085cb8e4f6dd01efc01f633680e7db315718c304 - arm-trusted-firmware/plat/brcm/board/stingray/src/ihost_pm.c
062b1d173f23bc015ebb5c790f890e5f2a6934e1 - arm-trusted-firmware/plat/brcm/board/stingray/src/paxc.c
1fd2e7122a0c63a14a64215ae5750097f050841b - arm-trusted-firmware/plat/brcm/board/stingray/src/brcm_pm_ops.c
9b0afdae90ec3159bd428d4b9f586d84a0cb55b3 - arm-trusted-firmware/plat/brcm/board/stingray/src/sdio.c
d746f7070f366ac250b3766606d2de76a6192436 - arm-trusted-firmware/plat/brcm/board/stingray/src/fsx.c
77916c4c9e55da373b1b66dba19dfed0034cde48 - arm-trusted-firmware/plat/brcm/board/stingray/src/bl31_setup.c
863c6f32899af28cd9a60fb273bdc02a29100114 - arm-trusted-firmware/plat/brcm/board/stingray/src/sr_paxb_phy.c
75de08bf7cc548fc88463a459efa719ce9dae276 - arm-trusted-firmware/plat/brcm/board/stingray/src/pm.c
072e5bc5c72a860c50c3413898b60dd18931b100 - arm-trusted-firmware/plat/brcm/board/stingray/src/ncsi.c
1071f5589a11aaf7354868d034e149b27d48adc6 - arm-trusted-firmware/plat/brcm/board/stingray/driver/swreg.c
13bbb4dc261e840997a59d4e914f071835d33fab - arm-trusted-firmware/plat/brcm/board/stingray/driver/usb_phy.c
7cc68c731d1d4e967a6b258c94afef74800e2c27 - arm-trusted-firmware/plat/brcm/board/stingray/driver/usb.c
b4637f982a40118b9d83d3908d0b189d3524bce0 - arm-trusted-firmware/plat/brcm/board/stingray/driver/plat_emmc.c
483849480279e54ca28e4177fea05d6bd3cd36d7 - arm-trusted-firmware/plat/brcm/board/stingray/driver/ihost_pll_config.c
4573848f39ea4bfceb55e0932f0494af8b890d1d - arm-trusted-firmware/plat/brcm/board/stingray/driver/sr_usb.h
eed068af90592502021f8e15b556ae302cd8db87 - arm-trusted-firmware/plat/brcm/board/stingray/driver/ddr/soc/include/board_family.h
d0dacd8fc79f78cee10bd8513550abf93624afe2 - arm-trusted-firmware/plat/brcm/board/stingray/driver/ext_sram_init/ext_sram_init.c
46e832c20411ea4d2bcbcf1cc8968149375047f4 - arm-trusted-firmware/plat/brcm/board/stingray/driver/ext_sram_init/ext_sram_init.h
ac2b64132debec3b54ae614c64dac69067b39291 - arm-trusted-firmware/plat/brcm/board/stingray/aarch64/plat_helpers.S
9635661f5e56e9ab172dcec943257465bf36e634 - arm-trusted-firmware/plat/brcm/board/common/bcm_elog.c
e1b5c755e9973d3e41e6f8dd620990a0dd5ba5e6 - arm-trusted-firmware/plat/brcm/board/common/cmn_plat_def.h
9eda9f547bdfb6e83ef3c8d82d849e1e4cb68252 - arm-trusted-firmware/plat/brcm/board/common/brcm_mbedtls.c
5f45cc70d813bf16880f4f1f4a246ad6114fbb78 - arm-trusted-firmware/plat/brcm/board/common/cmn_plat_util.h
eca89f1edcb0c3fc702ac123a55821cde16106bb - arm-trusted-firmware/plat/brcm/board/common/err.c
2d3a08ac4729a455bffd5c4c70365350fec69e23 - arm-trusted-firmware/plat/brcm/board/common/bcm_elog_ddr.h
dfc2e7fae9dd66b664758412e1f4c06762246ed6 - arm-trusted-firmware/plat/brcm/board/common/cmn_sec.c
2cf7d5accbb22d89a3c89c768604f667a23bef52 - arm-trusted-firmware/plat/brcm/board/common/sbl_util.h
500e36754a0240001fe7b400bf8d4806a06de6ee - arm-trusted-firmware/plat/brcm/board/common/timer_sync.c
c0ecc823e4de1814edd6bf48321b6317c448b16d - arm-trusted-firmware/plat/brcm/board/common/sbl_util.c
a731b4badf1cf5a90a0ab197b39a2723e4c85dd9 - arm-trusted-firmware/plat/brcm/board/common/platform_common.c
b2a5352558dc92001c80e614a9b293a1eb19573a - arm-trusted-firmware/plat/brcm/board/common/plat_setup.c
a794cd95a890c951acc5192426abc008b4213a8f - arm-trusted-firmware/plat/brcm/board/common/chip_id.h
801bb1cdab4baf3440ac23728e6190881af4264f - arm-trusted-firmware/plat/brcm/board/common/bcm_elog_ddr.c
c124ba5ec6d9fc3e8f1f0b72d3852473ab67e998 - arm-trusted-firmware/plat/brcm/board/common/board_common.c
515e3aecc5237dcc8197e4e8ed7fd7d15765d808 - arm-trusted-firmware/plat/brcm/board/common/bcm_console.c
eeff346a4c2b6893ad0fa417570e747058627c11 - arm-trusted-firmware/plat/brcm/board/common/cmn_sec.h
779be799404c9562032c8c586f3a3b23835ad722 - arm-trusted-firmware/plat/brcm/board/common/board_arm_trusted_boot.c
d2d1fd0fffc8a200fd42f1b74c8c7d54c483f219 - arm-trusted-firmware/plat/rpi/common/rpi3_trusted_boot.c
41feb9d914df818ac88209ee1569e1701d794248 - arm-trusted-firmware/plat/rpi/common/rpi3_common.c
854bc00d3c5fce60726920c1e5b1b7cd9352568a - arm-trusted-firmware/plat/rpi/common/rpi3_io_storage.c
e7c5c53de7054042af3cf0941787805fcbbc77fd - arm-trusted-firmware/plat/rpi/common/rpi3_pm.c
11c87bf8a084123bf9a431cc289a66e23112bade - arm-trusted-firmware/plat/rpi/common/rpi3_rotpk.S
46c13e3cff3d9c29a733d01629589bd31b37eb5e - arm-trusted-firmware/plat/rpi/common/rpi3_stack_protector.c
e621f46501a2d1856f297145947d1c8d89d5f990 - arm-trusted-firmware/plat/rpi/common/rpi3_image_load.c
dc79372e77a81c53ff2886832f206db2f63873b7 - arm-trusted-firmware/plat/rpi/common/rpi3_topology.c
c3a79cfd4e400e0a2dfa7ee5e27e50f1bcd8464b - arm-trusted-firmware/plat/rpi/common/include/rpi_shared.h
d2456dd752e5376ca6049639fe93ef04bd5aa04f - arm-trusted-firmware/plat/rpi/common/aarch64/plat_helpers.S
20b2e08539e950f86d86538ed688408f90574454 - arm-trusted-firmware/plat/rpi/rpi3/rpi3_bl2_setup.c
052815ff6a9d47f47e57d320313a74f10c8a34d3 - arm-trusted-firmware/plat/rpi/rpi3/rpi3_bl31_setup.c
fd5000ab9d2eac8341e267b879e1ef29eaebf5d7 - arm-trusted-firmware/plat/rpi/rpi3/rpi_mbox_board.c
d9b070fbdda2cab75cc45e6dddd9a31f84baf594 - arm-trusted-firmware/plat/rpi/rpi3/rpi3_bl1_setup.c
94001fd4bfa1b8e08f4d51f437c7b006362f24fd - arm-trusted-firmware/plat/rpi/rpi3/include/rpi_hw.h
7aeb3415e697151619997c1c184f380eb310be78 - arm-trusted-firmware/plat/rpi/rpi3/include/platform_def.h
64987d2484ce3d48cc4431fee2de9e375235bb5a - arm-trusted-firmware/plat/rpi/rpi3/include/plat_macros.S
5a79ec05194636d3850044f358b4673a3f0b9fa0 - arm-trusted-firmware/plat/rpi/rpi3/aarch64/rpi3_bl2_mem_params_desc.c
54eb696ef592336053f52bc556f47122b4e94fdc - arm-trusted-firmware/plat/rpi/rpi4/rpi4_pci_svc.c
793e163b5e60486c53f3ff36c98ab1c8f144a1bd - arm-trusted-firmware/plat/rpi/rpi4/rpi4_bl31_setup.c
e2412e3cbdcc8daaecfab85f295ee3456cf1f98d - arm-trusted-firmware/plat/rpi/rpi4/include/rpi_hw.h
6a73f5496572d65332bbf4a50c3c9d4faa9af438 - arm-trusted-firmware/plat/rpi/rpi4/include/platform_def.h
b1c50f058d68ea165b6dd5f45af97d2b1dd33e64 - arm-trusted-firmware/plat/rpi/rpi4/include/plat_macros.S
4d8d91a23a19a15ff7c18f8e6e523c26cd453f2f - arm-trusted-firmware/plat/rpi/rpi4/include/plat.ld.S
5e76d520f8ea85f6710a605e2c9a4db0d1a66640 - arm-trusted-firmware/plat/rpi/rpi4/aarch64/armstub8_header.S
eaa5486b6bf2e6ae1fa166ea8faf069982cafc3e - arm-trusted-firmware/plat/st/common/stm32mp_common.c
c0fcb84a94921b5ff081822dea1f4054a0733389 - arm-trusted-firmware/plat/st/common/stm32cubeprogrammer_usb.c
04e1f5b8785d5e9cc7a97feca82d6cc1ecbefe14 - arm-trusted-firmware/plat/st/common/stm32cubeprogrammer_uart.c
74fbe0f984451420cfc011a7d13cc3b0fc5f6336 - arm-trusted-firmware/plat/st/common/stm32mp_fconf_io.c
e87c6273c39e0415537fb0bc256a937bc1f48bbc - arm-trusted-firmware/plat/st/common/bl2_io_storage.c
39406ac1da20e5a2872807c5677512999c03c4d9 - arm-trusted-firmware/plat/st/common/stm32mp_trusted_boot.c
3844d67d29936a57d4c37fb4ffdd41d212121420 - arm-trusted-firmware/plat/st/common/stm32mp_dt.c
a055271fe9c247011994ab1513d2fd32c6d82009 - arm-trusted-firmware/plat/st/common/stm32mp_crypto_lib.c
356f823bccc7081e026233c6fb511c0602208101 - arm-trusted-firmware/plat/st/common/usb_dfu.c
a48402444da4bcb7bce60d2e3f9972f07bebc8a4 - arm-trusted-firmware/plat/st/common/include/stm32mp_dt.h
8bb1550cf77c8680e05ba46ad44ab77ff26bb8f3 - arm-trusted-firmware/plat/st/common/include/usb_dfu.h
b270dbb723f5c002dbf393eb752ccb946afc5baf - arm-trusted-firmware/plat/st/common/include/stm32mp_shared_resources.h
4ca9fb0296b649411cecd45263ecadb41540d6e4 - arm-trusted-firmware/plat/st/common/include/stm32mp_fconf_getter.h
a36884221e8b5d12d086eaf6864ac84cddb76454 - arm-trusted-firmware/plat/st/common/include/stm32mp_common.h
1125720a4a5573b7f8197d2dabdf308f51407896 - arm-trusted-firmware/plat/st/common/include/stm32mp_efi.h
dd7ae18098736e737a0482a59de65f64d5edd503 - arm-trusted-firmware/plat/st/common/include/stm32cubeprogrammer.h
8f929216bedbfc6324814103b9ff902713ed14cf - arm-trusted-firmware/plat/st/common/include/stm32mp_io_storage.h
5219346badc88996294b1e6304843c005a6bc3e2 - arm-trusted-firmware/plat/st/stm32mp1/stm32mp1_tbb_cert.c
24a80504eaab8e742fc6d02a0234cd3712d28e30 - arm-trusted-firmware/plat/st/stm32mp1/plat_def_uuid_config.c
43753b990fdb953ffc38ef29474ef4af453444b7 - arm-trusted-firmware/plat/st/stm32mp1/stm32mp1_stack_protector.c
008b02c65cede29f0ab582356d6d4400ace3914b - arm-trusted-firmware/plat/st/stm32mp1/stm32mp1_private.c
58a5d9c283fcb21c6328e65dda44190d07fe6bb2 - arm-trusted-firmware/plat/st/stm32mp1/stm32mp1_syscfg.c
155e11b39243b6257695dfe51258e330e378e1b8 - arm-trusted-firmware/plat/st/stm32mp1/plat_bl2_mem_params_desc.c
7b00ed042c247bac94b4766cb42dddc0e21764fc - arm-trusted-firmware/plat/st/stm32mp1/stm32mp1_scmi.c
0f0baced38fb65393cd300bdc024b68e707f5f4b - arm-trusted-firmware/plat/st/stm32mp1/stm32mp1_topology.c
f171c1cd88d3ea2070a747ca519f7d6b9e8257f5 - arm-trusted-firmware/plat/st/stm32mp1/stm32mp1_usb_dfu.c
d3e90d44407a4707ef8edd3a8bf03d39015f4b3d - arm-trusted-firmware/plat/st/stm32mp1/stm32mp1_def.h
b900c2f6ef836a0f77c00c851815a09220d8c5e3 - arm-trusted-firmware/plat/st/stm32mp1/stm32mp1_fconf_firewall.c
355c64575394ac01f1861e0f9e3a5787e66fa3ed - arm-trusted-firmware/plat/st/stm32mp1/plat_image_load.c
494b344c5c893bd8e9e3ab32c16acc57ebd39f73 - arm-trusted-firmware/plat/st/stm32mp1/stm32mp1_boot_device.c
77c94644e0ef95316e08e0a339fb16a856ae5d97 - arm-trusted-firmware/plat/st/stm32mp1/stm32mp1_dbgmcu.c
168a3e80fa38489428f2b6ee242c480adee12b73 - arm-trusted-firmware/plat/st/stm32mp1/stm32mp1.ld.S
3139c2b0c93ae17696224f59b5486f65e1649dc7 - arm-trusted-firmware/plat/st/stm32mp1/stm32mp1_gic.c
ab223932eb6ce18395dd58bd90e047532d3644c8 - arm-trusted-firmware/plat/st/stm32mp1/stm32mp1_fip_def.h
4768b03bc74bbab9e5cff7a9d7dbd20e4f25decb - arm-trusted-firmware/plat/st/stm32mp1/stm32mp1_pm.c
d5b0e2699695505579def8552759c7d668a0b3eb - arm-trusted-firmware/plat/st/stm32mp1/stm32mp1.S
e9bf2a255a3615d1939e4f6d7ac9ef0b19052a2b - arm-trusted-firmware/plat/st/stm32mp1/stm32mp1_helper.S
ec9fe0a8eec79fee1d3dd34bf1a969b8f0b93f4a - arm-trusted-firmware/plat/st/stm32mp1/stm32mp1_shared_resources.c
9f1c3deb238c6eec4aa10af2edf07f90deb8f5ba - arm-trusted-firmware/plat/st/stm32mp1/bl2_plat_setup.c
d3b6a6e439aa3550128eac0599ad9ac7024c43a4 - arm-trusted-firmware/plat/st/stm32mp1/sp_min/sp_min_setup.c
8386333a75dca31e05ab9b598b8dd745d166e129 - arm-trusted-firmware/plat/st/stm32mp1/include/plat_def_fip_uuid.h
c8836682d54efbf71217e171f7181151c66fca07 - arm-trusted-firmware/plat/st/stm32mp1/include/stm32mp1_mbedtls_config.h
08483c5e8b122913b20ea045dbb185897d5bccf1 - arm-trusted-firmware/plat/st/stm32mp1/include/plat_tbbr_img_def.h
037c15f669a9751a6f762da3b2951007624902ef - arm-trusted-firmware/plat/st/stm32mp1/include/platform_def.h
7eaf59b974175885a0dfccf0b42c774580444f92 - arm-trusted-firmware/plat/st/stm32mp1/include/stm32mp1_smc.h
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19471da73d6d6e0316b89091e8034b65252676ea - arm-trusted-firmware/plat/hisilicon/hikey960/hikey960_bl1_setup.c
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0f1a35cf03c46fa57303de1b14fd3ec9d83d2e72 - arm-trusted-firmware/plat/hisilicon/hikey960/hikey960_bl2_setup.c
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930c77f84c5ef2c7971e52015e58fd9c314fbba5 - arm-trusted-firmware/plat/hisilicon/hikey960/include/plat_macros.S
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1dc25162c504805b378176ceb2a1fac39b8fa3e2 - arm-trusted-firmware/plat/hisilicon/hikey/hikey_ddr.c
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be822c3b60a3f8f4215925d9c6aa8ff3d90ab56b - arm-trusted-firmware/plat/rockchip/px30/include/plat.ld.S
80988c6b4c1d5c128f556b4704d2a13dca1b94ac - arm-trusted-firmware/plat/rockchip/rk3399/plat_sip_calls.c
07fcff2e4785739f2818730be2df2798395d6dd0 - arm-trusted-firmware/plat/rockchip/rk3399/rk3399_def.h
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8080df60a96f3ccb59e64a8c4468c29298a40160 - arm-trusted-firmware/plat/rockchip/rk3399/drivers/pmu/m0_ctl.c
a203f9155033bc4a154799d63ebe669baadb7c82 - arm-trusted-firmware/plat/rockchip/rk3399/drivers/pmu/pmu_fw.c
26f96f6bfc5d8cd2811341eaa144693019daa5cf - arm-trusted-firmware/plat/rockchip/rk3399/drivers/pmu/pmu.h
4f34aa4fe829a116338b7c8cb363091b98b1df1c - arm-trusted-firmware/plat/rockchip/rk3399/drivers/pmu/plat_pmu_macros.S
21c19d18b927a98e453d2dd32fa075e1556c8d10 - arm-trusted-firmware/plat/rockchip/rk3399/drivers/pmu/pmu.c
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91fa17de464bf17060f5d782d3addc2d250f2bcf - arm-trusted-firmware/plat/rockchip/rk3399/drivers/dram/dfs.h
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455f3ca45423a7d3a17a25fa9a199ee6f33accdf - arm-trusted-firmware/plat/rockchip/rk3399/drivers/dram/suspend.c
341cf7780e76c0eed9bb587ced84821148eaeba4 - arm-trusted-firmware/plat/rockchip/rk3399/drivers/dram/dram_spec_timing.c
cc96ce897ce3dfd398d571f73d60df020e312a7f - arm-trusted-firmware/plat/rockchip/rk3399/drivers/dram/dram.h
1a0ef7b5013eea98c8892cc73f9acf7aadc6542b - arm-trusted-firmware/plat/rockchip/rk3399/drivers/dram/dram.c
8bb28c62f323cba1149703071fa6c9cd723e7681 - arm-trusted-firmware/plat/rockchip/rk3399/drivers/dram/suspend.h
fde45271c5e9a03975a13a19aa58f7ce1627247b - arm-trusted-firmware/plat/rockchip/rk3399/drivers/dram/dfs.c
2f72933afb37b859ea9a98d233ab11f81301c9db - arm-trusted-firmware/plat/rockchip/rk3399/drivers/m0/Makefile
98a096aced18ab4c9a4b3ab325773ed273acd4cd - arm-trusted-firmware/plat/rockchip/rk3399/drivers/m0/include/addressmap.h
222366fd88fa37c34896b96be4724020febaf122 - arm-trusted-firmware/plat/rockchip/rk3399/drivers/m0/include/rk3399_mcu.h
249a2bba707f4aae60e76e4d2ca07180426f3657 - arm-trusted-firmware/plat/rockchip/rk3399/drivers/m0/src/stopwatch.c
c651d2e10f915a285792aa7e66836e66a3fb3b68 - arm-trusted-firmware/plat/rockchip/rk3399/drivers/m0/src/startup.c
15ccafa1fb201c2bdc50eb32beb4d9331e95424b - arm-trusted-firmware/plat/rockchip/rk3399/drivers/m0/src/suspend.c
9cfa6b80558dac90724c830c7c2b792099232962 - arm-trusted-firmware/plat/rockchip/rk3399/drivers/m0/src/rk3399m0.ld.S
3832f35bf0192ab6299ed6f72d97ea798c64ec01 - arm-trusted-firmware/plat/rockchip/rk3399/drivers/m0/src/dram.c
34cef331645617d77f27ee050065b2678b021605 - arm-trusted-firmware/plat/rockchip/rk3399/drivers/secure/secure.h
12d0e498bcf7645b6d17eda0b6c88f9c68345720 - arm-trusted-firmware/plat/rockchip/rk3399/drivers/secure/secure.c
8af098c906ff4222b7fb1b8a8e528a842931e11a - arm-trusted-firmware/plat/rockchip/rk3399/drivers/dp/cdn_dp.c
e4ba052fe71c1dbb0fd712a9e23751995fa17236 - arm-trusted-firmware/plat/rockchip/rk3399/drivers/dp/hdcp.bin
0e0164a1fd25ccd71404f643551fc197b6d3545f - arm-trusted-firmware/plat/rockchip/rk3399/drivers/dp/cdn_dp.h
1761d34cf2fa35e5eaf8e4707cde5f3fec7345ce - arm-trusted-firmware/plat/rockchip/rk3399/drivers/gpio/rk3399_gpio.c
912b3ac53149ee0912cdc571503cbe6f5d9e5e31 - arm-trusted-firmware/plat/rockchip/rk3399/drivers/pwm/pwm.h
81bb90565c30ebb1d2a2074e665099c5df4b3f16 - arm-trusted-firmware/plat/rockchip/rk3399/drivers/pwm/pwm.c
0454e2aefd623a64760090a825f3cb0c26b0a3ca - arm-trusted-firmware/plat/rockchip/rk3399/include/plat_sip_calls.h
735db5fedc39c83875dd50d345431e840a75ce95 - arm-trusted-firmware/plat/rockchip/rk3399/include/addressmap.h
d037385198294976c392eaac15722c2bc43171e6 - arm-trusted-firmware/plat/rockchip/rk3399/include/platform_def.h
33691c33d59c3cbf5321efb5e9cf1ce6f908b1b3 - arm-trusted-firmware/plat/rockchip/rk3399/include/plat.ld.S
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e27f9ab0eb7cc700bac4af81ef063675ddea3d16 - arm-trusted-firmware/plat/rockchip/rk3399/include/shared/pmu_regs.h
dffb716056a5cfe4289bde5769bacd0a9c517467 - arm-trusted-firmware/plat/rockchip/rk3399/include/shared/bl31_param.h
a3ec096942a7038a658d2de2da28c8d7772e2601 - arm-trusted-firmware/plat/rockchip/rk3399/include/shared/pmu_bits.h
d3a8c566b07530d947493f642a829c2173e7eb3c - arm-trusted-firmware/plat/rockchip/rk3399/include/shared/addressmap_shared.h
37de06dae36b2c9133dfa3db58b9403eca97534e - arm-trusted-firmware/plat/rockchip/rk3399/include/shared/m0_param.h
514bb50a35bc277734414a501833d9cf9103b613 - arm-trusted-firmware/plat/rockchip/rk3399/include/shared/misc_regs.h
9eb41f0b086d93dd52f10cd88c871e9f872da485 - arm-trusted-firmware/plat/rockchip/rk3328/rk3328_def.h
75d3fb351c1418d28d1be951921dde7cac623d53 - arm-trusted-firmware/plat/rockchip/rk3328/drivers/pmu/pmu.h
74e69a5d06c7c10f8fd04052bfd92c89a6b685c2 - arm-trusted-firmware/plat/rockchip/rk3328/drivers/pmu/plat_pmu_macros.S
d6fb6002e2f08bc736d1fbcfef5f7d518331e24a - arm-trusted-firmware/plat/rockchip/rk3328/drivers/pmu/pmu.c
888b9ca7b2dca798b061df341269bb1bf0cdc6a2 - arm-trusted-firmware/plat/rockchip/rk3328/drivers/soc/soc.h
aa37703bdb16d2d93c4cb6a1c3f5740f10400717 - arm-trusted-firmware/plat/rockchip/rk3328/drivers/soc/soc.c
d0cf327dcd15f8fc85f2c3c93e82fd6199973f0b - arm-trusted-firmware/plat/rockchip/rk3328/include/platform_def.h
c03dbe37ab69ed71bbbc9100b47ff77d3c1f19e9 - arm-trusted-firmware/plat/rockchip/rk3328/include/plat.ld.S
d4e968db5e699bc36032dfe35d7fada27142c699 - arm-trusted-firmware/plat/imx/imx7/include/imx_hab_arch.h
1027e5173d316fd6d9dd6588b9666b53ed9d1116 - arm-trusted-firmware/plat/imx/imx7/include/imx_regs.h
10003f2e608d5073c076ab1a446f4ba07c06086d - arm-trusted-firmware/plat/imx/imx7/include/imx7_def.h
81ea2015e04bbc53b7d42589a21821a183fc1c8a - arm-trusted-firmware/plat/imx/imx7/common/imx7_bl2_el3_common.c
bffe5bd7851f8d028c92d9d68dba7806be5bd662 - arm-trusted-firmware/plat/imx/imx7/common/imx7_image_load.c
3bba3282b340c9896990c2ffcbf10d5bfb0070b2 - arm-trusted-firmware/plat/imx/imx7/common/imx7_rotpk.S
7b5d73ec9d9c7e14fd48653c6e018d432654101d - arm-trusted-firmware/plat/imx/imx7/common/imx7_bl2_mem_params_desc.c
8403135be33e11a4b696e90b5b253465b6838682 - arm-trusted-firmware/plat/imx/imx7/common/imx7_helpers.S
4d406209e8b278e9730968baee57f5106d424aef - arm-trusted-firmware/plat/imx/imx7/common/imx7_trusted_boot.c
1e1f92bc6f801c91fde3bbe4ce99b62beb0eb7d2 - arm-trusted-firmware/plat/imx/imx7/warp7/warp7_bl2_el3_setup.c
42143dbacac34a118b7b86673774e843e7e84fd8 - arm-trusted-firmware/plat/imx/imx7/warp7/include/platform_def.h
1e876f487cd25f4a6cd08d0a21926f5405676a07 - arm-trusted-firmware/plat/imx/imx7/picopi/picopi_bl2_el3_setup.c
1b13f9e313e75353b45d6528629485488b180345 - arm-trusted-firmware/plat/imx/imx7/picopi/include/platform_def.h
7bd8d4e39f1f3905630b08a16be851097fa5ab67 - arm-trusted-firmware/plat/imx/imx8m/imx_rdc.c
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6253f7542bd4e5a6244779068845d717f8eca3f6 - arm-trusted-firmware/plat/imx/imx8m/imx8m_measured_boot.c
20f064bee50b84b4f3ec957cd09aad9e647b84f1 - arm-trusted-firmware/plat/imx/imx8m/imx8m_psci_common.c
6db7c9804f412b76babb45883d6ae2cf83dbd139 - arm-trusted-firmware/plat/imx/imx8m/gpc_common.c
1ccbc8b82968361279d02b4c1cf10c91215a3e19 - arm-trusted-firmware/plat/imx/imx8m/imx8m_caam.c
10fb6753c1ece21522f45f372d0cbf3b416b5190 - arm-trusted-firmware/plat/imx/imx8m/imx_aipstz.c
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996e00079997c54373e5acb4a6f39bfe8cbe346e - arm-trusted-firmware/plat/imx/imx8m/imx8m_image_load.c
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439ff0fd34804282a6c62a21bf3c37d6d6def362 - arm-trusted-firmware/plat/imx/imx8m/ddr/dram.c
138a9f0052b0bf51298edd4844ee390e9930d174 - arm-trusted-firmware/plat/imx/imx8m/ddr/dram_retention.c
1bba6b6b8117430fecdbc1fd53e0cc854e41705b - arm-trusted-firmware/plat/imx/imx8m/ddr/clock.c
0efee336c964d1973fec201980455aee08396081 - arm-trusted-firmware/plat/imx/imx8m/imx8mp/imx8mp_trusted_boot.c
9a2fbd0bf6a37c0a14dc2fceacbca9de09cd6731 - arm-trusted-firmware/plat/imx/imx8m/imx8mp/imx8mp_bl31_setup.c
169ab98f3d4cd7620ffef0d78f7c2329be9c1586 - arm-trusted-firmware/plat/imx/imx8m/imx8mp/imx8mp_psci.c
4fe2987f9c2e076b0f22ddae51289cc8c0194a9e - arm-trusted-firmware/plat/imx/imx8m/imx8mp/gpc.c
97a556f1fc780240a2ad81127c295bd39a0c6512 - arm-trusted-firmware/plat/imx/imx8m/imx8mp/imx8mp_rotpk.S
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423539360c2f1638f2f1606b67eabf4533b0acd4 - arm-trusted-firmware/plat/imx/imx8m/imx8mq/gpc.c
64914d9666ef5bb8c8063dd32aaf9fbc8f83703e - arm-trusted-firmware/plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c
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33992acf1aa341055320009de8bd607d2ba2c8d7 - arm-trusted-firmware/plat/imx/imx8m/imx8mq/include/platform_def.h
060756d07ff95fa2e15ef2cab742c6f6fdfdc5e3 - arm-trusted-firmware/plat/imx/imx8m/imx8mm/imx8mm_rotpk.S
f9007785b7de40f327bd11a83c710c297b45e4ab - arm-trusted-firmware/plat/imx/imx8m/imx8mm/imx8mm_trusted_boot.c
ccad568808449da2db9bbf955065a017f9d4092c - arm-trusted-firmware/plat/imx/imx8m/imx8mm/gpc.c
3fcc366713e1667476479363fd2d0fb74144e491 - arm-trusted-firmware/plat/imx/imx8m/imx8mm/imx8mm_bl2_mem_params_desc.c
5e7971c14f77e2f2450badad4a156ca33a9eb89f - arm-trusted-firmware/plat/imx/imx8m/imx8mm/imx8mm_bl2_el3_setup.c
0e0933de6793e323f4c77e12a89455776a0dfe57 - arm-trusted-firmware/plat/imx/imx8m/imx8mm/imx8mm_psci.c
75a249b8b3a7fb6bbaa75ab69f98a6aa95e31d0c - arm-trusted-firmware/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c
4a704d5f5cc4958ad509fe9771d30d6632cb1a0a - arm-trusted-firmware/plat/imx/imx8m/imx8mm/include/gpc_reg.h
630860627b72fcc588880f6db00488e9e3493a24 - arm-trusted-firmware/plat/imx/imx8m/imx8mm/include/imx_sec_def.h
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556bc132ee9c3d6e9c409ca686544b48a2be227b - arm-trusted-firmware/plat/imx/imx8m/imx8mn/gpc.c
8e8f859c9cf8ff904fb614ad296e664a23674041 - arm-trusted-firmware/plat/imx/imx8m/imx8mn/imx8mn_bl31_setup.c
82259d3c2b7d974ad94a42c37f37e0a8f0ce576f - arm-trusted-firmware/plat/imx/imx8m/imx8mn/include/gpc_reg.h
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b26cdffd75a0ba04b4a312520443d0c77b388242 - arm-trusted-firmware/plat/imx/common/imx8_topology.c
da4b81f475ec53f2578ba031cd1f30f759bc5dde - arm-trusted-firmware/plat/imx/common/imx_snvs.c
9026b30dd1244e0fa2416dac0e9f2b92c11bc83e - arm-trusted-firmware/plat/imx/common/lpuart_console.S
c014188b6f4a48f9dc6d6fed678081f02f8d8e86 - arm-trusted-firmware/plat/imx/common/plat_imx8_gic.c
5225b741c941cba9f489d347aae2707d99896d7d - arm-trusted-firmware/plat/imx/common/imx_csu.c
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03ff82e03dc9eb60e02c6e23f0c199fdd1753c9c - arm-trusted-firmware/plat/imx/common/imx_aips.c
d93d2cf3c9aafc65833374f51376f03bc2387ecd - arm-trusted-firmware/plat/imx/common/imx_uart_console.S
6ac985911e7e26d13c75d48a04457fbcb209b62f - arm-trusted-firmware/plat/imx/common/imx_sdei.c
97029bcef11b7a8598834c9717cec7a5655b895a - arm-trusted-firmware/plat/imx/common/imx8_helpers.S
ac923dd7af0d3485eceae86115ea73150575ac4f - arm-trusted-firmware/plat/imx/common/imx_wdog.c
561b0822ac98206dceac588b536d745fc70829d9 - arm-trusted-firmware/plat/imx/common/imx_ehf.c
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Change-Id: Ibacfa2e40f438fdc2107c4979df3e5152074355a

arm-trusted-firmware/docs/process/code-review-guidelines.rst

@@ -0,0 +1,216 @@
+Code Review Guidelines
+======================
+
+This document provides TF-A specific details about the project's code review
+process. It should be read in conjunction with the `Project Maintenance
+Process`_, which it supplements.
+
+
+Why do we do code reviews?
+--------------------------
+
+The main goal of code reviews is to improve the code quality. By reviewing each
+other's code, we can help catch issues that were missed by the author
+before they are integrated in the source tree. Different people bring different
+perspectives, depending on their past work, experiences and their current use
+cases of TF-A in their products.
+
+Code reviews also play a key role in sharing knowledge within the
+community. People with more expertise in one area of the code base can
+help those that are less familiar with it.
+
+Code reviews are meant to benefit everyone through team work. It is not about
+unfairly criticizing or belittling the work of any contributor.
+
+
+Good practices
+--------------
+
+To ensure the code review gives the greatest possible benefit, participants in
+the project should:
+
+-  Be considerate of other people and their needs. Participants may be working
+   to different timescales, and have different priorities. Keep this in
+   mind - be gracious while waiting for action from others, and timely in your
+   actions when others are waiting for you.
+
+-  Review other people's patches where possible. The more active reviewers there
+   are, the more quickly new patches can be reviewed and merged. Contributing to
+   code review helps everyone in the long run, as it creates a culture of
+   participation which serves everyone's interests.
+
+
+Guidelines for patch contributors
+---------------------------------
+
+In addition to the rules outlined in the :ref:`Contributor's Guide`, as a patch
+contributor you are expected to:
+
+-  Answer all comments from people who took the time to review your
+   patches.
+
+-  Be patient and resilient. It is quite common for patches to go through
+   several rounds of reviews and rework before they get approved, especially
+   for larger features.
+
+   In the event that a code review takes longer than you would hope for, you
+   may try the following actions to speed it up:
+
+  -  Ping the reviewers on Gerrit or on the mailing list. If it is urgent,
+     explain why. Please remain courteous and do not abuse this.
+
+  -  If one code owner has become unresponsive, ask the other code owners for
+     help progressing the patch.
+
+  -  If there is only one code owner and they have become unresponsive, ask one
+     of the project maintainers for help.
+
+-  Do the right thing for the project, not the fastest thing to get code merged.
+
+   For example, if some existing piece of code - say a driver - does not quite
+   meet your exact needs, go the extra mile and extend the code with the missing
+   functionality you require - as opposed to copying the code into some other
+   directory to have the freedom to change it in any way. This way, your changes
+   benefit everyone and will be maintained over time.
+
+
+Guidelines for all reviewers
+----------------------------
+
+There are no good or bad review comments. If you have any doubt about a patch or
+need some clarifications, it's better to ask rather than letting a potential
+issue slip. Examples of review comments could be:
+
+- Questions ("Why do you need to do this?", "What if X happens?")
+- Bugs ("I think you need a logical \|\| rather than a bitwise \|.")
+- Design issues ("This won't scale well when we introduce feature X.")
+- Improvements ("Would it be better if we did Y instead?")
+
+
+Guidelines for code owners
+--------------------------
+
+Code owners are listed on the :ref:`Project Maintenance<code owners>` page,
+along with the module(s) they look after.
+
+When reviewing a patch, code owners are expected to check the following:
+
+-  The patch looks good from a technical point of view. For example:
+
+  -  The structure of the code is clear.
+
+  -  It complies with the relevant standards or technical documentation (where
+     applicable).
+
+  -  It leverages existing interfaces rather than introducing new ones
+     unnecessarily.
+
+  -  It fits well in the design of the module.
+
+  -  It adheres to the security model of the project. In particular, it does not
+     increase the attack surface (e.g. new SMCs) without justification.
+
+-  The patch adheres to the TF-A :ref:`Coding Style`. The CI system should help
+   catch coding style violations.
+
+-  (Only applicable to generic code) The code is MISRA-compliant (see
+   :ref:`misra-compliance`). The CI system should help catch violations.
+
+-  Documentation is provided/updated (where applicable).
+
+-  The patch has had an appropriate level of testing. Testing details are
+   expected to be provided by the patch author. If they are not, do not hesitate
+   to request this information.
+
+-  All CI automated tests pass.
+
+If a code owner is happy with a patch, they should give their approval
+through the ``Code-Owner-Review+1`` label in Gerrit. If instead, they have
+concerns, questions, or any other type of blocking comment, they should set
+``Code-Owner-Review-1``.
+
+Code owners are expected to behave professionally and responsibly. Here are some
+guidelines for them:
+
+-  Once you are engaged in a review, make sure you stay involved until the patch
+   is merged. Rejecting a patch and going away is not very helpful. You are
+   expected to monitor the patch author's answers to your review comments,
+   answer back if needed and review new revisions of their patch.
+
+-  Provide constructive feedback. Just saying, "This is wrong, you should do X
+   instead." is usually not very helpful. The patch author is unlikely to
+   understand why you are requesting this change and might feel personally
+   attacked.
+
+-  Be mindful when reviewing a patch. As a code owner, you are viewed as
+   the expert for the relevant module. By approving a patch, you are partially
+   responsible for its quality and the effects it has for all TF-A users. Make
+   sure you fully understand what the implications of a patch might be.
+
+
+Guidelines for maintainers
+--------------------------
+
+Maintainers are listed on the :ref:`Project Maintenance<maintainers>` page.
+
+When reviewing a patch, maintainers are expected to check the following:
+
+-  The general structure of the patch looks good. This covers things like:
+
+   -  Code organization.
+
+   -  Files and directories, names and locations.
+
+      For example, platform code should be added under the ``plat/`` directory.
+
+   -  Naming conventions.
+
+      For example, platform identifiers should be properly namespaced to avoid
+      name clashes with generic code.
+
+   -  API design.
+
+-  Interaction of the patch with other modules in the code base.
+
+-  The patch aims at complying with any standard or technical documentation
+   that applies.
+
+-  New files must have the correct license and copyright headers. See :ref:`this
+   paragraph<copyright-license-guidance>` for more information. The CI system
+   should help catch files with incorrect or no copyright/license headers.
+
+-  There is no third party code or binary blobs with potential IP concerns.
+   Maintainers should look for copyright or license notices in code, and use
+   their best judgement. If they are unsure about a patch, they should ask
+   other maintainers for help.
+
+-  Generally speaking, new driver code should be placed in the generic
+   layer. There are cases where a driver has to stay into the platform layer but
+   this should be the exception, rather than the rule.
+
+-  Existing common drivers (in particular for Arm IPs like the GIC driver) should
+   not be copied into the platform layer to cater for platform quirks. This
+   type of code duplication hurts the maintainability of the project. The
+   duplicate driver is less likely to benefit from bug fixes and future
+   enhancements. In most cases, it is possible to rework a generic driver to
+   make it more flexible and fit slightly different use cases. That way, these
+   enhancements benefit everyone.
+
+-  When a platform specific driver really is required, the burden lies with the
+   patch author to prove the need for it. A detailed justification should be
+   posted via the commit message or on the mailing list.
+
+-  Before merging a patch, verify that all review comments have been addressed.
+   If this is not the case, encourage the patch author and the relevant
+   reviewers to resolve these together.
+
+If a maintainer is happy with a patch, they should give their approval
+through the ``Maintainer-Review+1`` label in Gerrit. If instead, they have
+concerns, questions, or any other type of blocking comment, they should set
+``Maintainer-Review-1``.
+
+--------------
+
+*Copyright (c) 2020, Arm Limited. All rights reserved.*
+
+.. _Project Maintenance Process: https://developer.trustedfirmware.org/w/collaboration/project-maintenance-process/

arm-trusted-firmware/docs/process/coding-guidelines.rst

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+Coding Guidelines
+=================
+
+This document provides some additional guidelines to consider when writing
+|TF-A| code. These are not intended to be strictly-enforced rules like the
+contents of the :ref:`Coding Style`.
+
+Automatic Editor Configuration
+------------------------------
+
+Many of the rules given below (such as indentation size, use of tabs, and
+newlines) can be set automatically using the `EditorConfig`_ configuration file
+in the root of the repository: ``.editorconfig``. With a supported editor, the
+rules set out in this file can be automatically applied when you are editing
+files in the |TF-A| repository.
+
+Several editors include built-in support for EditorConfig files, and many others
+support its functionality through plugins.
+
+Use of the EditorConfig file is suggested but is not required.
+
+.. _automatic-compliance-checking:
+
+Automatic Compliance Checking
+-----------------------------
+
+To assist with coding style compliance, the project Makefile contains two
+targets which both utilise the `checkpatch.pl` script that ships with the Linux
+source tree. The project also defines certain *checkpatch* options in the
+``.checkpatch.conf`` file in the top-level directory.
+
+.. note::
+   Checkpatch errors will gate upstream merging of pull requests.
+   Checkpatch warnings will not gate merging but should be reviewed and fixed if
+   possible.
+
+To check the entire source tree, you must first download copies of
+``checkpatch.pl``, ``spelling.txt`` and ``const_structs.checkpatch`` available
+in the `Linux master tree`_ *scripts* directory, then set the ``CHECKPATCH``
+environment variable to point to ``checkpatch.pl`` (with the other 2 files in
+the same directory) and build the `checkcodebase` target:
+
+.. code:: shell
+
+    make CHECKPATCH=<path-to-linux>/linux/scripts/checkpatch.pl checkcodebase
+
+To just check the style on the files that differ between your local branch and
+the remote master, use:
+
+.. code:: shell
+
+    make CHECKPATCH=<path-to-linux>/linux/scripts/checkpatch.pl checkpatch
+
+If you wish to check your patch against something other than the remote master,
+set the ``BASE_COMMIT`` variable to your desired branch. By default,
+``BASE_COMMIT`` is set to ``origin/master``.
+
+Ignored Checkpatch Warnings
+^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+Some checkpatch warnings in the TF codebase are deliberately ignored. These
+include:
+
+- ``**WARNING: line over 80 characters**``: Although the codebase should
+  generally conform to the 80 character limit this is overly restrictive in some
+  cases.
+
+- ``**WARNING: Use of volatile is usually wrong``: see
+  `Why the “volatile” type class should not be used`_ . Although this document
+  contains some very useful information, there are several legimate uses of the
+  volatile keyword within the TF codebase.
+
+Performance considerations
+--------------------------
+
+Avoid printf and use logging macros
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+``debug.h`` provides logging macros (for example, ``WARN`` and ``ERROR``)
+which wrap ``tf_log`` and which allow the logging call to be compiled-out
+depending on the ``make`` command. Use these macros to avoid print statements
+being compiled unconditionally into the binary.
+
+Each logging macro has a numerical log level:
+
+.. code:: c
+
+  #define LOG_LEVEL_NONE    0
+  #define LOG_LEVEL_ERROR   10
+  #define LOG_LEVEL_NOTICE  20
+  #define LOG_LEVEL_WARNING 30
+  #define LOG_LEVEL_INFO    40
+  #define LOG_LEVEL_VERBOSE 50
+
+By default, all logging statements with a log level ``<= LOG_LEVEL_INFO`` will
+be compiled into debug builds and all statements with a log level
+``<= LOG_LEVEL_NOTICE`` will be compiled into release builds. This can be
+overridden from the command line or by the platform makefile (although it may be
+necessary to clean the build directory first).
+
+For example, to enable ``VERBOSE`` logging on FVP:
+
+.. code:: shell
+
+  make PLAT=fvp LOG_LEVEL=50 all
+
+Use const data where possible
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+For example, the following code:
+
+.. code:: c
+
+  struct my_struct {
+          int arg1;
+          int arg2;
+  };
+
+  void init(struct my_struct *ptr);
+
+  void main(void)
+  {
+          struct my_struct x;
+          x.arg1 = 1;
+          x.arg2 = 2;
+          init(&x);
+  }
+
+is better written as:
+
+.. code:: c
+
+  struct my_struct {
+          int arg1;
+          int arg2;
+  };
+
+  void init(const struct my_struct *ptr);
+
+  void main(void)
+  {
+          const struct my_struct x = { 1, 2 };
+          init(&x);
+  }
+
+This allows the linker to put the data in a read-only data section instead of a
+writeable data section, which may result in a smaller and faster binary. Note
+that this may require dependent functions (``init()`` in the above example) to
+have ``const`` arguments, assuming they don't need to modify the data.
+
+Libc functions that are banned or to be used with caution
+---------------------------------------------------------
+
+Below is a list of functions that present security risks and either must not be
+used (Banned) or are discouraged from use and must be used with care (Caution).
+
++------------------------+-----------+--------------------------------------+
+|    libc function       | Status    | Comments                             |
++========================+===========+======================================+
+| ``strcpy, wcscpy``,    | Banned    | use strlcpy instead                  |
+| ``strncpy``            |           |                                      |
++------------------------+-----------+--------------------------------------+
+| ``strcat, wcscat``,    | Banned    | use strlcat instead                  |
+| ``strncat``            |           |                                      |
++------------------------+-----------+--------------------------------------+
+| ``sprintf, vsprintf``  | Banned    | use snprintf, vsnprintf              |
+|                        |           | instead                              |
++------------------------+-----------+--------------------------------------+
+| ``snprintf``           | Caution   | ensure result fits in buffer         |
+|                        |           | i.e : snprintf(buf,size...) < size   |
++------------------------+-----------+--------------------------------------+
+| ``vsnprintf``          | Caution   | inspect va_list match types          |
+|                        |           | specified in format string           |
++------------------------+-----------+--------------------------------------+
+| ``strtok``             | Banned    | use strtok_r or strsep instead       |
++------------------------+-----------+--------------------------------------+
+| ``strtok_r, strsep``   | Caution   | inspect for terminated input buffer  |
++------------------------+-----------+--------------------------------------+
+| ``ato*``               | Banned    | use equivalent strto* functions      |
++------------------------+-----------+--------------------------------------+
+| ``*toa``               | Banned    | Use snprintf instead                 |
++------------------------+-----------+--------------------------------------+
+
+The `libc` component in the codebase will not add support for the banned APIs.
+
+Error handling and robustness
+-----------------------------
+
+Using CASSERT to check for compile time data errors
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+Where possible, use the ``CASSERT`` macro to check the validity of data known at
+compile time instead of checking validity at runtime, to avoid unnecessary
+runtime code.
+
+For example, this can be used to check that the assembler's and compiler's views
+of the size of an array is the same.
+
+.. code:: c
+
+  #include <cassert.h>
+
+  define MY_STRUCT_SIZE 8 /* Used by assembler source files */
+
+  struct my_struct {
+      uint32_t arg1;
+      uint32_t arg2;
+  };
+
+  CASSERT(MY_STRUCT_SIZE == sizeof(struct my_struct), assert_my_struct_size_mismatch);
+
+
+If ``MY_STRUCT_SIZE`` in the above example were wrong then the compiler would
+emit an error like this:
+
+::
+
+  my_struct.h:10:1: error: size of array ‘assert_my_struct_size_mismatch’ is negative
+
+
+Using assert() to check for programming errors
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+In general, each secure world TF image (BL1, BL2, BL31 and BL32) should be
+treated as a tightly integrated package; the image builder should be aware of
+and responsible for all functionality within the image, even if code within that
+image is provided by multiple entities. This allows us to be more aggressive in
+interpreting invalid state or bad function arguments as programming errors using
+``assert()``, including arguments passed across platform porting interfaces.
+This is in contrast to code in a Linux environment, which is less tightly
+integrated and may attempt to be more defensive by passing the error back up the
+call stack.
+
+Where possible, badly written TF code should fail early using ``assert()``. This
+helps reduce the amount of untested conditional code. By default these
+statements are not compiled into release builds, although this can be overridden
+using the ``ENABLE_ASSERTIONS`` build flag.
+
+Examples:
+
+- Bad argument supplied to library function
+- Bad argument provided by platform porting function
+- Internal secure world image state is inconsistent
+
+
+Handling integration errors
+^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+Each secure world image may be provided by a different entity (for example, a
+Trusted Boot vendor may provide the BL2 image, a TEE vendor may provide the BL32
+image and the OEM/SoC vendor may provide the other images).
+
+An image may contain bugs that are only visible when the images are integrated.
+The system integrator may not even have access to the debug variants of all the
+images in order to check if asserts are firing. For example, the release variant
+of BL1 may have already been burnt into the SoC. Therefore, TF code that detects
+an integration error should _not_ consider this a programming error, and should
+always take action, even in release builds.
+
+If an integration error is considered non-critical it should be treated as a
+recoverable error. If the error is considered critical it should be treated as
+an unexpected unrecoverable error.
+
+Handling recoverable errors
+^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+The secure world **must not** crash when supplied with bad data from an external
+source. For example, data from the normal world or a hardware device. Similarly,
+the secure world **must not** crash if it detects a non-critical problem within
+itself or the system. It must make every effort to recover from the problem by
+emitting a ``WARN`` message, performing any necessary error handling and
+continuing.
+
+Examples:
+
+- Secure world receives SMC from normal world with bad arguments.
+- Secure world receives SMC from normal world at an unexpected time.
+- BL31 receives SMC from BL32 with bad arguments.
+- BL31 receives SMC from BL32 at unexpected time.
+- Secure world receives recoverable error from hardware device. Retrying the
+  operation may help here.
+- Non-critical secure world service is not functioning correctly.
+- BL31 SPD discovers minor configuration problem with corresponding SP.
+
+Handling unrecoverable errors
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+In some cases it may not be possible for the secure world to recover from an
+error. This situation should be handled in one of the following ways:
+
+1. If the unrecoverable error is unexpected then emit an ``ERROR`` message and
+   call ``panic()``. This will end up calling the platform-specific function
+   ``plat_panic_handler()``.
+2. If the unrecoverable error is expected to occur in certain circumstances,
+   then emit an ``ERROR`` message and call the platform-specific function
+   ``plat_error_handler()``.
+
+Cases 1 and 2 are subtly different. A platform may implement
+``plat_panic_handler`` and ``plat_error_handler`` in the same way (for example,
+by waiting for a secure watchdog to time-out or by invoking an interface on the
+platform's power controller to reset the platform). However,
+``plat_error_handler`` may take additional action for some errors (for example,
+it may set a flag so the platform resets into a different mode). Also,
+``plat_panic_handler()`` may implement additional debug functionality (for
+example, invoking a hardware breakpoint).
+
+Examples of unexpected unrecoverable errors:
+
+- BL32 receives an unexpected SMC response from BL31 that it is unable to
+  recover from.
+- BL31 Trusted OS SPD code discovers that BL2 has not loaded the corresponding
+  Trusted OS, which is critical for platform operation.
+- Secure world discovers that a critical hardware device is an unexpected and
+  unrecoverable state.
+- Secure world receives an unexpected and unrecoverable error from a critical
+  hardware device.
+- Secure world discovers that it is running on unsupported hardware.
+
+Examples of expected unrecoverable errors:
+
+- BL1/BL2 fails to load the next image due to missing/corrupt firmware on disk.
+- BL1/BL2 fails to authenticate the next image due to an invalid certificate.
+- Secure world continuously receives recoverable errors from a hardware device
+  but is unable to proceed without a valid response.
+
+Handling critical unresponsiveness
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+If the secure world is waiting for a response from an external source (for
+example, the normal world or a hardware device) which is critical for continued
+operation, it must not wait indefinitely. It must have a mechanism (for example,
+a secure watchdog) for resetting itself and/or the external source to prevent
+the system from executing in this state indefinitely.
+
+Examples:
+
+- BL1 is waiting for the normal world to raise an SMC to proceed to the next
+  stage of the secure firmware update process.
+- A Trusted OS is waiting for a response from a proxy in the normal world that
+  is critical for continued operation.
+- Secure world is waiting for a hardware response that is critical for continued
+  operation.
+
+Use of built-in *C* and *libc* data types
+-----------------------------------------
+
+The |TF-A| codebase should be kept as portable as possible, especially since
+both 64-bit and 32-bit platforms are supported. To help with this, the following
+data type usage guidelines should be followed:
+
+- Where possible, use the built-in *C* data types for variable storage (for
+  example, ``char``, ``int``, ``long long``, etc) instead of the standard *C99*
+  types. Most code is typically only concerned with the minimum size of the
+  data stored, which the built-in *C* types guarantee.
+
+- Avoid using the exact-size standard *C99* types in general (for example,
+  ``uint16_t``, ``uint32_t``, ``uint64_t``, etc) since they can prevent the
+  compiler from making optimizations. There are legitimate uses for them,
+  for example to represent data of a known structure. When using them in struct
+  definitions, consider how padding in the struct will work across architectures.
+  For example, extra padding may be introduced in |AArch32| systems if a struct
+  member crosses a 32-bit boundary.
+
+- Use ``int`` as the default integer type - it's likely to be the fastest on all
+  systems. Also this can be assumed to be 32-bit as a consequence of the
+  `Procedure Call Standard for the Arm Architecture`_ and the `Procedure Call
+  Standard for the Arm 64-bit Architecture`_ .
+
+- Avoid use of ``short`` as this may end up being slower than ``int`` in some
+  systems. If a variable must be exactly 16-bit, use ``int16_t`` or
+  ``uint16_t``.
+
+- Avoid use of ``long``. This is guaranteed to be at least 32-bit but, given
+  that `int` is 32-bit on Arm platforms, there is no use for it. For integers of
+  at least 64-bit, use ``long long``.
+
+- Use ``char`` for storing text. Use ``uint8_t`` for storing other 8-bit data.
+
+- Use ``unsigned`` for integers that can never be negative (counts,
+  indices, sizes, etc). TF intends to comply with MISRA "essential type" coding
+  rules (10.X), where signed and unsigned types are considered different
+  essential types. Choosing the correct type will aid this. MISRA static
+  analysers will pick up any implicit signed/unsigned conversions that may lead
+  to unexpected behaviour.
+
+- For pointer types:
+
+  - If an argument in a function declaration is pointing to a known type then
+    simply use a pointer to that type (for example: ``struct my_struct *``).
+
+  - If a variable (including an argument in a function declaration) is pointing
+    to a general, memory-mapped address, an array of pointers or another
+    structure that is likely to require pointer arithmetic then use
+    ``uintptr_t``. This will reduce the amount of casting required in the code.
+    Avoid using ``unsigned long`` or ``unsigned long long`` for this purpose; it
+    may work but is less portable.
+
+  - For other pointer arguments in a function declaration, use ``void *``. This
+    includes pointers to types that are abstracted away from the known API and
+    pointers to arbitrary data. This allows the calling function to pass a
+    pointer argument to the function without any explicit casting (the cast to
+    ``void *`` is implicit). The function implementation can then do the
+    appropriate casting to a specific type.
+
+  - Avoid pointer arithmetic generally (as this violates MISRA C 2012 rule
+    18.4) and especially on void pointers (as this is only supported via
+    language extensions and is considered non-standard). In TF-A, setting the
+    ``W`` build flag to ``W=3`` enables the *-Wpointer-arith* compiler flag and
+    this will emit warnings where pointer arithmetic is used.
+
+  - Use ``ptrdiff_t`` to compare the difference between 2 pointers.
+
+- Use ``size_t`` when storing the ``sizeof()`` something.
+
+- Use ``ssize_t`` when returning the ``sizeof()`` something from a function that
+  can also return an error code; the signed type allows for a negative return
+  code in case of error. This practice should be used sparingly.
+
+- Use ``u_register_t`` when it's important to store the contents of a register
+  in its native size (32-bit in |AArch32| and 64-bit in |AArch64|). This is not a
+  standard *C99* type but is widely available in libc implementations,
+  including the FreeBSD version included with the TF codebase. Where possible,
+  cast the variable to a more appropriate type before interpreting the data. For
+  example, the following struct in ``ep_info.h`` could use this type to minimize
+  the storage required for the set of registers:
+
+.. code:: c
+
+    typedef struct aapcs64_params {
+            u_register_t arg0;
+            u_register_t arg1;
+            u_register_t arg2;
+            u_register_t arg3;
+            u_register_t arg4;
+            u_register_t arg5;
+            u_register_t arg6;
+            u_register_t arg7;
+    } aapcs64_params_t;
+
+If some code wants to operate on ``arg0`` and knows that it represents a 32-bit
+unsigned integer on all systems, cast it to ``unsigned int``.
+
+These guidelines should be updated if additional types are needed.
+
+Favor C language over assembly language
+---------------------------------------
+
+Generally, prefer code written in C over assembly. Assembly code is less
+portable, harder to understand, maintain and audit security wise. Also, static
+analysis tools generally don't analyze assembly code.
+
+There are, however, legitimate uses of assembly language. These include:
+
+  - Early boot code executed before the C runtime environment is setup.
+
+  - Exception handling code.
+
+  - Low-level code where the exact sequence of instructions executed on the CPU
+    matters, such as CPU reset sequences.
+
+  - Low-level code where specific system-level instructions must be used, such
+    as cache maintenance operations.
+
+--------------
+
+*Copyright (c) 2020, 2022, Arm Limited and Contributors. All rights reserved.*
+
+.. _`Linux master tree`: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/
+.. _`Procedure Call Standard for the Arm Architecture`: https://github.com/ARM-software/abi-aa/blob/main/aapcs32/aapcs32.rst
+.. _`Procedure Call Standard for the Arm 64-bit Architecture`: https://github.com/ARM-software/abi-aa/blob/main/aapcs64/aapcs64.rst
+.. _`EditorConfig`: http://editorconfig.org/
+.. _`Why the “volatile” type class should not be used`: https://www.kernel.org/doc/html/latest/process/volatile-considered-harmful.html
+.. _`MISRA C:2012 Guidelines`: https://www.misra.org.uk/Activities/MISRAC/tabid/160/Default.aspx
+.. _`a spreadsheet`: https://developer.trustedfirmware.org/file/download/lamajxif3w7c4mpjeoo5/PHID-FILE-fp7c7acszn6vliqomyhn/MISRA-and-TF-Analysis-v1.3.ods

arm-trusted-firmware/docs/process/coding-style.rst

@@ -0,0 +1,470 @@
+Coding Style
+============
+
+The following sections outline the |TF-A| coding style for *C* code. The style
+is based on the `Linux kernel coding style`_, with a few modifications.
+
+The style should not be considered *set in stone*. Feel free to provide feedback
+and suggestions.
+
+.. note::
+   You will almost certainly find code in the |TF-A| repository that does not
+   follow the style. The intent is for all code to do so eventually.
+
+File Encoding
+-------------
+
+The source code must use the **UTF-8** character encoding. Comments and
+documentation may use non-ASCII characters when required (e.g. Greek letters
+used for units) but code itself is still limited to ASCII characters.
+
+Newlines must be in **Unix** style, which means that only the Line Feed (``LF``)
+character is used to break a line and reset to the first column.
+
+Language
+--------
+
+The primary language for comments and naming must be International English. In
+cases where there is a conflict between the American English and British English
+spellings of a word, the American English spelling is used.
+
+Exceptions are made when referring directly to something that does not use
+international style, such as the name of a company. In these cases the existing
+name should be used as-is.
+
+C Language Standard
+-------------------
+
+The C language mode used for TF-A is *GNU99*. This is the "GNU dialect of ISO
+C99", which implies the *ISO C99* standard with GNU extensions.
+
+Both GCC and Clang compiler toolchains have support for *GNU99* mode, though
+Clang does lack support for a small number of GNU extensions. These
+missing extensions are rarely used, however, and should not pose a problem.
+
+.. _misra-compliance:
+
+MISRA Compliance
+----------------
+
+TF-A attempts to comply with the `MISRA C:2012 Guidelines`_. Coverity
+Static Analysis is used to regularly generate a report of current MISRA defects
+and to prevent the addition of new ones.
+
+It is not possible for the project to follow all MISRA guidelines. We maintain
+`a spreadsheet`_ that lists all rules and directives and whether we aim to
+comply with them or not. A rationale is given for each deviation.
+
+.. note::
+   Enforcing a rule does not mean that the codebase is free of defects
+   of that rule, only that they would ideally be removed.
+
+.. note::
+   Third-party libraries are not considered in our MISRA analysis and we do not
+   intend to modify them to make them MISRA compliant.
+
+Indentation
+-----------
+
+Use **tabs** for indentation. The use of spaces for indentation is forbidden
+except in the case where a term is being indented to a boundary that cannot be
+achieved using tabs alone.
+
+Tab spacing should be set to **8 characters**.
+
+Trailing whitespace is not allowed and must be trimmed.
+
+Spacing
+-------
+
+Single spacing should be used around most operators, including:
+
+- Arithmetic operators (``+``, ``-``, ``/``, ``*``)
+- Assignment operators (``=``, ``+=``, etc)
+- Boolean operators (``&&``, ``||``)
+- Comparison operators (``<``, ``>``, ``==``, etc)
+
+A space should also be used to separate parentheses and braces when they are not
+already separated by a newline, such as for the ``if`` statement in the
+following example:
+
+.. code:: c
+
+  int function_foo(bool bar)
+  {
+      if (bar) {
+          function_baz();
+      }
+  }
+
+Note that there is no space between the name of a function and the following
+parentheses.
+
+Control statements (``if``, ``for``, ``switch``, ``while``, etc) must be
+separated from the following open parenthesis by a single space. The previous
+example illustrates this for an ``if`` statement.
+
+Line Length
+-----------
+
+Line length *should* be at most **80 characters**. This limit does not include
+non-printing characters such as the line feed.
+
+This rule is a *should*, not a must, and it is acceptable to exceed the limit
+**slightly** where the readability of the code would otherwise be significantly
+reduced. Use your judgement in these cases.
+
+Blank Lines
+-----------
+
+Functions are usually separated by a single blank line. In certain cases it is
+acceptable to use additional blank lines for clarity, if required.
+
+The file must end with a single newline character. Many editors have the option
+to insert this automatically and to trim multiple blank lines at the end of the
+file.
+
+Braces
+------
+
+Opening Brace Placement
+^^^^^^^^^^^^^^^^^^^^^^^
+
+Braces follow the **Kernighan and Ritchie (K&R)** style, where the opening brace
+is **not** placed on a new line.
+
+Example for a ``while`` loop:
+
+.. code:: c
+
+  while (condition) {
+      foo();
+      bar();
+  }
+
+This style applies to all blocks except for functions which, following the Linux
+style, **do** place the opening brace on a new line.
+
+Example for a function:
+
+.. code:: c
+
+  int my_function(void)
+  {
+      int a;
+
+      a = 1;
+      return a;
+  }
+
+Conditional Statement Bodies
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+Where conditional statements (such as ``if``, ``for``, ``while`` and ``do``) are
+used, braces must be placed around the statements that form the body of the
+conditional. This is the case regardless of the number of statements in the
+body.
+
+.. note::
+  This is a notable departure from the Linux coding style that has been
+  adopted to follow MISRA guidelines more closely and to help prevent errors.
+
+For example, use the following style:
+
+.. code:: c
+
+  if (condition) {
+      foo++;
+  }
+
+instead of omitting the optional braces around a single statement:
+
+.. code:: c
+
+  /* This is violating MISRA C 2012: Rule 15.6 */
+  if (condition)
+      foo++;
+
+The reason for this is to prevent accidental changes to control flow when
+modifying the body of the conditional. For example, at a quick glance it is easy
+to think that the value of ``bar`` is only incremented if ``condition``
+evaluates to ``true`` but this is not the case - ``bar`` will always be
+incremented regardless of the condition evaluation. If the developer forgets to
+add braces around the conditional body when adding the ``bar++;`` statement then
+the program execution will not proceed as intended.
+
+.. code:: c
+
+  /* This is violating MISRA C 2012: Rule 15.6 */
+  if (condition)
+      foo++;
+      bar++;
+
+Naming
+------
+
+Functions
+^^^^^^^^^
+
+Use lowercase for function names, separating multiple words with an underscore
+character (``_``). This is sometimes referred to as *Snake Case*. An example is
+given below:
+
+.. code:: c
+
+  void bl2_arch_setup(void)
+  {
+      ...
+  }
+
+Local Variables and Parameters
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+Local variables and function parameters use the same format as function names:
+lowercase with underscore separation between multiple words. An example is
+given below:
+
+.. code:: c
+
+  static void set_scr_el3_from_rm(uint32_t type,
+                                  uint32_t interrupt_type_flags,
+                                  uint32_t security_state)
+  {
+      uint32_t flag, bit_pos;
+
+      ...
+
+  }
+
+Preprocessor Macros
+^^^^^^^^^^^^^^^^^^^
+
+Identifiers that are defined using preprocessor macros are written in all
+uppercase text.
+
+.. code:: c
+
+  #define BUFFER_SIZE_BYTES 64
+
+Function Attributes
+-------------------
+
+Place any function attributes after the function type and before the function
+name.
+
+.. code:: c
+
+   void __init plat_arm_interconnect_init(void);
+
+Alignment
+---------
+
+Alignment should be performed primarily with tabs, adding spaces if required to
+achieve a granularity that is smaller than the tab size. For example, with a tab
+size of eight columns it would be necessary to use one tab character and two
+spaces to indent text by ten columns.
+
+Switch Statement Alignment
+^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+When using ``switch`` statements, align each ``case`` statement with the
+``switch`` so that they are in the same column.
+
+.. code:: c
+
+  switch (condition) {
+  case A:
+      foo();
+  case B:
+      bar();
+  default:
+      baz();
+  }
+
+Pointer Alignment
+^^^^^^^^^^^^^^^^^
+
+The reference and dereference operators (ampersand and *pointer star*) must be
+aligned with the name of the object on which they are operating, as opposed to
+the type of the object.
+
+.. code:: c
+
+  uint8_t *foo;
+
+  foo = &bar;
+
+
+Comments
+--------
+
+The general rule for comments is that the double-slash style of comment (``//``)
+is not allowed. Examples of the allowed comment formats are shown below:
+
+.. code:: c
+
+  /*
+   * This example illustrates the first allowed style for multi-line comments.
+   *
+   * Blank lines within multi-lines are allowed when they add clarity or when
+   * they separate multiple contexts.
+   *
+   */
+
+.. code:: c
+
+  /**************************************************************************
+   * This is the second allowed style for multi-line comments.
+   *
+   * In this style, the first and last lines use asterisks that run the full
+   * width of the comment at its widest point.
+   *
+   * This style can be used for additional emphasis.
+   *
+   *************************************************************************/
+
+.. code:: c
+
+  /* Single line comments can use this format */
+
+.. code:: c
+
+  /***************************************************************************
+   * This alternative single-line comment style can also be used for emphasis.
+   **************************************************************************/
+
+Headers and inclusion
+---------------------
+
+Header guards
+^^^^^^^^^^^^^
+
+For a header file called "some_driver.h" the style used by |TF-A| is:
+
+.. code:: c
+
+  #ifndef SOME_DRIVER_H
+  #define SOME_DRIVER_H
+
+  <header content>
+
+  #endif /* SOME_DRIVER_H */
+
+Include statement ordering
+^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+All header files that are included by a source file must use the following,
+grouped ordering. This is to improve readability (by making it easier to quickly
+read through the list of headers) and maintainability.
+
+#. *System* includes: Header files from the standard *C* library, such as
+   ``stddef.h`` and ``string.h``.
+
+#. *Project* includes: Header files under the ``include/`` directory within
+   |TF-A| are *project* includes.
+
+#. *Platform* includes: Header files relating to a single, specific platform,
+   and which are located under the ``plat/<platform_name>`` directory within
+   |TF-A|, are *platform* includes.
+
+Within each group, ``#include`` statements must be in alphabetical order,
+taking both the file and directory names into account.
+
+Groups must be separated by a single blank line for clarity.
+
+The example below illustrates the ordering rules using some contrived header
+file names; this type of name reuse should be otherwise avoided.
+
+.. code:: c
+
+  #include <string.h>
+
+  #include <a_dir/example/a_header.h>
+  #include <a_dir/example/b_header.h>
+  #include <a_dir/test/a_header.h>
+  #include <b_dir/example/a_header.h>
+
+  #include "a_header.h"
+
+Include statement variants
+^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+Two variants of the ``#include`` directive are acceptable in the |TF-A|
+codebase. Correct use of the two styles improves readability by suggesting the
+location of the included header and reducing ambiguity in cases where generic
+and platform-specific headers share a name.
+
+For header files that are in the same directory as the source file that is
+including them, use the ``"..."`` variant.
+
+For header files that are **not** in the same directory as the source file that
+is including them, use the ``<...>`` variant.
+
+Example (bl1_fwu.c):
+
+.. code:: c
+
+  #include <assert.h>
+  #include <errno.h>
+  #include <string.h>
+
+  #include "bl1_private.h"
+
+Typedefs
+--------
+
+Avoid anonymous typedefs of structs/enums in headers
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+For example, the following definition:
+
+.. code:: c
+
+  typedef struct {
+          int arg1;
+          int arg2;
+  } my_struct_t;
+
+
+is better written as:
+
+.. code:: c
+
+  struct my_struct {
+          int arg1;
+          int arg2;
+  };
+
+This allows function declarations in other header files that depend on the
+struct/enum to forward declare the struct/enum instead of including the
+entire header:
+
+.. code:: c
+
+  struct my_struct;
+  void my_func(struct my_struct *arg);
+
+instead of:
+
+.. code:: c
+
+  #include <my_struct.h>
+  void my_func(my_struct_t *arg);
+
+Some TF definitions use both a struct/enum name **and** a typedef name. This
+is discouraged for new definitions as it makes it difficult for TF to comply
+with MISRA rule 8.3, which states that "All declarations of an object or
+function shall use the same names and type qualifiers".
+
+The Linux coding standards also discourage new typedefs and checkpatch emits
+a warning for this.
+
+Existing typedefs will be retained for compatibility.
+
+--------------
+
+*Copyright (c) 2020, Arm Limited. All rights reserved.*
+
+.. _`Linux kernel coding style`: https://www.kernel.org/doc/html/latest/process/coding-style.html
+.. _`MISRA C:2012 Guidelines`: https://www.misra.org.uk/Activities/MISRAC/tabid/160/Default.aspx
+.. _`a spreadsheet`: https://developer.trustedfirmware.org/file/download/lamajxif3w7c4mpjeoo5/PHID-FILE-fp7c7acszn6vliqomyhn/MISRA-and-TF-Analysis-v1.3.ods

arm-trusted-firmware/docs/process/commit-style.rst

@@ -0,0 +1,153 @@
+Commit Style
+============
+
+When writing commit messages, please think carefully about the purpose and scope
+of the change you are making: describe briefly what the change does, and
+describe in detail why it does it. This helps to ensure that changes to the
+code-base are transparent and approachable to reviewers, and it allows us to
+keep a more accurate changelog. You may use Markdown in commit messages.
+
+A good commit message provides all the background information needed for
+reviewers to understand the intent and rationale of the patch. This information
+is also useful for future reference.
+
+For example:
+
+- What does the patch do?
+- What motivated it?
+- What impact does it have?
+- How was it tested?
+- Have alternatives been considered? Why did you choose this approach over
+  another one?
+- If it fixes an `issue`_, include a reference.
+
+|TF-A| follows the `Conventional Commits`_ specification. All commits to the
+main repository are expected to adhere to these guidelines, so it is
+**strongly** recommended that you read at least the `quick summary`_ of the
+specification.
+
+To briefly summarize, commit messages are expected to be of the form:
+
+.. code::
+
+    <type>[optional scope]: <description>
+
+    [optional body]
+
+    [optional footer(s)]
+
+The following example commit message demonstrates the use of the
+``refactor`` type and the ``amu`` scope:
+
+.. code::
+
+    refactor(amu): factor out register accesses
+
+    This change introduces a small set of register getters and setters to
+    avoid having to repeatedly mask and shift in complex code.
+
+    Change-Id: Ia372f60c5efb924cd6eeceb75112e635ad13d942
+    Signed-off-by: Chris Kay <chris.kay@arm.com>
+
+The following `types` are permissible and are strictly enforced:
+
++--------------+---------------------------------------------------------------+
+| Scope        | Description                                                   |
++==============+===============================================================+
+| ``feat``     | A new feature                                                 |
++--------------+---------------------------------------------------------------+
+| ``fix``      | A bug fix                                                     |
++--------------+---------------------------------------------------------------+
+| ``build``    | Changes that affect the build system or external dependencies |
++--------------+---------------------------------------------------------------+
+| ``ci``       | Changes to our CI configuration files and scripts             |
++--------------+---------------------------------------------------------------+
+| ``docs``     | Documentation-only changes                                    |
++--------------+---------------------------------------------------------------+
+| ``perf``     | A code change that improves performance                       |
++--------------+---------------------------------------------------------------+
+| ``refactor`` | A code change that neither fixes a bug nor adds a feature     |
++--------------+---------------------------------------------------------------+
+| ``revert``   | Changes that revert a previous change                         |
++--------------+---------------------------------------------------------------+
+| ``style``    | Changes that do not affect the meaning of the code            |
+|              | (white-space, formatting, missing semi-colons, etc.)          |
++--------------+---------------------------------------------------------------+
+| ``test``     | Adding missing tests or correcting existing tests             |
++--------------+---------------------------------------------------------------+
+| ``chore``    | Any other change                                              |
++--------------+---------------------------------------------------------------+
+
+The permissible `scopes` are more flexible, and we maintain a list of them in
+our :download:`changelog configuration file <../../changelog.yaml>`. Scopes in
+this file are organized by their changelog section, where each changelog section
+has a single scope that is considered to be blessed, and possibly several
+deprecated scopes. Please avoid using deprecated scopes.
+
+While we don't enforce scopes strictly, we do ask that commits use these if they
+can, or add their own if no appropriate one exists (see :ref:`Adding Scopes`).
+
+It's highly recommended that you use the tooling installed by the optional steps
+in the :ref:`prerequisites <Prerequisites>` guide to validate commit messages
+locally, as commitlint reports a live list of the acceptable scopes.
+
+.. _Adding Scopes:
+
+Adding Scopes
+-------------
+
+Scopes that are not present in the changelog configuration file are considered
+to be deprecated, and should be avoided. If you are adding a new component that
+does not yet have a designated scope, please add one.
+
+For example, if you are adding or making modifications to `Foo`'s latest and
+greatest new platform `Bar` then you would add it to the `Platforms` changelog
+sub-section, and the hierarchy should look something like this:
+
+.. code:: yaml
+
+    - title: Platforms
+
+      subsections:
+        - title: Foo
+          scope: foo
+
+          subsections:
+            - title: Bar
+              scope: bar
+
+When creating new scopes, try to keep them short and succinct, and use kebab
+case (``this-is-kebab-case``). Components with a product name (i.e. most
+platforms and some drivers) should use that name (e.g. ``gic600ae``,
+``flexspi``, ``stpmic1``), otherwise use a name that uniquely represents the
+component (e.g. ``marvell-comphy-3700``, ``rcar3-drivers``, ``a3720-uart``).
+
+Mandated Trailers
+-----------------
+
+Commits are expected to be signed off with the ``Signed-off-by:`` trailer using
+your real name and email address. You can do this automatically by committing
+with Git's ``-s`` flag. By adding this line the contributor certifies the
+contribution is made under the terms of the :download:`Developer Certificate of
+Origin <../../dco.txt>`.
+
+There may be multiple ``Signed-off-by:`` lines depending on the history of the
+patch, but one **must** be the committer. More details may be found in the
+`Gerrit Signed-off-by Lines guidelines`_.
+
+Ensure that each commit also has a unique ``Change-Id:`` line. If you have
+followed optional steps in the prerequisites to either install the Node.js tools
+or clone the repository using the "`Clone with commit-msg hook`" clone method,
+then this should be done automatically for you.
+
+More details may be found in the `Gerrit Change-Ids documentation`_.
+
+--------------
+
+*Copyright (c) 2021, Arm Limited and Contributors. All rights reserved.*
+
+.. _Conventional Commits: https://www.conventionalcommits.org/en/v1.0.0
+.. _Gerrit Change-Ids documentation: https://review.trustedfirmware.org/Documentation/user-changeid.html
+.. _Gerrit Signed-off-by Lines guidelines: https://review.trustedfirmware.org/Documentation/user-signedoffby.html
+.. _issue: https://developer.trustedfirmware.org/project/board/1/
+.. _quick summary: https://www.conventionalcommits.org/en/v1.0.0/#summary

arm-trusted-firmware/docs/process/contributing.rst

@@ -0,0 +1,304 @@
+Contributor's Guide
+*******************
+
+Getting Started
+===============
+
+-  Make sure you have a Github account and you are logged on both
+   `developer.trustedfirmware.org`_ and `review.trustedfirmware.org`_.
+
+-  If you plan to contribute a major piece of work, it is usually a good idea to
+   start a discussion around it on the mailing list. This gives everyone
+   visibility of what is coming up, you might learn that somebody else is
+   already working on something similar or the community might be able to
+   provide some early input to help shaping the design of the feature.
+
+   If you intend to include Third Party IP in your contribution, please mention
+   it explicitly in the email thread and ensure that the changes that include
+   Third Party IP are made in a separate patch (or patch series).
+
+-  Clone `Trusted Firmware-A`_ on your own machine as described in
+   :ref:`prerequisites_get_source`.
+
+-  Create a local topic branch based on the `Trusted Firmware-A`_ ``master``
+   branch.
+
+Making Changes
+==============
+
+-  Ensure commits adhere to the the project's :ref:`Commit Style`.
+
+-  Make commits of logical units. See these general `Git guidelines`_ for
+   contributing to a project.
+
+-  Keep the commits on topic. If you need to fix another bug or make another
+   enhancement, please address it on a separate topic branch.
+
+-  Split the patch in manageable units. Small patches are usually easier to
+   review so this will speed up the review process.
+
+-  Avoid long commit series. If you do have a long series, consider whether
+   some commits should be squashed together or addressed in a separate topic.
+
+-  Follow the :ref:`Coding Style` and :ref:`Coding Guidelines`.
+
+   -  Use the checkpatch.pl script provided with the Linux source tree. A
+      Makefile target is provided for convenience, see :ref:`this
+      section<automatic-compliance-checking>` for more details.
+
+-  Where appropriate, please update the documentation.
+
+   -  Consider whether the :ref:`Porting Guide`, :ref:`Firmware Design` document
+      or other in-source documentation needs updating.
+
+   -  If you are submitting new files that you intend to be the code owner for
+      (for example, a new platform port), then also update the
+      :ref:`code owners` file.
+
+   -  For topics with multiple commits, you should make all documentation changes
+      (and nothing else) in the last commit of the series. Otherwise, include
+      the documentation changes within the single commit.
+
+.. _copyright-license-guidance:
+
+-  Ensure that each changed file has the correct copyright and license
+   information. Files that entirely consist of contributions to this project
+   should have a copyright notice and BSD-3-Clause SPDX license identifier of
+   the form as shown in :ref:`license`. Files that contain changes to imported
+   Third Party IP files should retain their original copyright and license
+   notices.
+
+   For significant contributions you may add your own copyright notice in the
+   following format:
+
+   ::
+
+       Portions copyright (c) [XXXX-]YYYY, <OWNER>. All rights reserved.
+
+   where XXXX is the year of first contribution (if different to YYYY) and YYYY
+   is the year of most recent contribution. <OWNER> is your name or your company
+   name.
+
+-  Ensure that each patch in the patch series compiles in all supported
+   configurations. Patches which do not compile will not be merged.
+
+-  Please test your changes. As a minimum, ensure that Linux boots on the
+   Foundation FVP. See :ref:`Arm Fixed Virtual Platforms (FVP)` for more
+   information. For more extensive testing, consider running the `TF-A Tests`_
+   against your patches.
+
+-  Ensure that all CI automated tests pass. Failures should be fixed. They might
+   block a patch, depending on how critical they are.
+
+Submitting Changes
+==================
+
+-  Submit your changes for review at https://review.trustedfirmware.org
+   targeting the ``integration`` branch.
+
+-  Add reviewers for your patch:
+
+   -  At least one code owner for each module modified by the patch. See the list
+      of modules and their :ref:`code owners`.
+
+   -  At least one maintainer. See the list of :ref:`maintainers`.
+
+   -  If some module has no code owner, try to identify a suitable (non-code
+      owner) reviewer. Running ``git blame`` on the module's source code can
+      help, as it shows who has been working the most recently on this area of
+      the code.
+
+      Alternatively, if it is impractical to identify such a reviewer, you might
+      send an email to the `TF-A mailing list`_ to broadcast your review request
+      to the community.
+
+   Note that self-reviewing a patch is prohibited, even if the patch author is
+   the only code owner of a module modified by the patch. Getting a second pair
+   of eyes on the code is essential to keep up with the quality standards the
+   project aspires to.
+
+-  The changes will then undergo further review by the designated people. Any
+   review comments will be made directly on your patch. This may require you to
+   do some rework. For controversial changes, the discussion might be moved to
+   the `TF-A mailing list`_ to involve more of the community.
+
+   Refer to the `Gerrit Uploading Changes documentation`_ for more details.
+
+-  The patch submission rules are the following. For a patch to be approved
+   and merged in the tree, it must get:
+
+   -  One ``Code-Owner-Review+1`` for each of the modules modified by the patch.
+   -  A ``Maintainer-Review+1``.
+
+   In the case where a code owner could not be found for a given module,
+   ``Code-Owner-Review+1`` is substituted by ``Code-Review+1``.
+
+   In addition to these various code review labels, the patch must also get a
+   ``Verified+1``. This is usually set by the Continuous Integration (CI) bot
+   when all automated tests passed on the patch. Sometimes, some of these
+   automated tests may fail for reasons unrelated to the patch. In this case,
+   the maintainers might (after analysis of the failures) override the CI bot
+   score to certify that the patch has been correctly tested.
+
+   In the event where the CI system lacks proper tests for a patch, the patch
+   author or a reviewer might agree to perform additional manual tests
+   in their review and the reviewer incorporates the review of the additional
+   testing in the ``Code-Review+1`` or ``Code-Owner-Review+1`` as applicable to
+   attest that the patch works as expected. Where possible additional tests should
+   be added to the CI system as a follow up task. For example, for a
+   platform-dependent patch where the said platform is not available in the CI
+   system's board farm.
+
+-  When the changes are accepted, the :ref:`maintainers` will integrate them.
+
+   -  Typically, the :ref:`maintainers` will merge the changes into the
+      ``integration`` branch.
+
+   -  If the changes are not based on a sufficiently-recent commit, or if they
+      cannot be automatically rebased, then the :ref:`maintainers` may rebase it
+      on the ``integration`` branch or ask you to do so.
+
+   -  After final integration testing, the changes will make their way into the
+      ``master`` branch. If a problem is found during integration, the
+      :ref:`maintainers` will request your help to solve the issue. They may
+      revert your patches and ask you to resubmit a reworked version of them or
+      they may ask you to provide a fix-up patch.
+
+Add CI Configurations
+=====================
+
+-  TF-A uses Jenkins tool for Continuous Integration and testing activities.
+   Various CI Jobs are deployed which run tests on every patch before being
+   merged. So each of your patches go through a series of checks before they
+   get merged on to the master branch. Kindly ensure, that everytime you add
+   new files under your platform, they are covered under the following two sections:
+
+Coverity Scan
+-------------
+
+-  ``Coverity Scan analysis`` is one of the tests we perform on our source code
+   at regular intervals. We maintain a build script ``tf-cov-make`` which contains the
+   build configurations of various platforms in order to cover the entire source
+   code being analysed by Coverity.
+
+-  When you submit your patches for review containing new source files, please
+   ensure to include them for the ``Coverity Scan analysis`` by adding the
+   respective build configurations in the ``tf-cov-make`` build script.
+
+-  In this section you find the details on how to append your new build
+   configurations for Coverity scan analysis illustrated with examples:
+
+#. We maintain a separate repository named `tf-a-ci-scripts repository`_
+   for placing all the test scripts which will be executed by the CI Jobs.
+
+#. In this repository, ``tf-cov-make`` script is located at
+   ``tf-a-ci-scripts/script/tf-coverity/tf-cov-make``
+
+#. Edit `tf-cov-make`_ script by appending all the possible build configurations with
+   the specific ``build-flags`` relevant to your platform, so that newly added
+   source files get built and analysed by Coverity.
+
+#. For better understanding follow the below specified examples listed in the
+   ``tf-cov-make`` script.
+
+.. code:: shell
+
+    Example 1:
+    #Intel
+    make PLAT=stratix10 $(common_flags) all
+    make PLAT=agilex $(common_flags) all
+
+-  In the above example there are two different SoCs ``stratix`` and ``agilex``
+   under the Intel platform and the build configurations has been added suitably
+   to include most of their source files.
+
+.. code:: shell
+
+    Example 2:
+    #Hikey
+    make PLAT=hikey $(common_flags) ${TBB_OPTIONS} ENABLE_PMF=1 all
+    make PLAT=hikey960 $(common_flags) ${TBB_OPTIONS} all
+    make PLAT=poplar $(common_flags) all
+
+-  In this case for ``Hikey`` boards additional ``build-flags`` has been included
+   along with the ``commom_flags`` to cover most of the files relevant to it.
+
+-  Similar to this you can still find many other different build configurations
+   of various other platforms listed in the ``tf-cov-make`` script. Kindly refer
+   them and append your build configurations respectively.
+
+Test Build Configuration (``tf-l1-build-plat``)
+-----------------------------------------------
+
+-  Coverity Scan analysis, runs on a daily basis and will not be triggered for
+   every individual trusted-firmware patch.
+
+-  Considering this, we have other distinguished CI jobs which run a set of test
+   configurations on every patch, before they are being passed to ``Coverity scan analysis``.
+
+-  ``tf-l1-build-plat`` is the test group, which holds the test configurations
+   to build all the platforms. So be kind enough to verify that your newly added
+   files are built as part of one of the existing platform configurations present
+   in ``tf-l1-build-plat`` test group.
+
+-  In this section you find the details on how to add the appropriate files,
+   needed to build your newly introduced platform as part of ``tf-l1-build-plat``
+   test group, illustrated with an example:
+
+-  Lets consider ``Hikey`` platform:
+   In the `tf-a-ci-scripts repository`_ we need to add a build configuration file ``hikey-default``
+   under tf_config folder, ``tf_config/hikey-default`` listing all the build parameters
+   relevant to it.
+
+.. code:: shell
+
+   #Hikey Build Parameters
+   CROSS_COMPILE=aarch64-none-elf-
+   PLAT=hikey
+
+-  Further a test-configuration file ``hikey-default:nil`` need to be added under the
+   test group, ``tf-l1-build-plat`` located at ``tf-a-ci-scripts/group/tf-l1-build-plat``,
+   to allow the platform to be built as part of this group.
+
+.. code:: shell
+
+   #
+   # Copyright (c) 2019-2022 Arm Limited. All rights reserved.
+   #
+   # SPDX-License-Identifier: BSD-3-Clause
+   #
+
+-  As illustrated above, you need to add the similar files supporting your platform.
+
+Binary Components
+=================
+
+-  Platforms may depend on binary components submitted to the `Trusted Firmware
+   binary repository`_ if they require code that the contributor is unable or
+   unwilling to open-source. This should be used as a rare exception.
+-  All binary components must follow the contribution guidelines (in particular
+   licensing rules) outlined in the `readme.rst <tf-binaries-readme_>`_ file of
+   the binary repository.
+-  Binary components must be restricted to only the specific functionality that
+   cannot be open-sourced and must be linked into a larger open-source platform
+   port. The majority of the platform port must still be implemented in open
+   source. Platform ports that are merely a thin wrapper around a binary
+   component that contains all the actual code will not be accepted.
+-  Only platform port code (i.e. in the ``plat/<vendor>`` directory) may rely on
+   binary components. Generic code must always be fully open-source.
+
+--------------
+
+*Copyright (c) 2013-2022, Arm Limited and Contributors. All rights reserved.*
+
+.. _developer.trustedfirmware.org: https://developer.trustedfirmware.org
+.. _review.trustedfirmware.org: https://review.trustedfirmware.org
+.. _Trusted Firmware-A: https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git
+.. _Git guidelines: http://git-scm.com/book/ch5-2.html
+.. _Gerrit Uploading Changes documentation: https://review.trustedfirmware.org/Documentation/user-upload.html
+.. _TF-A Tests: https://trustedfirmware-a-tests.readthedocs.io
+.. _Trusted Firmware binary repository: https://review.trustedfirmware.org/admin/repos/tf-binaries
+.. _tf-binaries-readme: https://git.trustedfirmware.org/tf-binaries.git/tree/readme.rst
+.. _TF-A mailing list: https://lists.trustedfirmware.org/mailman3/lists/tf-a.lists.trustedfirmware.org/
+.. _tf-a-ci-scripts repository: https://git.trustedfirmware.org/ci/tf-a-ci-scripts.git/
+.. _tf-cov-make: https://git.trustedfirmware.org/ci/tf-a-ci-scripts.git/tree/script/tf-coverity/tf-cov-make

arm-trusted-firmware/docs/process/faq.rst

@@ -0,0 +1,80 @@
+Frequently-Asked Questions (FAQ)
+================================
+
+How do I update my changes?
+---------------------------
+
+Often it is necessary to update your patch set before it is merged. Refer to the
+`Gerrit Upload Patch Set documentation`_ on how to do so.
+
+If you need to modify an existing patch set with multiple commits, refer to the
+`Gerrit Replace Changes documentation`_.
+
+How long will my changes take to merge into ``integration``?
+------------------------------------------------------------
+
+This can vary a lot, depending on:
+
+* How important the patch set is considered by the TF maintainers. Where
+  possible, you should indicate the required timescales for merging the patch
+  set and the impact of any delay. Feel free to add a comment to your patch set
+  to get an estimate of when it will be merged.
+
+* The quality of the patch set. Patches are likely to be merged more quickly if
+  they follow the coding guidelines, have already had some code review, and have
+  been appropriately tested.
+
+* The impact of the patch set. For example, a patch that changes a key generic
+  API is likely to receive much greater scrutiny than a local change to a
+  specific platform port.
+
+* How much opportunity for external review is required. For example, the TF
+  maintainers may not wait for external review comments to merge trivial
+  bug-fixes but may wait up to a week to merge major changes, or ones requiring
+  feedback from specific parties.
+
+* How many other patch sets are waiting to be integrated and the risk of
+  conflict between the topics.
+
+* If there is a code freeze in place in preparation for the release. Please
+  refer the :ref:`Release Processes` document for more details.
+
+* The workload of the TF maintainers.
+
+How long will it take for my changes to go from ``integration`` to ``master``?
+------------------------------------------------------------------------------
+
+This depends on how many concurrent patches are being processed at the same
+time. In simple cases where all potential regressions have already been tested,
+the delay will be less than 1 day. If the TF maintainers are trying to merge
+several things over the course of a few days, it might take up to a week.
+Typically, it will be 1-2 days.
+
+The worst case is if the TF maintainers are trying to make a release while also
+receiving patches that will not be merged into the release. In this case, the
+patches will be merged onto ``integration``, which will temporarily diverge from
+the release branch. The ``integration`` branch will be rebased onto ``master``
+after the release, and then ``master`` will be fast-forwarded to ``integration``
+1-2 days later. This whole process could take up 4 weeks. Please refer to the
+:ref:`Release Processes` document for code freeze dates. The TF maintainers
+will inform the patch owner if this is going to happen.
+
+It is OK to create a patch based on commits that are only available in
+``integration`` or another patch set, rather than ``master``. There is a risk
+that the dependency commits will change (for example due to patch set rework or
+integration problems). If this happens, the dependent patch will need reworking.
+
+What are these strange comments in my changes?
+----------------------------------------------
+
+All the comments from ``ci-bot-user`` are associated with Continuous Integration
+infrastructure. The links published on the comment are not currently accessible,
+but would be after the CI has been transitioned to `trustedfirmware.org`_.
+
+--------------
+
+*Copyright (c) 2019-2020, Arm Limited. All rights reserved.*
+
+.. _Gerrit Upload Patch Set documentation: https://review.trustedfirmware.org/Documentation/intro-user.html#upload-patch-set
+.. _Gerrit Replace Changes documentation: https://review.trustedfirmware.org/Documentation/user-upload.html#push_replace
+.. _trustedfirmware.org: https://www.trustedfirmware.org/

arm-trusted-firmware/docs/process/index.rst

@@ -0,0 +1,16 @@
+Processes & Policies
+====================
+
+.. toctree::
+   :maxdepth: 1
+   :caption: Contents
+
+   security
+   platform-ports-policy
+   commit-style
+   coding-style
+   coding-guidelines
+   contributing
+   code-review-guidelines
+   faq
+   security-hardening

arm-trusted-firmware/docs/process/platform-ports-policy.rst

@@ -0,0 +1,51 @@
+Platform Ports Policy
+=====================
+
+This document clarifies a couple of policy points around platform ports
+management.
+
+Platform compatibility policy
+-----------------------------
+
+Platform compatibility is mainly affected by changes to Platform APIs (as
+documented in the :ref:`Porting Guide`), driver APIs (like the GICv3 drivers) or
+library interfaces (like xlat_table library). The project will try to maintain
+compatibility for upstream platforms. Due to evolving requirements and
+enhancements, there might be changes affecting platform compatibility which
+means the previous interface needs to be deprecated and a new interface
+introduced to replace it. In case the migration to the new interface is trivial,
+the contributor of the change is expected to make good effort to migrate the
+upstream platforms to the new interface.
+
+The deprecated interfaces are listed inside :ref:`Release Processes` as well as
+the release after which each one will be removed. When an interface is
+deprecated, the page must be updated to indicate the release after which the
+interface will be removed. This must be at least 1 full release cycle in future.
+For non-trivial interface changes, an email should be sent out to the `TF-A
+public mailing list`_ to notify platforms that they should migrate away from the
+deprecated interfaces. Platforms are expected to migrate before the removal of
+the deprecated interface.
+
+Platform deprecation policy
+---------------------------
+
+If a platform is no longer maintained, it is best to deprecate it to keep the
+projects' source tree clean and healthy. Deprecation can be a 1-stage or 2-stage
+process (up to the platform maintainers).
+
+ - *2-stage*: The platform's source code can be kept in the repository for a
+   cooling off period before deleting it (typically 2 release cycles). In this
+   case, we keep track ot the *Deprecated* version separately from the *Deleted*
+   version.
+
+ - *1-stage*: The platform's source code can be deleted straight away. In this
+   case, both versions are the same.
+
+The :ref:`Platform Ports` page provides a list of all deprecated/deleted
+platform ports (or soon to be) to this day.
+
+--------------
+
+*Copyright (c) 2018-2022, Arm Limited and Contributors. All rights reserved.*
+
+.. _TF-A public mailing list: https://lists.trustedfirmware.org/mailman3/lists/tf-a.lists.trustedfirmware.org/

arm-trusted-firmware/docs/process/security-hardening.rst

@@ -0,0 +1,175 @@
+Secure Development Guidelines
+=============================
+
+This page contains guidance on what to check for additional security measures,
+including build options that can be modified to improve security or catch issues
+early in development.
+
+Security considerations
+-----------------------
+
+Part of the security of a platform is handling errors correctly, as described in
+the previous section. There are several other security considerations covered in
+this section.
+
+Do not leak secrets to the normal world
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+The secure world **must not** leak secrets to the normal world, for example in
+response to an SMC.
+
+Handling Denial of Service attacks
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+The secure world **should never** crash or become unusable due to receiving too
+many normal world requests (a *Denial of Service* or *DoS* attack). It should
+have a mechanism for throttling or ignoring normal world requests.
+
+Preventing Secure-world timing information leakage via PMU counters
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+The Secure world needs to implement some defenses to prevent the Non-secure
+world from making it leak timing information. In general, higher privilege
+levels must defend from those below when the PMU is treated as an attack
+vector.
+
+Refer to the :ref:`Performance Monitoring Unit` guide for detailed information
+on the PMU registers.
+
+Timing leakage attacks from the Non-secure world
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+Since the Non-secure world has access to the ``PMCR`` register, it can
+configure the PMU to increment counters at any exception level and in both
+Secure and Non-secure state. Thus, it attempts to leak timing information from
+the Secure world.
+
+Shown below is an example of such a configuration:
+
+-  ``PMEVTYPER0_EL0`` and ``PMCCFILTR_EL0``:
+
+   -  Set ``P`` to ``0``.
+   -  Set ``NSK`` to ``1``.
+   -  Set ``M`` to ``0``.
+   -  Set ``NSH`` to ``0``.
+   -  Set ``SH`` to ``1``.
+
+-  ``PMCNTENSET_EL0``:
+
+   -  Set ``P[0]`` to ``1``.
+   -  Set ``C`` to ``1``.
+
+-  ``PMCR_EL0``:
+
+   -  Set ``DP`` to ``0``.
+   -  Set ``E`` to ``1``.
+
+This configuration instructs ``PMEVCNTR0_EL0`` and ``PMCCNTR_EL0`` to increment
+at Secure EL1, Secure EL2 (if implemented) and EL3.
+
+Since the Non-secure world has fine-grained control over where (at which
+exception levels) it instructs counters to increment, obtaining event counts
+would allow it to carry out side-channel timing attacks against the Secure
+world. Examples include Spectre, Meltdown, as well as extracting secrets from
+cryptographic algorithms with data-dependent variations in their execution
+time.
+
+Secure world mitigation strategies
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+The ``MDCR_EL3`` register allows EL3 to configure the PMU (among other things).
+The `Arm ARM`_ details all of the bit fields in this register, but for the PMU
+there are two bits which determine the permissions of the counters:
+
+-  ``SPME`` for the programmable counters.
+-  ``SCCD`` for the cycle counter.
+
+Depending on the implemented features, the Secure world can prohibit counting
+in AArch64 state via the following:
+
+-  ARMv8.2-Debug not implemented:
+
+   -  Prohibit general event counters and the cycle counter:
+      ``MDCR_EL3.SPME == 0 && PMCR_EL0.DP == 1 && !ExternalSecureNoninvasiveDebugEnabled()``.
+
+      -  ``MDCR_EL3.SPME`` resets to ``0``, so by default general events should
+         not be counted in the Secure world.
+      -  The ``PMCR_EL0.DP`` bit therefore needs to be set to ``1`` when EL3 is
+         entered and ``PMCR_EL0`` needs to be saved and restored in EL3.
+      -  ``ExternalSecureNoninvasiveDebugEnabled()`` is an authentication
+         interface which is implementation-defined unless ARMv8.4-Debug is
+         implemented. The `Arm ARM`_ has detailed information on this topic.
+
+   -  The only other way is to disable the ``PMCR_EL0.E`` bit upon entering
+      EL3, which disables counting altogether.
+
+-  ARMv8.2-Debug implemented:
+
+   -  Prohibit general event counters: ``MDCR_EL3.SPME == 0``.
+   -  Prohibit cycle counter: ``MDCR_EL3.SPME == 0 && PMCR_EL0.DP == 1``.
+      ``PMCR_EL0`` therefore needs to be saved and restored in EL3.
+
+-  ARMv8.5-PMU implemented:
+
+   -  Prohibit general event counters: as in ARMv8.2-Debug.
+   -  Prohibit cycle counter: ``MDCR_EL3.SCCD == 1``
+
+In Aarch32 execution state the ``MDCR_EL3`` alias is the ``SDCR`` register,
+which has some of the bit fields of ``MDCR_EL3``, most importantly the ``SPME``
+and ``SCCD`` bits.
+
+Build options
+-------------
+
+Several build options can be used to check for security issues. Refer to the
+:ref:`Build Options` for detailed information on these.
+
+- The ``BRANCH_PROTECTION`` build flag can be used to enable Pointer
+  Authentication and Branch Target Identification.
+
+- The ``ENABLE_STACK_PROTECTOR`` build flag can be used to identify buffer
+  overflows.
+
+- The ``W`` build flag can be used to enable a number of compiler warning
+  options to detect potentially incorrect code.
+
+  - W=0 (default value)
+
+    The ``Wunused`` with ``Wno-unused-parameter``, ``Wdisabled-optimization``
+    and ``Wvla`` flags are enabled.
+
+    The ``Wunused-but-set-variable``, ``Wmaybe-uninitialized`` and
+    ``Wpacked-bitfield-compat`` are GCC specific flags that are also enabled.
+
+  - W=1
+
+    Adds ``Wextra``, ``Wmissing-format-attribute``, ``Wmissing-prototypes``,
+    ``Wold-style-definition`` and ``Wunused-const-variable``.
+
+  - W=2
+
+    Adds ``Waggregate-return``, ``Wcast-align``, ``Wnested-externs``,
+    ``Wshadow``, ``Wlogical-op``.
+
+  - W=3
+
+    Adds ``Wbad-function-cast``, ``Wcast-qual``, ``Wconversion``, ``Wpacked``,
+    ``Wpointer-arith``, ``Wredundant-decls`` and
+    ``Wswitch-default``.
+
+  Refer to the GCC or Clang documentation for more information on the individual
+  options: https://gcc.gnu.org/onlinedocs/gcc/Warning-Options.html and
+  https://clang.llvm.org/docs/DiagnosticsReference.html.
+
+  NB: The ``Werror`` flag is enabled by default in TF-A and can be disabled by
+  setting the ``E`` build flag to 0.
+
+.. rubric:: References
+
+-  `Arm ARM`_
+
+--------------
+
+*Copyright (c) 2019-2020, Arm Limited. All rights reserved.*
+
+.. _Arm ARM: https://developer.arm.com/docs/ddi0487/latest

arm-trusted-firmware/docs/process/security.rst

@@ -0,0 +1,89 @@
+Security Handling
+=================
+
+Security Disclosures
+--------------------
+
+We disclose all security vulnerabilities we find, or are advised about, that are
+relevant to Trusted Firmware-A. We encourage responsible disclosure of
+vulnerabilities and inform users as best we can about all possible issues.
+
+We disclose TF-A vulnerabilities as Security Advisories, all of which are listed
+at the bottom of this page. Any new ones will, additionally, be announced as
+issues in the project's `issue tracker`_ with the ``security-advisory`` tag. You
+can receive notification emails for these by watching the "Trusted Firmware-A"
+project at https://developer.trustedfirmware.org/.
+
+Found a Security Issue?
+-----------------------
+
+Although we try to keep TF-A secure, we can only do so with the help of the
+community of developers and security researchers.
+
+.. warning::
+   If you think you have found a security vulnerability, please **do not**
+   report it in the `issue tracker`_ or on the `mailing list`_. Instead, please
+   follow the `TrustedFirmware.org security incident process`_.
+
+One of the goals of this process is to ensure providers of products that use
+TF-A have a chance to consider the implications of the vulnerability and its
+remedy before it is made public. As such, please follow the disclosure plan
+outlined in the process. We do our best to respond and fix any issues quickly.
+
+Afterwards, we encourage you to write-up your findings about the TF-A source
+code.
+
+Attribution
+-----------
+
+We will name and thank you in the :ref:`Change Log & Release Notes` distributed
+with the source code and in any published security advisory.
+
+Security Advisories
+-------------------
+
++-----------+------------------------------------------------------------------+
+| ID        | Title                                                            |
++===========+==================================================================+
+|  |TFV-1|  | Malformed Firmware Update SMC can result in copy of unexpectedly |
+|           | large data into secure memory                                    |
++-----------+------------------------------------------------------------------+
+|  |TFV-2|  | Enabled secure self-hosted invasive debug interface can allow    |
+|           | normal world to panic secure world                               |
++-----------+------------------------------------------------------------------+
+|  |TFV-3|  | RO memory is always executable at AArch64 Secure EL1             |
++-----------+------------------------------------------------------------------+
+|  |TFV-4|  | Malformed Firmware Update SMC can result in copy or              |
+|           | authentication of unexpected data in secure memory in AArch32    |
+|           | state                                                            |
++-----------+------------------------------------------------------------------+
+|  |TFV-5|  | Not initializing or saving/restoring PMCR_EL0 can leak secure    |
+|           | world timing information                                         |
++-----------+------------------------------------------------------------------+
+|  |TFV-6|  | Trusted Firmware-A exposure to speculative processor             |
+|           | vulnerabilities using cache timing side-channels                 |
++-----------+------------------------------------------------------------------+
+|  |TFV-7|  | Trusted Firmware-A exposure to cache speculation vulnerability   |
+|           | Variant 4                                                        |
++-----------+------------------------------------------------------------------+
+|  |TFV-8|  | Not saving x0 to x3 registers can leak information from one      |
+|           | Normal World SMC client to another                               |
++-----------+------------------------------------------------------------------+
+
+.. _issue tracker: https://developer.trustedfirmware.org/project/board/1/
+.. _mailing list: https://lists.trustedfirmware.org/mailman3/lists/tf-a.lists.trustedfirmware.org/
+
+.. |TFV-1| replace:: :ref:`Advisory TFV-1 (CVE-2016-10319)`
+.. |TFV-2| replace:: :ref:`Advisory TFV-2 (CVE-2017-7564)`
+.. |TFV-3| replace:: :ref:`Advisory TFV-3 (CVE-2017-7563)`
+.. |TFV-4| replace:: :ref:`Advisory TFV-4 (CVE-2017-9607)`
+.. |TFV-5| replace:: :ref:`Advisory TFV-5 (CVE-2017-15031)`
+.. |TFV-6| replace:: :ref:`Advisory TFV-6 (CVE-2017-5753, CVE-2017-5715, CVE-2017-5754)`
+.. |TFV-7| replace:: :ref:`Advisory TFV-7 (CVE-2018-3639)`
+.. |TFV-8| replace:: :ref:`Advisory TFV-8 (CVE-2018-19440)`
+
+.. _TrustedFirmware.org security incident process: https://developer.trustedfirmware.org/w/collaboration/security_center/
+
+--------------
+
+*Copyright (c) 2019-2022, Arm Limited. All rights reserved.*