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tegra: hwpm: add clk rate as chip variable
LA clock rate is specific to a chip. Move LA clock rate macro as a chip specific variable. Set la_clk_rate variable to correct value for T234 and TH500 chips. Jira THWPM-112 Change-Id: I962cf579aed33d91d0abbfb8a44fc4063dc8444c Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/3140419 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -31,6 +31,7 @@
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#include <hal/t234/t234_internal.h>
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#include <hal/t234/t234_internal.h>
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static struct tegra_soc_hwpm_chip t234_chip_info = {
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static struct tegra_soc_hwpm_chip t234_chip_info = {
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.la_clk_rate = 625000000,
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.chip_ips = NULL,
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.chip_ips = NULL,
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/* HALs */
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/* HALs */
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@@ -30,6 +30,7 @@
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#include <hal/th500/soc/th500_soc_internal.h>
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#include <hal/th500/soc/th500_soc_internal.h>
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static struct tegra_soc_hwpm_chip th500_chip_info = {
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static struct tegra_soc_hwpm_chip th500_chip_info = {
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.la_clk_rate = 625000000,
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.chip_ips = NULL,
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.chip_ips = NULL,
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/* HALs */
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/* HALs */
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@@ -463,6 +463,9 @@ struct hwpm_ip {
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struct tegra_soc_hwpm;
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struct tegra_soc_hwpm;
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struct tegra_soc_hwpm_chip {
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struct tegra_soc_hwpm_chip {
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/* Max LA Clock rate */
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u64 la_clk_rate;
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/* Array of pointers to active IP structures */
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/* Array of pointers to active IP structures */
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struct hwpm_ip **chip_ips;
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struct hwpm_ip **chip_ips;
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@@ -23,8 +23,6 @@
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#include <tegra_hwpm_clk_rst.h>
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#include <tegra_hwpm_clk_rst.h>
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#include <os/linux/driver.h>
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#include <os/linux/driver.h>
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#define LA_CLK_RATE 625000000UL
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int tegra_hwpm_clk_rst_prepare(struct tegra_hwpm_os_linux *hwpm_linux)
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int tegra_hwpm_clk_rst_prepare(struct tegra_hwpm_os_linux *hwpm_linux)
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{
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{
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int ret = 0;
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int ret = 0;
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@@ -93,8 +91,9 @@ int tegra_hwpm_clk_rst_set_rate_enable(struct tegra_hwpm_os_linux *hwpm_linux)
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goto fail;
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goto fail;
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}
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}
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}
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}
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/* set la_clk rate to 625 MHZ */
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/* set la_clk rate */
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ret = clk_set_rate(hwpm_linux->la_clk, LA_CLK_RATE);
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ret = clk_set_rate(hwpm_linux->la_clk,
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hwpm->active_chip->la_clk_rate);
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if (ret < 0) {
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if (ret < 0) {
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tegra_hwpm_err(hwpm, "la clock set rate failed");
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tegra_hwpm_err(hwpm, "la clock set rate failed");
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goto fail;
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goto fail;
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