tegra: hwpm: add cpu_ext_* enums

Add new CPU IP and resource enum in
kernel driver and userspace library.
This is to extend support for chips with
more than 32 CPU instances (up to 128).

JIRA MSST-893

Change-Id: I33142c7fc8f268f8c436cc3b7cd97385da31b558
Signed-off-by: Besar Wicaksono <bwicaksono@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/3328654
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Yifei Wan <ywan@nvidia.com>
Reviewed-by: Vasuki Shankar <vasukis@nvidia.com>
This commit is contained in:
Besar Wicaksono
2025-03-25 23:32:50 +00:00
committed by mobile promotions
parent a4b7ab4486
commit 106bc61f86
5 changed files with 53 additions and 6 deletions

View File

@@ -61,7 +61,10 @@ enum tegra_soc_hwpm_ip {
TEGRA_SOC_HWPM_IP_UCF_CSW,
TEGRA_SOC_HWPM_IP_UCF_HUB,
TEGRA_SOC_HWPM_IP_UCF_SCB,
TEGRA_SOC_HWPM_IP_CPU,
TEGRA_SOC_HWPM_IP_CPU, /* CPU instance 0-31 */
TEGRA_SOC_HWPM_IP_CPU_EXT_0, /* CPU (extended) instance 32-63 */
TEGRA_SOC_HWPM_IP_CPU_EXT_1, /* CPU (extended) instance 64-95 */
TEGRA_SOC_HWPM_IP_CPU_EXT_2, /* CPU (extended) instance 96-127 */
TEGRA_SOC_HWPM_IP_NVTHERM,
TEGRA_SOC_HWPM_IP_CSN, /* CSN instance 0-31 */
TEGRA_SOC_HWPM_IP_CSN_EXT_0, /* CSN (extended) instance 32-63 */
@@ -152,7 +155,10 @@ enum tegra_soc_hwpm_resource {
TEGRA_SOC_HWPM_RESOURCE_UCF_CSW,
TEGRA_SOC_HWPM_RESOURCE_UCF_HUB,
TEGRA_SOC_HWPM_RESOURCE_UCF_SCB,
TEGRA_SOC_HWPM_RESOURCE_CPU,
TEGRA_SOC_HWPM_RESOURCE_CPU, /* CPU instance 0-31 */
TEGRA_SOC_HWPM_RESOURCE_CPU_EXT_0, /* CPU (extended) instance 32-63 */
TEGRA_SOC_HWPM_RESOURCE_CPU_EXT_1, /* CPU (extended) instance 64-95 */
TEGRA_SOC_HWPM_RESOURCE_CPU_EXT_2, /* CPU (extended) instance 96-127 */
TEGRA_SOC_HWPM_RESOURCE_NVTHERM,
TEGRA_SOC_HWPM_RESOURCE_CSN, /* CSN instance 0-31 */
TEGRA_SOC_HWPM_RESOURCE_CSN_EXT_0, /* CSN (extended) instance 32-63 */