tegra: hwpm: use kstable available APIS

- Some of the APIs are not available on stable kernel. Use kstable
specific APIs with LINUX_KERNEL macro condition.
- Temporarily comment functions that are not available on Kstable.
- Next chip headers are renamed to accommodate more than one next chip.
Update next chip includes in init.c and driver.c files.
- Rename TEGRA_SOC_HWPM_IP_INACTIVE to TEGRA_HWPM_IP_INACTIVE to follow
other macro/enum naming convention.
- Use is_resource_active() HAL instead of chip specific function.
- Create clock reset functions that will allow us to handle change in
APIs on kstable.

Jira THWPM-41

Change-Id: I55f58fa51cf9ae96ee9a9565942e68b3b2bb76ee
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2764840
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>

os/linux/soc_utils.c

@@ -11,29 +11,109 @@
  * more details.
  */
 
-#include <soc/tegra/fuse.h>
+#include <linux/of.h>
+#include <soc/tegra/fuse-helper.h>
 
 #include <tegra_hwpm.h>
 #include <tegra_hwpm_soc.h>
 
-bool tegra_hwpm_is_platform_simulation_impl(void)
+#if defined(CONFIG_TEGRA_HWPM_OOT)
+#if defined(CONFIG_TEGRA_NEXT1_HWPM)
+#include <os/linux/next1_soc_utils.h>
+#endif
+#endif
+
+u32 tegra_hwpm_get_chip_id_impl(void)
 {
-	return tegra_platform_is_vdk();
+#if defined(CONFIG_TEGRA_HWPM_OOT)
+	if (of_machine_is_compatible("nvidia,tegra234")) {
+		return 0x23U;
+	}
+#ifdef CONFIG_TEGRA_NEXT1_HWPM
+		return tegra_hwpm_next1_get_chip_id_impl();
+#else
+		return 0x0U;
+#endif /* CONFIG_TEGRA_NEXT1_HWPM */
+#else
+	return (u32)tegra_get_chip_id();
+#endif /* CONFIG_TEGRA_HWPM_OOT */
 }
 
-bool tegra_hwpm_is_platform_vsp_impl(void)
+u32 tegra_hwpm_get_major_rev_impl(void)
 {
-	return tegra_platform_is_vsp();
+#if defined(CONFIG_TEGRA_HWPM_OOT)
+	if (of_machine_is_compatible("nvidia,tegra234")) {
+		return 0x4U;
+	}
+#ifdef CONFIG_TEGRA_NEXT1_HWPM
+		return tegra_hwpm_next1_get_major_rev_impl();
+#else
+		return 0x0U;
+#endif /* CONFIG_TEGRA_NEXT1_HWPM */
+#else
+	return (u32)tegra_get_major_rev();
+#endif
+}
+
+u32 tegra_hwpm_chip_get_revision_impl(void)
+{
+#if defined(CONFIG_TEGRA_HWPM_OOT)
+	return 0x0U;
+#else
+	return (u32)tegra_chip_get_revision();
+#endif
+}
+
+u32 tegra_hwpm_get_platform_impl(void)
+{
+#if defined(CONFIG_TEGRA_HWPM_OOT)
+	if (of_machine_is_compatible("nvidia,tegra234")) {
+		return PLAT_SI;
+	}
+#ifdef CONFIG_TEGRA_NEXT1_HWPM
+		return tegra_hwpm_next1_get_platform_impl();
+#else
+		return PLAT_INVALID;
+#endif /* CONFIG_TEGRA_NEXT1_HWPM */
+#else
+	return (u32)tegra_get_platform();
+#endif
 }
 
 bool tegra_hwpm_is_platform_silicon_impl(void)
 {
+#if defined(CONFIG_TEGRA_HWPM_OOT)
 	return tegra_platform_is_silicon();
+#else
+	return tegra_platform_is_silicon();
+#endif
+}
+
+bool tegra_hwpm_is_platform_simulation_impl(void)
+{
+#if defined(CONFIG_TEGRA_HWPM_OOT)
+	return tegra_hwpm_get_platform() == PLAT_PRE_SI_VDK;
+#else
+	return tegra_platform_is_vdk();
+#endif
+}
+
+bool tegra_hwpm_is_platform_vsp_impl(void)
+{
+#if defined(CONFIG_TEGRA_HWPM_OOT)
+	return tegra_hwpm_get_platform() == PLAT_PRE_SI_VSP;
+#else
+	return tegra_platform_is_vsp();
+#endif
 }
 
 bool tegra_hwpm_is_hypervisor_mode_impl(void)
 {
+#if defined(CONFIG_TEGRA_HWPM_OOT)
+	return false;
+#else
 	return is_tegra_hypervisor_mode();
+#endif
 }
 
 int tegra_hwpm_fuse_readl_impl(struct tegra_soc_hwpm *hwpm,