tegra: hwpm: add ucf ip and resource enums

UCF component is comprised of many sub-units such as MSW, OSW, SCB, etc.
Add IP and resource enums for UCF sub-units that support HWPM.

Bug 4730025
Bug 4748888

Change-Id: Ib50bf9a32d807d05ed0a7f55a5aa08009227e105
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/3187986
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Vasuki Shankar <vasukis@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
This commit is contained in:
Vedashree Vidwans
2024-08-04 23:59:48 -07:00
committed by mobile promotions
parent b6fa559660
commit 1a5bd8d683
3 changed files with 50 additions and 0 deletions

View File

@@ -98,6 +98,11 @@ enum tegra_hwpm_ip_enum {
TEGRA_HWPM_IP_PCIE_XTLQ,
TEGRA_HWPM_IP_PCIE_XTLRC,
TEGRA_HWPM_IP_PCIE_XALRC,
TEGRA_HWPM_IP_UCF_MSW,
TEGRA_HWPM_IP_UCF_PSW,
TEGRA_HWPM_IP_UCF_CSW,
TEGRA_HWPM_IP_UCF_HUB,
TEGRA_HWPM_IP_UCF_SCB,
TERGA_HWPM_NUM_IPS
};
@@ -141,6 +146,11 @@ enum tegra_hwpm_resource_enum {
TEGRA_HWPM_RESOURCE_PCIE_XTLQ,
TEGRA_HWPM_RESOURCE_PCIE_XTLRC,
TEGRA_HWPM_RESOURCE_PCIE_XALRC,
TEGRA_HWPM_RESOURCE_UCF_MSW,
TEGRA_HWPM_RESOURCE_UCF_PSW,
TEGRA_HWPM_RESOURCE_UCF_CSW,
TEGRA_HWPM_RESOURCE_UCF_HUB,
TEGRA_HWPM_RESOURCE_UCF_SCB,
TERGA_HWPM_NUM_RESOURCES
};

View File

@@ -129,6 +129,21 @@ static u32 tegra_hwpm_translate_soc_hwpm_ip(struct tegra_soc_hwpm *hwpm,
case TEGRA_SOC_HWPM_IP_PCIE_XALRC:
ip_enum_idx = TEGRA_HWPM_IP_PCIE_XALRC;
break;
case TEGRA_SOC_HWPM_IP_UCF_MSW:
ip_enum_idx = TEGRA_HWPM_IP_UCF_MSW;
break;
case TEGRA_SOC_HWPM_IP_UCF_PSW:
ip_enum_idx = TEGRA_HWPM_IP_UCF_PSW;
break;
case TEGRA_SOC_HWPM_IP_UCF_CSW:
ip_enum_idx = TEGRA_HWPM_IP_UCF_CSW;
break;
case TEGRA_SOC_HWPM_IP_UCF_HUB:
ip_enum_idx = TEGRA_HWPM_IP_UCF_HUB;
break;
case TEGRA_SOC_HWPM_IP_UCF_SCB:
ip_enum_idx = TEGRA_HWPM_IP_UCF_SCB;
break;
default:
tegra_hwpm_err(hwpm,
"Queried enum tegra_soc_hwpm_ip %d is invalid",
@@ -276,6 +291,21 @@ u32 tegra_hwpm_translate_soc_hwpm_resource(struct tegra_soc_hwpm *hwpm,
case TEGRA_SOC_HWPM_RESOURCE_PCIE_XALRC:
res_enum_idx = TEGRA_HWPM_RESOURCE_PCIE_XALRC;
break;
case TEGRA_SOC_HWPM_RESOURCE_UCF_MSW:
res_enum_idx = TEGRA_HWPM_RESOURCE_UCF_MSW;
break;
case TEGRA_SOC_HWPM_RESOURCE_UCF_PSW:
res_enum_idx = TEGRA_HWPM_RESOURCE_UCF_PSW;
break;
case TEGRA_SOC_HWPM_RESOURCE_UCF_CSW:
res_enum_idx = TEGRA_HWPM_RESOURCE_UCF_CSW;
break;
case TEGRA_SOC_HWPM_RESOURCE_UCF_HUB:
res_enum_idx = TEGRA_HWPM_RESOURCE_UCF_HUB;
break;
case TEGRA_SOC_HWPM_RESOURCE_UCF_SCB:
res_enum_idx = TEGRA_HWPM_RESOURCE_UCF_SCB;
break;
default:
tegra_hwpm_err(hwpm,
"Queried enum tegra_soc_hwpm_resource %d is invalid",

View File

@@ -56,6 +56,11 @@ enum tegra_soc_hwpm_ip {
TEGRA_SOC_HWPM_IP_PCIE_XTLQ,
TEGRA_SOC_HWPM_IP_PCIE_XTLRC,
TEGRA_SOC_HWPM_IP_PCIE_XALRC,
TEGRA_SOC_HWPM_IP_UCF_MSW,
TEGRA_SOC_HWPM_IP_UCF_PSW,
TEGRA_SOC_HWPM_IP_UCF_CSW,
TEGRA_SOC_HWPM_IP_UCF_HUB,
TEGRA_SOC_HWPM_IP_UCF_SCB,
TERGA_SOC_HWPM_NUM_IPS
};
@@ -137,6 +142,11 @@ enum tegra_soc_hwpm_resource {
TEGRA_SOC_HWPM_RESOURCE_PCIE_XTLQ,
TEGRA_SOC_HWPM_RESOURCE_PCIE_XTLRC,
TEGRA_SOC_HWPM_RESOURCE_PCIE_XALRC,
TEGRA_SOC_HWPM_RESOURCE_UCF_MSW,
TEGRA_SOC_HWPM_RESOURCE_UCF_PSW,
TEGRA_SOC_HWPM_RESOURCE_UCF_CSW,
TEGRA_SOC_HWPM_RESOURCE_UCF_HUB,
TEGRA_SOC_HWPM_RESOURCE_UCF_SCB,
TERGA_SOC_HWPM_NUM_RESOURCES
};