tegra: hwpm: combine common functionality

- Many HWPM functions are performed on all apertures of all instances of
all IPs. Define below resource utility functions to perform a task on
all IPs, instances and apertures:
  - tegra_hwpm_func_all_IPs
  - tegra_hwpm_func_single_ip
  - tegra_hwpm_func_all_instance
  - tegra_hwpm_func_single_instance
  - tegra_hwpm_func_all_perfmuxes
  - tegra_hwpm_func_all_perfmons
  - tegra_hwpm_func_single_aperture
- Modify below functions to use above mentioned utility functions:
  - get allowlist size
  - combine allowlist
  - reserve resources
  - bind resources
  - release resources

This will make code more legible and maintainable.

This patch also defines new function that validates all HAL
initializations for the chip.

Jira THWPM-41

Change-Id: Icaeba4d94187b97022c0a6626584e7d61ab6d0e4
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2705524
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Vasuki Shankar <vasukis@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Vedashree Vidwans
2022-04-30 22:49:36 -07:00
committed by mobile promotions
parent c5b3d09518
commit 25f0737897
9 changed files with 621 additions and 647 deletions

View File

@@ -71,6 +71,181 @@ struct tegra_soc_hwpm_chip t234_chip_info = {
.release_sw_setup = tegra_hwpm_release_sw_setup,
};
static bool t234_hwpm_validate_hals(struct tegra_soc_hwpm *hwpm)
{
if (hwpm->active_chip->is_ip_active == NULL) {
tegra_hwpm_err(hwpm, "is_ip_active HAL uninitialized");
return false;
}
if (hwpm->active_chip->is_resource_active == NULL) {
tegra_hwpm_err(hwpm, "is_resource_active HAL uninitialized");
return false;
}
if (hwpm->active_chip->get_pma_int_idx == NULL) {
tegra_hwpm_err(hwpm, "get_pma_int_idx HAL uninitialized");
return false;
}
if (hwpm->active_chip->get_rtr_int_idx == NULL) {
tegra_hwpm_err(hwpm, "get_rtr_int_idx HAL uninitialized");
return false;
}
if (hwpm->active_chip->get_ip_max_idx == NULL) {
tegra_hwpm_err(hwpm, "get_ip_max_idx HAL uninitialized");
return false;
}
if (hwpm->active_chip->init_chip_ip_structures == NULL) {
tegra_hwpm_err(hwpm, "init_chip_ip_structures uninitialized");
return false;
}
if (hwpm->active_chip->extract_ip_ops == NULL) {
tegra_hwpm_err(hwpm, "extract_ip_ops uninitialized");
return false;
}
if (hwpm->active_chip->force_enable_ips == NULL) {
tegra_hwpm_err(hwpm, "force_enable_ips uninitialized");
return false;
}
if (hwpm->active_chip->get_fs_info == NULL) {
tegra_hwpm_err(hwpm, "get_fs_info uninitialized");
return false;
}
if (hwpm->active_chip->init_prod_values == NULL) {
tegra_hwpm_err(hwpm, "init_prod_values uninitialized");
return false;
}
if (hwpm->active_chip->disable_slcg == NULL) {
tegra_hwpm_err(hwpm, "disable_slcg uninitialized");
return false;
}
if (hwpm->active_chip->enable_slcg == NULL) {
tegra_hwpm_err(hwpm, "enable_slcg uninitialized");
return false;
}
if (hwpm->active_chip->reserve_pma == NULL) {
tegra_hwpm_err(hwpm, "reserve_pma uninitialized");
return false;
}
if (hwpm->active_chip->reserve_rtr == NULL) {
tegra_hwpm_err(hwpm, "reserve_rtr uninitialized");
return false;
}
if (hwpm->active_chip->release_pma == NULL) {
tegra_hwpm_err(hwpm, "release_pma uninitialized");
return false;
}
if (hwpm->active_chip->release_rtr == NULL) {
tegra_hwpm_err(hwpm, "release_rtr uninitialized");
return false;
}
if (hwpm->active_chip->perfmon_enable == NULL) {
tegra_hwpm_err(hwpm, "perfmon_enable HAL uninitialized");
return false;
}
if (hwpm->active_chip->perfmon_disable == NULL) {
tegra_hwpm_err(hwpm, "perfmon_disable HAL uninitialized");
return false;
}
if (hwpm->active_chip->perfmux_disable == NULL) {
tegra_hwpm_err(hwpm, "perfmux_disable HAL uninitialized");
return false;
}
if (hwpm->active_chip->disable_triggers == NULL) {
tegra_hwpm_err(hwpm, "disable_triggers uninitialized");
return false;
}
if (hwpm->active_chip->disable_mem_mgmt == NULL) {
tegra_hwpm_err(hwpm, "disable_mem_mgmt HAL uninitialized");
return false;
}
if (hwpm->active_chip->enable_mem_mgmt == NULL) {
tegra_hwpm_err(hwpm, "enable_mem_mgmt HAL uninitialized");
return false;
}
if (hwpm->active_chip->invalidate_mem_config == NULL) {
tegra_hwpm_err(hwpm, "invalidate_mem_config HAL uninitialized");
return false;
}
if (hwpm->active_chip->stream_mem_bytes == NULL) {
tegra_hwpm_err(hwpm, "stream_mem_bytes uninitialized");
return false;
}
if (hwpm->active_chip->disable_pma_streaming == NULL) {
tegra_hwpm_err(hwpm, "disable_pma_streaming uninitialized");
return false;
}
if (hwpm->active_chip->update_mem_bytes_get_ptr == NULL) {
tegra_hwpm_err(hwpm, "update_mem_bytes_get_ptr uninitialized");
return false;
}
if (hwpm->active_chip->get_mem_bytes_put_ptr == NULL) {
tegra_hwpm_err(hwpm, "get_mem_bytes_put_ptr uninitialized");
return false;
}
if (hwpm->active_chip->membuf_overflow_status == NULL) {
tegra_hwpm_err(hwpm, "membuf_overflow_status uninitialized");
return false;
}
if (hwpm->active_chip->get_alist_buf_size == NULL) {
tegra_hwpm_err(hwpm, "alist_buf_size uninitialized");
return false;
}
if (hwpm->active_chip->zero_alist_regs == NULL) {
tegra_hwpm_err(hwpm, "zero_alist_regs HAL uninitialized");
return false;
}
if (hwpm->active_chip->copy_alist == NULL) {
tegra_hwpm_err(hwpm, "copy_alist HAL uninitialized");
return false;
}
if (hwpm->active_chip->check_alist == NULL) {
tegra_hwpm_err(hwpm, "check_alist uninitialized");
return false;
}
if (hwpm->active_chip->exec_reg_ops == NULL) {
tegra_hwpm_err(hwpm, "exec_reg_ops uninitialized");
return false;
}
if (hwpm->active_chip->release_sw_setup == NULL) {
tegra_hwpm_err(hwpm, "release_sw_setup uninitialized");
return false;
}
return true;
}
bool t234_hwpm_is_ip_active(struct tegra_soc_hwpm *hwpm,
u32 ip_index, u32 *config_ip_index)
{
@@ -354,5 +529,8 @@ int t234_hwpm_init_chip_info(struct tegra_soc_hwpm *hwpm)
t234_active_ip_info[T234_HWPM_IP_VIC] = &t234_hwpm_ip_vic;
#endif
if (!t234_hwpm_validate_hals(hwpm)) {
return -EINVAL;
}
return 0;
}