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tegra: hwpm: add debugfs node to skip alist

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Currently, HWPM driver checks regops address to validate that the
address belongs to an IP allowlist that is reserved for profiling.
However, it is possible that the allowlist doesn't include all register
offset that are required for profiling. This scenario is often
encountered during early stages of bringup. This patch adds a debugfs
node to make HWPM driver skip allowlist check. This change will allow
users to dynamically skip allowlist check when debugfs is available.

JIRA THWPM-65

Change-Id: Ic85a1c7fac6a95f7cde532f3bdf6040bbcc7f5f3
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/3241080
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Vasuki Shankar <vasukis@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: Vasuki Shankar <vasukis@nvidia.com>
This commit is contained in:
Vedashree Vidwans
2024-10-31 21:14:21 -07:00
committed by mobile promotions
parent cda058bccc
commit 2c2a933a9f
4 changed files with 27 additions and 13 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
drivers/tegra/hwpm/common/init.c
View File

@@ -132,6 +132,7 @@ int tegra_hwpm_init_sw_components(struct tegra_soc_hwpm *hwpm,
tegra_hwpm_fn(hwpm, " "); tegra_hwpm_fn(hwpm, " ");
hwpm->dbg_mask = TEGRA_HWPM_DEFAULT_DBG_MASK; hwpm->dbg_mask = TEGRA_HWPM_DEFAULT_DBG_MASK;
hwpm->dbg_skip_alist = false;
err = tegra_hwpm_init_chip_ip_structures(hwpm, chip_id, chip_id_rev); err = tegra_hwpm_init_chip_ip_structures(hwpm, chip_id, chip_id_rev);
if (err != 0) { if (err != 0) {

8
drivers/tegra/hwpm/common/ip.c
View File

@@ -369,6 +369,14 @@ static bool tegra_hwpm_addr_in_single_element(struct tegra_soc_hwpm *hwpm,
"a_type %d s_element_idx %d address not in alist", "a_type %d s_element_idx %d address not in alist",
*ip_idx, (unsigned long long)find_addr, *ip_idx, (unsigned long long)find_addr,
*s_inst_idx, a_type, *s_element_idx); *s_inst_idx, a_type, *s_element_idx);
if (hwpm->dbg_skip_alist) {
*element_type = element->element_type;
tegra_hwpm_dbg(hwpm, hwpm_dbg_regops,
"skipping allowlist check");
return true;
}
return false; return false;
} }

1
drivers/tegra/hwpm/include/tegra_hwpm.h
View File

@@ -623,6 +623,7 @@ struct tegra_soc_hwpm {
bool bind_completed; bool bind_completed;
bool device_opened; bool device_opened;
bool fake_registers_enabled; bool fake_registers_enabled;
bool dbg_skip_alist;
}; };
#endif /* TEGRA_HWPM_H */ #endif /* TEGRA_HWPM_H */

6
drivers/tegra/hwpm/os/linux/debugfs.c
View File

@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-only // SPDX-License-Identifier: GPL-2.0-only
/* /*
* Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* *
* This program is free software; you can redistribute it and/or modify it * This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License, * under the terms and conditions of the GNU General Public License,
@@ -42,6 +42,10 @@ void tegra_hwpm_debugfs_init(struct tegra_hwpm_os_linux *hwpm_linux)
debugfs_create_u32("log_mask", S_IRUGO|S_IWUSR, debugfs_create_u32("log_mask", S_IRUGO|S_IWUSR,
hwpm_linux->debugfs_root, &hwpm->dbg_mask); hwpm_linux->debugfs_root, &hwpm->dbg_mask);
/* Skip allowlist check */
debugfs_create_bool("skip_allowlist", S_IRUGO|S_IWUSR,
hwpm_linux->debugfs_root, &hwpm->dbg_skip_alist);
return; return;
fail: fail: