diff --git a/drivers/tegra/hwpm/hal/t234/t234_interface.c b/drivers/tegra/hwpm/hal/t234/t234_interface.c index 0fae790..d87b4d6 100644 --- a/drivers/tegra/hwpm/hal/t234/t234_interface.c +++ b/drivers/tegra/hwpm/hal/t234/t234_interface.c @@ -59,6 +59,7 @@ static struct tegra_soc_hwpm_chip t234_chip_info = { .disable_cg = t234_hwpm_disable_cg, .enable_cg = t234_hwpm_enable_cg, .credit_program = NULL, + .setup_trigger = NULL, .reserve_rtr = tegra_hwpm_reserve_rtr, .release_rtr = tegra_hwpm_release_rtr, diff --git a/drivers/tegra/hwpm/hal/th500/th500_interface.c b/drivers/tegra/hwpm/hal/th500/th500_interface.c index 9be99f8..2b0b0b0 100644 --- a/drivers/tegra/hwpm/hal/th500/th500_interface.c +++ b/drivers/tegra/hwpm/hal/th500/th500_interface.c @@ -60,6 +60,7 @@ static struct tegra_soc_hwpm_chip th500_chip_info = { .enable_cg = th500_hwpm_soc_enable_cg, .credit_program = NULL, + .setup_trigger = NULL, .reserve_rtr = tegra_hwpm_reserve_rtr, .release_rtr = tegra_hwpm_release_rtr, diff --git a/drivers/tegra/hwpm/include/tegra_hwpm.h b/drivers/tegra/hwpm/include/tegra_hwpm.h index 693430f..eb41206 100644 --- a/drivers/tegra/hwpm/include/tegra_hwpm.h +++ b/drivers/tegra/hwpm/include/tegra_hwpm.h @@ -57,6 +57,7 @@ struct tegra_hwpm_os_qnx; struct tegra_hwpm_mem_mgmt; struct tegra_hwpm_allowlist_map; struct tegra_soc_hwpm_exec_credit_program; +struct tegra_soc_hwpm_setup_trigger; enum tegra_soc_hwpm_ip_reg_op; /* @@ -150,6 +151,13 @@ enum tegra_hwpm_credit_cmd { TEGRA_HWPM_CMD_GET_HS_CREDITS_MAPPING }; +/* Used in Setup Trigger Programming */ +enum tegra_hwpm_trigger_session_type { + TEGRA_HWPM_CMD_INVALID_SESSION, + TEGRA_HWPM_CMD_START_STOP_SESSION, + TEGRA_HWPM_CMD_PERIODIC_SESSION +}; + /* * This structure is copy of struct tegra_soc_hwpm_ip_ops uapi structure. * This is not a hard requirement as each value from tegra_soc_hwpm_ip_ops @@ -549,6 +557,8 @@ struct tegra_soc_hwpm_chip { int (*credit_program)(struct tegra_soc_hwpm *hwpm, u32 *num_credits, u8 cblock_idx, u8 pma_channel_idx, uint16_t credit_cmd); + int (*setup_trigger)(struct tegra_soc_hwpm *hwpm, + u8 enable_cross_trigger, u8 session_type); int (*reserve_rtr)(struct tegra_soc_hwpm *hwpm); int (*release_rtr)(struct tegra_soc_hwpm *hwpm); diff --git a/drivers/tegra/hwpm/os/linux/ioctl.c b/drivers/tegra/hwpm/os/linux/ioctl.c index e1eeeb8..15182f5 100644 --- a/drivers/tegra/hwpm/os/linux/ioctl.c +++ b/drivers/tegra/hwpm/os/linux/ioctl.c @@ -262,6 +262,21 @@ static int tegra_hwpm_credit_program_ioctl(struct tegra_soc_hwpm *hwpm, return tegra_hwpm_credit_program(hwpm, credit_info); } +static int tegra_hwpm_setup_trigger_ioctl(struct tegra_soc_hwpm *hwpm, + struct tegra_soc_hwpm_setup_trigger *setup_trigger) +{ + tegra_hwpm_fn(hwpm, " "); + + if (!hwpm->bind_completed) { + tegra_hwpm_err(hwpm, + "Setup trigger programming can be called only" + " after completion of BIND IOCTL"); + return -EPERM; + } + + return tegra_hwpm_setup_trigger(hwpm, setup_trigger); +} + static long tegra_hwpm_ioctl(struct file *file, unsigned int cmd, unsigned long arg) @@ -356,6 +371,10 @@ static long tegra_hwpm_ioctl(struct file *file, ret = tegra_hwpm_credit_program_ioctl(hwpm, (struct tegra_soc_hwpm_exec_credit_program *)buf); break; + case TEGRA_CTRL_CMD_SOC_HWPM_SETUP_TRIGGER: + ret = tegra_hwpm_setup_trigger_ioctl(hwpm, + (struct tegra_soc_hwpm_setup_trigger *)buf); + break; default: tegra_hwpm_err(hwpm, "Unknown IOCTL command"); ret = -ENOTTY; diff --git a/drivers/tegra/hwpm/os/linux/regops_utils.c b/drivers/tegra/hwpm/os/linux/regops_utils.c index 34cad5f..3a3cb88 100644 --- a/drivers/tegra/hwpm/os/linux/regops_utils.c +++ b/drivers/tegra/hwpm/os/linux/regops_utils.c @@ -259,3 +259,14 @@ int tegra_hwpm_credit_program(struct tegra_soc_hwpm *hwpm, return ret; } + +int tegra_hwpm_setup_trigger(struct tegra_soc_hwpm *hwpm, + struct tegra_soc_hwpm_setup_trigger *setup_trigger) +{ + tegra_hwpm_fn(hwpm, " "); + + /* Call chip specific setup trigger API */ + return hwpm->active_chip->setup_trigger(hwpm, + setup_trigger->enable_cross_trigger, + setup_trigger->session_type); +} diff --git a/drivers/tegra/hwpm/os/linux/regops_utils.h b/drivers/tegra/hwpm/os/linux/regops_utils.h index 4201435..a81666f 100644 --- a/drivers/tegra/hwpm/os/linux/regops_utils.h +++ b/drivers/tegra/hwpm/os/linux/regops_utils.h @@ -20,10 +20,13 @@ struct tegra_soc_hwpm; struct tegra_soc_hwpm_exec_reg_ops; struct tegra_soc_hwpm_exec_credit_program; +struct tegra_soc_hwpm_setup_trigger; int tegra_hwpm_exec_regops(struct tegra_soc_hwpm *hwpm, struct tegra_soc_hwpm_exec_reg_ops *exec_reg_ops); int tegra_hwpm_credit_program(struct tegra_soc_hwpm *hwpm, struct tegra_soc_hwpm_exec_credit_program *credit_prog); +int tegra_hwpm_setup_trigger(struct tegra_soc_hwpm *hwpm, + struct tegra_soc_hwpm_setup_trigger *setup_trigger); #endif /* TEGRA_HWPM_OS_LINUX_REGOPS_UTILS_H */ diff --git a/include/uapi/linux/tegra-soc-hwpm-uapi.h b/include/uapi/linux/tegra-soc-hwpm-uapi.h index 19dd2b4..b73cd12 100644 --- a/include/uapi/linux/tegra-soc-hwpm-uapi.h +++ b/include/uapi/linux/tegra-soc-hwpm-uapi.h @@ -352,6 +352,24 @@ struct tegra_soc_hwpm_update_get_put { __u8 b_overflowed; }; +/* Enum to indicate Periodic or Start Stop trigger session */ +enum tegra_soc_hwpm_trigger_session_type { + TEGRA_SOC_HWPM_INVALID, + TEGRA_SOC_HWPM_START_STOP_SESSION, + TEGRA_SOC_HWPM_PERIODIC_SESSION +}; + +/* TEGRA_CTRL_CMD_SOC_HWPM_SETUP_TRIGGER */ +struct tegra_soc_hwpm_setup_trigger { + /* + * Inputs + */ + __u8 cblock_idx; /* CBlockID Index */ + __u8 pma_channel_idx; /* For multi-channel support */ + __u8 enable_cross_trigger; /* To indicate range profiler or periodic sampler */ + __u8 session_type; /* Enum type tegra_soc_hwpm_trigger_session_type */ +}; + /* IOCTL enum */ enum tegra_soc_hwpm_ioctl_num { TEGRA_SOC_HWPM_IOCTL_DEVICE_INFO, @@ -364,6 +382,7 @@ enum tegra_soc_hwpm_ioctl_num { TEGRA_SOC_HWPM_IOCTL_EXEC_REG_OPS, TEGRA_SOC_HWPM_IOCTL_UPDATE_GET_PUT, TEGRA_SOC_HWPM_IOCTL_CREDIT_PROGRAM, + TEGRA_SOC_HWPM_IOCTL_SETUP_TRIGGER, TERGA_SOC_HWPM_NUM_IOCTLS }; @@ -479,6 +498,17 @@ enum tegra_soc_hwpm_ioctl_num { TEGRA_SOC_HWPM_IOCTL_CREDIT_PROGRAM, \ struct tegra_soc_hwpm_exec_credit_program) +/* + * IOCTl for initiating Cross Trigger Setup Programming + * + * This IOCTL executes read-write access to SECURE REGISTERS + * + */ +#define TEGRA_CTRL_CMD_SOC_HWPM_SETUP_TRIGGER \ + _IOWR(TEGRA_SOC_HWPM_IOC_MAGIC, \ + TEGRA_SOC_HWPM_IOCTL_SETUP_TRIGGER, \ + struct tegra_soc_hwpm_setup_trigger) + #define TEGRA_SOC_HWPM_MAX_ARG_SIZE \ sizeof(struct tegra_soc_hwpm_exec_reg_ops)