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tegra: hwpm: rename source files
Shorten source file names by removing "tegra_hwpm" prefix. This will make understanding the code more legible. Jira THWPM-58 Change-Id: I39aac11c9f2a763a254b0605f9d96a7b0f372992 Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2729469 Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com> Reviewed-by: Vasuki Shankar <vasukis@nvidia.com> Reviewed-by: Seema Khowala <seemaj@nvidia.com> GVS: Gerrit_Virtual_Submit
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256
common/init.c
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256
common/init.c
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/*
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* Copyright (c) 2021-2022, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#include <linux/mm.h>
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#include <linux/vmalloc.h>
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#include <linux/kernel.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/module.h>
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#include <linux/io.h>
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#include <linux/slab.h>
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#include <linux/reset.h>
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#include <linux/clk.h>
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#include <linux/dma-buf.h>
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#include <soc/tegra/fuse.h>
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#include <uapi/linux/tegra-soc-hwpm-uapi.h>
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#include <tegra_hwpm_log.h>
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#include <tegra_hwpm_io.h>
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#include <tegra_hwpm.h>
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#include <tegra_hwpm_common.h>
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#include <hal/t234/t234_init.h>
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#ifdef CONFIG_TEGRA_NEXT1_HWPM
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#include <tegra_hwpm_next_init.h>
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#endif
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static int tegra_hwpm_init_chip_info(struct tegra_soc_hwpm *hwpm)
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{
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int err = -EINVAL;
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tegra_hwpm_fn(hwpm, " ");
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hwpm->device_info.chip = tegra_get_chip_id();
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hwpm->device_info.chip_revision = tegra_get_major_rev();
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hwpm->device_info.revision = tegra_chip_get_revision();
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hwpm->device_info.platform = tegra_get_platform();
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hwpm->dbg_mask = TEGRA_HWPM_DEFAULT_DBG_MASK;
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switch (hwpm->device_info.chip) {
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case 0x23:
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switch (hwpm->device_info.chip_revision) {
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case 0x4:
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err = t234_hwpm_init_chip_info(hwpm);
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break;
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default:
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#ifdef CONFIG_TEGRA_NEXT1_HWPM
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err = tegra_hwpm_next1_init_chip_info(hwpm);
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#else
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tegra_hwpm_err(hwpm, "Chip 0x%x rev 0x%x not supported",
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hwpm->device_info.chip,
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hwpm->device_info.chip_revision);
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#endif
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break;
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}
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break;
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default:
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tegra_hwpm_err(hwpm, "Chip 0x%x not supported",
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hwpm->device_info.chip);
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break;
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}
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if (err != 0) {
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tegra_hwpm_err(hwpm, "init_chip_info failed");
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}
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return err;
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}
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static int tegra_hwpm_init_chip_ip_structures(struct tegra_soc_hwpm *hwpm)
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{
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int err = 0;
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tegra_hwpm_fn(hwpm, " ");
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err = tegra_hwpm_func_all_ip(hwpm, NULL, TEGRA_HWPM_INIT_IP_STRUCTURES);
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if (err != 0) {
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tegra_hwpm_err(hwpm, "failed init IP structures");
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return err;
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}
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return err;
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}
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int tegra_hwpm_init_sw_components(struct tegra_soc_hwpm *hwpm)
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{
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int err = 0;
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tegra_hwpm_fn(hwpm, " ");
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err = tegra_hwpm_init_chip_info(hwpm);
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if (err != 0) {
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tegra_hwpm_err(hwpm, "Failed to initialize current chip info.");
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return err;
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}
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err = tegra_hwpm_init_chip_ip_structures(hwpm);
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if (err != 0) {
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tegra_hwpm_err(hwpm, "IP structure init failed");
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return err;
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}
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err = tegra_hwpm_finalize_chip_info(hwpm);
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if (err < 0) {
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tegra_hwpm_err(hwpm, "Unable to initialize chip fs_info");
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return err;
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}
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return 0;
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}
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void tegra_hwpm_release_sw_components(struct tegra_soc_hwpm *hwpm)
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{
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struct hwpm_ip_register_list *node = ip_register_list_head;
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struct hwpm_ip_register_list *tmp_node = NULL;
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tegra_hwpm_fn(hwpm, " ");
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hwpm->active_chip->release_sw_setup(hwpm);
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while (node != NULL) {
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tmp_node = node;
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node = tmp_node->next;
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kfree(tmp_node);
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}
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kfree(hwpm->active_chip->chip_ips);
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kfree(hwpm);
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tegra_soc_hwpm_pdev = NULL;
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}
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int tegra_hwpm_setup_sw(struct tegra_soc_hwpm *hwpm)
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{
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int ret = 0;
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tegra_hwpm_fn(hwpm, " ");
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ret = hwpm->active_chip->validate_current_config(hwpm);
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if (ret != 0) {
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tegra_hwpm_err(hwpm, "Failed to validate current conifg");
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return ret;
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}
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ret = tegra_hwpm_func_all_ip(hwpm, NULL,
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TEGRA_HWPM_UPDATE_IP_INST_MASK);
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if (ret != 0) {
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tegra_hwpm_err(hwpm, "Failed to update IP fs_info");
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return ret;
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}
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/* Initialize SW state */
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hwpm->bind_completed = false;
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hwpm->full_alist_size = 0;
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return 0;
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}
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int tegra_hwpm_setup_hw(struct tegra_soc_hwpm *hwpm)
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{
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int ret = 0;
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tegra_hwpm_fn(hwpm, " ");
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/*
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* Map RTR aperture
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* RTR is hwpm aperture which includes hwpm config registers.
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* Map/reserve these apertures to get MMIO address required for hwpm
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* configuration (following steps).
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*/
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ret = hwpm->active_chip->reserve_rtr(hwpm);
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if (ret < 0) {
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tegra_hwpm_err(hwpm, "Unable to reserve RTR aperture");
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goto fail;
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}
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/* Program PROD values */
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ret = hwpm->active_chip->init_prod_values(hwpm);
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if (ret < 0) {
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tegra_hwpm_err(hwpm, "Unable to set PROD values");
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goto fail;
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}
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/* Disable SLCG */
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ret = hwpm->active_chip->disable_cg(hwpm);
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if (ret < 0) {
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tegra_hwpm_err(hwpm, "Unable to disable SLCG");
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goto fail;
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}
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return 0;
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fail:
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return ret;
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}
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int tegra_hwpm_disable_triggers(struct tegra_soc_hwpm *hwpm)
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{
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tegra_hwpm_fn(hwpm, " ");
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return hwpm->active_chip->disable_triggers(hwpm);
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}
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int tegra_hwpm_release_hw(struct tegra_soc_hwpm *hwpm)
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{
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int ret = 0;
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tegra_hwpm_fn(hwpm, " ");
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/* Enable CG */
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ret = hwpm->active_chip->enable_cg(hwpm);
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if (ret < 0) {
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tegra_hwpm_err(hwpm, "Unable to enable SLCG");
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goto fail;
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}
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/*
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* Unmap RTR apertures
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* Since, RTR hwpm apertures consist of hwpm config registers,
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* these aperture mappings are required to reset hwpm config.
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* Hence, explicitly unmap/release these apertures as a last step.
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*/
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ret = hwpm->active_chip->release_rtr(hwpm);
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if (ret < 0) {
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tegra_hwpm_err(hwpm, "Unable to release RTR aperture");
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goto fail;
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}
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return 0;
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fail:
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return ret;
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}
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void tegra_hwpm_release_sw_setup(struct tegra_soc_hwpm *hwpm)
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{
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int err = 0;
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tegra_hwpm_fn(hwpm, " ");
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err = tegra_hwpm_func_all_ip(hwpm, NULL,
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TEGRA_HWPM_RELEASE_IP_STRUCTURES);
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if (err != 0) {
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tegra_hwpm_err(hwpm, "failed release IP structures");
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return;
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}
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return;
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}
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