From 4fbceccafaddec21125b39bb83cdf07a19f1b910 Mon Sep 17 00:00:00 2001 From: vasukis Date: Thu, 27 Feb 2025 17:02:59 +0000 Subject: [PATCH] tegra: hwpm: t264: Reduce DG map reg timeout A timeout of 100ms is provided to allow DG Map register values to propagate to router during Perfmon enable/disable functionality. This is a lot as ideally HW takes few us for the propagation. Hence, reduce the timeout value to 10ms. Bug 5072985 Signed-off-by: vasukis Change-Id: Ie67a3325341824a451315d94afff3b5a1c0bb144 Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/3311261 Reviewed-by: svcacv Reviewed-by: Yifei Wan GVS: buildbot_gerritrpt Reviewed-by: Besar Wicaksono --- drivers/tegra/hwpm/hal/t264/t264_resource.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/tegra/hwpm/hal/t264/t264_resource.c b/drivers/tegra/hwpm/hal/t264/t264_resource.c index c1dffe6..7ba63bd 100644 --- a/drivers/tegra/hwpm/hal/t264/t264_resource.c +++ b/drivers/tegra/hwpm/hal/t264/t264_resource.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: MIT /* - * SPDX-FileCopyrightText: Copyright (c) 2023-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2023-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -48,7 +48,7 @@ int t264_hwpm_perfmon_enable(struct tegra_soc_hwpm *hwpm, u32 config_dgmap = 0U; u32 dgmap_status_reg_idx = 0U, dgmap_status_reg_dgidx = 0U; u32 retries = 10U; - u32 sleep_msecs = 100U; + u32 sleep_msecs = 10U; int err = 0; struct hwpm_ip_aperture *rtr_perfmux = NULL; @@ -137,7 +137,7 @@ int t264_hwpm_perfmon_disable(struct tegra_soc_hwpm *hwpm, u32 config_dgmap = 0U; u32 dgmap_status_reg_idx = 0U, dgmap_status_reg_dgidx = 0U; u32 retries = 10U; - u32 sleep_msecs = 100U; + u32 sleep_msecs = 10U; int err = 0; struct hwpm_ip_aperture *rtr_perfmux = NULL;