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tegra: hwpm: add clk-rst HALs, update HAL validation

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- Make clock reset functions into HALs. This way we can control
clock-reset logic for any chip. Set clock-reset HAL pointers to
appropriate functions.
- Remove clock-reset function wrappers as these will not be required and
corresponding HAL pointers will be used.
- As clock reset init is defined as a HAL, modify probe logic to
initialize chip info before invoking any HALs.
- Move common/primary HAL validation logic to common code and implement
new HAL to validate chip specific HALs. This way we can ensure that HAL
pointers are set as expected.
- Keep only one definition for t234_hwpm_init_chip_info as t234 should
always be initialized and hence only single definition should be
available.
- Expected return value of 0 indicates success and any other value
(mostly negative in current logic) indicates error, compare function
returns with 0 to print error in tegra_hwpm_release().
- Since a build can support both ACPI and device tree, update
init_chip_info() to retrieve chip information from ACPI and device tree
in case of failure.

Jira THWPM-41
Bug 3583624

Change-Id: I03fefae0b3b0c8ce46d175d39e4fdbb45e2bb22f
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2789668
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Vasuki Shankar <vasukis@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/2797445
This commit is contained in:
Vedashree Vidwans
2022-10-10 14:50:33 -07:00
committed by mobile promotions
parent 913f1b0697
commit 5166c3ab71
12 changed files with 255 additions and 248 deletions
Download Patch File Download Diff File Expand all files Collapse all files

28
drivers/tegra/hwpm/os/linux/ioctl.c
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@@ -401,9 +401,11 @@ static int tegra_hwpm_open(struct inode *inode, struct file *filp)
return -EAGAIN;
}
ret = tegra_hwpm_clk_rst_set_rate_enable(hwpm_linux);
if (ret != 0) {
goto fail;
if (hwpm->active_chip->clk_rst_set_rate_enable) {
ret = tegra_hwpm_clk_rst_set_rate_enable(hwpm_linux);
if (ret != 0) {
goto fail;
}
}
ret = tegra_hwpm_setup_hw(hwpm);
@@ -477,14 +479,14 @@ static int tegra_hwpm_release(struct inode *inode, struct file *filp)
}
ret = tegra_hwpm_disable_triggers(hwpm);
if (ret < 0) {
if (ret != 0) {
tegra_hwpm_err(hwpm, "Failed to disable PMA triggers");
err = ret;
}
/* Disable and release reserved IPs */
ret = tegra_hwpm_release_resources(hwpm);
if (ret < 0) {
if (ret != 0) {
tegra_hwpm_err(hwpm, "Failed to release IP apertures");
err = ret;
goto fail;
@@ -492,7 +494,7 @@ static int tegra_hwpm_release(struct inode *inode, struct file *filp)
/* Clear MEM_BYTES pipeline */
ret = tegra_hwpm_clear_mem_pipeline(hwpm);
if (ret < 0) {
if (ret != 0) {
tegra_hwpm_err(hwpm, "Failed to clear MEM_BYTES pipeline");
err = ret;
goto fail;
@@ -502,17 +504,19 @@ static int tegra_hwpm_release(struct inode *inode, struct file *filp)
tegra_hwpm_release_mem_mgmt(hwpm);
ret = tegra_hwpm_release_hw(hwpm);
if (ret < 0) {
if (ret != 0) {
tegra_hwpm_err(hwpm, "Failed to release hw");
err = ret;
goto fail;
}
ret = tegra_hwpm_clk_rst_disable(hwpm_linux);
if (ret < 0) {
tegra_hwpm_err(hwpm, "Failed to release clock");
err = ret;
goto fail;
if (hwpm->active_chip->clk_rst_disable) {
ret = tegra_hwpm_clk_rst_disable(hwpm_linux);
if (ret != 0) {
tegra_hwpm_err(hwpm, "Failed to release clock");
err = ret;
goto fail;
}
}
/* De-init driver on last close call only */