From 5d80b2edb5b2ec3e5ced1089e2d3f1f72f034ea8 Mon Sep 17 00:00:00 2001 From: vasukis Date: Mon, 13 May 2024 19:00:50 +0000 Subject: [PATCH] tegra: hwpm: Linux: IOCTL for Credit Programming - Add IOCTL infra for Credit programming in Linux based OSs. Bug 4571175 Signed-off-by: vasukis Change-Id: I1a5ff5aefcf8da6ad85507d71c0a9bd3b7f31f6d Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/3136565 GVS: buildbot_gerritrpt Reviewed-by: Seema Khowala --- drivers/tegra/hwpm/os/linux/ioctl.c | 21 ++++++++- drivers/tegra/hwpm/os/linux/regops_utils.c | 31 +++++++++++++ drivers/tegra/hwpm/os/linux/regops_utils.h | 7 ++- include/uapi/linux/tegra-soc-hwpm-uapi.h | 51 ++++++++++++++++++++++ 4 files changed, 107 insertions(+), 3 deletions(-) diff --git a/drivers/tegra/hwpm/os/linux/ioctl.c b/drivers/tegra/hwpm/os/linux/ioctl.c index bff0cd2..e1eeeb8 100644 --- a/drivers/tegra/hwpm/os/linux/ioctl.c +++ b/drivers/tegra/hwpm/os/linux/ioctl.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -247,6 +247,21 @@ static int tegra_hwpm_update_get_put_ioctl(struct tegra_soc_hwpm *hwpm, return tegra_hwpm_update_mem_bytes(hwpm, update_get_put); } +static int tegra_hwpm_credit_program_ioctl(struct tegra_soc_hwpm *hwpm, + struct tegra_soc_hwpm_exec_credit_program *credit_info) +{ + tegra_hwpm_fn(hwpm, " "); + + if (!hwpm->bind_completed) { + tegra_hwpm_err(hwpm, + "The Credit Programming can be called only" + " after completion of BIND IOCTL"); + return -EPERM; + } + + return tegra_hwpm_credit_program(hwpm, credit_info); +} + static long tegra_hwpm_ioctl(struct file *file, unsigned int cmd, unsigned long arg) @@ -337,6 +352,10 @@ static long tegra_hwpm_ioctl(struct file *file, ret = tegra_hwpm_update_get_put_ioctl(hwpm, (struct tegra_soc_hwpm_update_get_put *)buf); break; + case TEGRA_CTRL_CMD_SOC_HWPM_CREDIT_PROGRAM: + ret = tegra_hwpm_credit_program_ioctl(hwpm, + (struct tegra_soc_hwpm_exec_credit_program *)buf); + break; default: tegra_hwpm_err(hwpm, "Unknown IOCTL command"); ret = -ENOTTY; diff --git a/drivers/tegra/hwpm/os/linux/regops_utils.c b/drivers/tegra/hwpm/os/linux/regops_utils.c index 8599ae4..34cad5f 100644 --- a/drivers/tegra/hwpm/os/linux/regops_utils.c +++ b/drivers/tegra/hwpm/os/linux/regops_utils.c @@ -21,6 +21,7 @@ #include #include #include +#include #include static int tegra_hwpm_exec_reg_ops(struct tegra_soc_hwpm *hwpm, @@ -228,3 +229,33 @@ int tegra_hwpm_exec_regops(struct tegra_soc_hwpm *hwpm, return 0; } + +int tegra_hwpm_credit_program(struct tegra_soc_hwpm *hwpm, + struct tegra_soc_hwpm_exec_credit_program *credit_prog) +{ + int idx = 0, ret = 0; + struct tegra_soc_hwpm_credits_info *creditInfo = NULL; + + tegra_hwpm_fn(hwpm, " "); + + /* Check if credit_programming is defined for this chip*/ + if (hwpm->active_chip->credit_program == NULL) { + tegra_hwpm_err(hwpm, "Credit programming not defined"); + return -EINVAL; + } + + for (idx = 0; idx <= credit_prog->num_entries; idx++) { + //Extract the credit_info pointer for a given Credit packet. + //This contains the num_credits param + //which has to be updated in chip specific HALs. + creditInfo = &(credit_prog->credit_info[idx]); + + /* Call chip specific credit programming API */ + ret = hwpm->active_chip->credit_program( + hwpm, &(creditInfo->num_credits), + creditInfo->cblock_idx, credit_prog->pma_channel_idx, + credit_prog->credit_cmd); + } + + return ret; +} diff --git a/drivers/tegra/hwpm/os/linux/regops_utils.h b/drivers/tegra/hwpm/os/linux/regops_utils.h index 0fa0453..4201435 100644 --- a/drivers/tegra/hwpm/os/linux/regops_utils.h +++ b/drivers/tegra/hwpm/os/linux/regops_utils.h @@ -1,6 +1,6 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ +// SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2022-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -19,8 +19,11 @@ struct tegra_soc_hwpm; struct tegra_soc_hwpm_exec_reg_ops; +struct tegra_soc_hwpm_exec_credit_program; int tegra_hwpm_exec_regops(struct tegra_soc_hwpm *hwpm, struct tegra_soc_hwpm_exec_reg_ops *exec_reg_ops); +int tegra_hwpm_credit_program(struct tegra_soc_hwpm *hwpm, + struct tegra_soc_hwpm_exec_credit_program *credit_prog); #endif /* TEGRA_HWPM_OS_LINUX_REGOPS_UTILS_H */ diff --git a/include/uapi/linux/tegra-soc-hwpm-uapi.h b/include/uapi/linux/tegra-soc-hwpm-uapi.h index 9493df0..19dd2b4 100644 --- a/include/uapi/linux/tegra-soc-hwpm-uapi.h +++ b/include/uapi/linux/tegra-soc-hwpm-uapi.h @@ -166,6 +166,45 @@ struct tegra_soc_hwpm_reserve_resource { enum tegra_soc_hwpm_resource resource; }; +/* Enum for Credit programming states */ +enum tegra_soc_hwpm_credit_cmd { + TEGRA_SOC_HWPM_CMD_SET_HS_CREDITS, + TEGRA_SOC_HWPM_CMD_GET_HS_CREDITS, + TEGRA_SOC_HWPM_CMD_GET_TOTAL_HS_CREDITS, + TEGRA_SOC_HWPM_CMD_GET_CHIPLET_HS_CREDITS_POOL, + TEGRA_SOC_HWPM_CMD_GET_HS_CREDITS_MAPPING +}; + +struct tegra_soc_hwpm_credits_info { + /* + * Input + */ + __u8 cblock_idx; /* Cblock ID */ + + /* + * Input/Output + */ + __u32 num_credits; /* Number of credits per chiplet */ +}; + +#define TEGRA_SOC_HWPM_MAX_CREDIT_INFO_ENTRIES 8 + +/* TEGRA_CTRL_CMD_SOC_HWPM_CREDIT_PROGRAM */ +struct tegra_soc_hwpm_exec_credit_program { + /* + * Inputs + */ + __u16 credit_cmd; /* enum tegra_soc_hwpm_credit_cmd */ + __u8 pma_channel_idx; /* For multi-channel support */ + __u8 num_entries; + + struct tegra_soc_hwpm_credits_info credit_info[TEGRA_SOC_HWPM_MAX_CREDIT_INFO_ENTRIES]; + /* + * Output + */ + __u8 status_info; /* Return the status. To be used for future use*/ +}; + /* TEGRA_CTRL_CMD_SOC_HWPM_ALLOC_PMA_STREAM IOCTL */ struct tegra_soc_hwpm_alloc_pma_stream { /* @@ -324,6 +363,7 @@ enum tegra_soc_hwpm_ioctl_num { TEGRA_SOC_HWPM_IOCTL_QUERY_ALLOWLIST, TEGRA_SOC_HWPM_IOCTL_EXEC_REG_OPS, TEGRA_SOC_HWPM_IOCTL_UPDATE_GET_PUT, + TEGRA_SOC_HWPM_IOCTL_CREDIT_PROGRAM, TERGA_SOC_HWPM_NUM_IOCTLS }; @@ -428,6 +468,17 @@ enum tegra_soc_hwpm_ioctl_num { TEGRA_SOC_HWPM_IOCTL_UPDATE_GET_PUT, \ struct tegra_soc_hwpm_update_get_put) +/* + * IOCTl for initiating Credit Programming + * + * This IOCTL executes read-write access to SECURE REGISTERS + * + */ +#define TEGRA_CTRL_CMD_SOC_HWPM_CREDIT_PROGRAM \ + _IOWR(TEGRA_SOC_HWPM_IOC_MAGIC, \ + TEGRA_SOC_HWPM_IOCTL_CREDIT_PROGRAM, \ + struct tegra_soc_hwpm_exec_credit_program) + #define TEGRA_SOC_HWPM_MAX_ARG_SIZE \ sizeof(struct tegra_soc_hwpm_exec_reg_ops)