diff --git a/common/init.c b/common/init.c index 98b214d..4ff7240 100644 --- a/common/init.c +++ b/common/init.c @@ -20,9 +20,13 @@ #include #include + #ifdef CONFIG_TEGRA_NEXT1_HWPM #include #endif +#ifdef CONFIG_TEGRA_NEXT2_HWPM +#include +#endif static int tegra_hwpm_init_chip_ip_structures(struct tegra_soc_hwpm *hwpm, @@ -50,7 +54,12 @@ static int tegra_hwpm_init_chip_ip_structures(struct tegra_soc_hwpm *hwpm, } break; default: +#ifdef CONFIG_TEGRA_NEXT2_HWPM + err = tegra_hwpm_next2_init_chip_info( + hwpm, chip_id, chip_id_rev); +#else tegra_hwpm_err(hwpm, "Chip 0x%x not supported", chip_id); +#endif break; } diff --git a/include/tegra_hwpm.h b/include/tegra_hwpm.h index 78244ca..99d60e2 100644 --- a/include/tegra_hwpm.h +++ b/include/tegra_hwpm.h @@ -16,10 +16,6 @@ #include -#ifndef ARRAY_SIZE -#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0])) -#endif - #define TEGRA_HWPM_IP_INACTIVE ~(0U) /* These macro values should match TEGRA_SOC_HWPM_IP_STATUS_* */ diff --git a/include/tegra_hwpm_soc.h b/include/tegra_hwpm_soc.h index 697436f..b8db8a5 100644 --- a/include/tegra_hwpm_soc.h +++ b/include/tegra_hwpm_soc.h @@ -15,6 +15,9 @@ #define TEGRA_HWPM_SOC_H #if defined(CONFIG_TEGRA_HWPM_OOT) +#define CHIP_ID_UNKNOWN 0x0U +#define CHIP_ID_REV_UNKNOWN 0x0U + #define PLAT_SI 0 #define PLAT_PRE_SI_QT 1 #define PLAT_PRE_SI_VDK 8 diff --git a/include/tegra_hwpm_types.h b/include/tegra_hwpm_types.h index 84ea7dd..f2c6311 100644 --- a/include/tegra_hwpm_types.h +++ b/include/tegra_hwpm_types.h @@ -22,6 +22,7 @@ #if defined(CONFIG_TEGRA_HWPM_OOT) #include #include +#include #endif #endif diff --git a/os/linux/driver.c b/os/linux/driver.c index 4e1d5c0..f239c2c 100644 --- a/os/linux/driver.c +++ b/os/linux/driver.c @@ -35,6 +35,9 @@ static const struct of_device_id tegra_soc_hwpm_of_match[] = { }, #ifdef CONFIG_TEGRA_NEXT1_HWPM #include +#endif +#ifdef CONFIG_TEGRA_NEXT2_HWPM +#include #endif { }, }; @@ -57,6 +60,10 @@ static bool tegra_hwpm_read_support_soc_tools_prop(struct platform_device *pdev) struct device_node *np = pdev->dev.of_node; bool allow_node = of_property_read_bool(np, "support-soc-tools"); + if (!tegra_hwpm_is_platform_silicon()) { + return true; + } + if (!allow_node) { tegra_hwpm_err(NULL, "support-soc-tools is absent"); } @@ -263,7 +270,11 @@ static void __exit tegra_hwpm_exit(void) platform_driver_unregister(&tegra_soc_hwpm_pdrv); } +#if defined(CONFIG_TEGRA_HWPM_OOT) +module_init(tegra_hwpm_init); +#else postcore_initcall(tegra_hwpm_init); +#endif module_exit(tegra_hwpm_exit); MODULE_ALIAS(TEGRA_SOC_HWPM_MODULE_NAME); diff --git a/os/linux/soc_utils.c b/os/linux/soc_utils.c index cf1de3a..bf7a4ed 100644 --- a/os/linux/soc_utils.c +++ b/os/linux/soc_utils.c @@ -21,19 +21,33 @@ #if defined(CONFIG_TEGRA_NEXT1_HWPM) #include #endif +#if defined(CONFIG_TEGRA_NEXT2_HWPM) +#include +#endif #endif u32 tegra_hwpm_get_chip_id_impl(void) { #if defined(CONFIG_TEGRA_HWPM_OOT) + u32 chip_id = CHIP_ID_UNKNOWN; + if (of_machine_is_compatible("nvidia,tegra234")) { - return 0x23U; + chip_id = 0x23U; + return chip_id; } -#ifdef CONFIG_TEGRA_NEXT1_HWPM - return tegra_hwpm_next1_get_chip_id_impl(); -#else - return 0x0U; -#endif /* CONFIG_TEGRA_NEXT1_HWPM */ +#if defined(CONFIG_TEGRA_NEXT1_HWPM) + chip_id = tegra_hwpm_next1_get_chip_id_impl(); + if (chip_id != CHIP_ID_UNKNOWN) { + return chip_id; + } +#endif +#if defined(CONFIG_TEGRA_NEXT2_HWPM) + chip_id = tegra_hwpm_next2_get_chip_id_impl(); + if (chip_id != CHIP_ID_UNKNOWN) { + return chip_id; + } +#endif + return chip_id; #else return (u32)tegra_get_chip_id(); #endif /* CONFIG_TEGRA_HWPM_OOT */ @@ -42,14 +56,25 @@ u32 tegra_hwpm_get_chip_id_impl(void) u32 tegra_hwpm_get_major_rev_impl(void) { #if defined(CONFIG_TEGRA_HWPM_OOT) + u32 chip_id_rev = CHIP_ID_REV_UNKNOWN; + if (of_machine_is_compatible("nvidia,tegra234")) { - return 0x4U; + chip_id_rev = 0x4U; + return chip_id_rev; } -#ifdef CONFIG_TEGRA_NEXT1_HWPM - return tegra_hwpm_next1_get_major_rev_impl(); -#else - return 0x0U; -#endif /* CONFIG_TEGRA_NEXT1_HWPM */ +#if defined(CONFIG_TEGRA_NEXT1_HWPM) + chip_id_rev = tegra_hwpm_next1_get_major_rev_impl(); + if (chip_id_rev != CHIP_ID_REV_UNKNOWN) { + return chip_id_rev; + } +#endif +#if defined(CONFIG_TEGRA_NEXT2_HWPM) + chip_id_rev = tegra_hwpm_next2_get_major_rev_impl(); + if (chip_id_rev != CHIP_ID_REV_UNKNOWN) { + return chip_id_rev; + } +#endif + return chip_id_rev; #else return (u32)tegra_get_major_rev(); #endif @@ -67,14 +92,25 @@ u32 tegra_hwpm_chip_get_revision_impl(void) u32 tegra_hwpm_get_platform_impl(void) { #if defined(CONFIG_TEGRA_HWPM_OOT) + u32 plat = PLAT_INVALID; + if (of_machine_is_compatible("nvidia,tegra234")) { - return PLAT_SI; + plat = PLAT_SI; + return plat; } -#ifdef CONFIG_TEGRA_NEXT1_HWPM - return tegra_hwpm_next1_get_platform_impl(); -#else - return PLAT_INVALID; -#endif /* CONFIG_TEGRA_NEXT1_HWPM */ +#if defined(CONFIG_TEGRA_NEXT1_HWPM) + plat = tegra_hwpm_next1_get_major_rev_impl(); + if (plat != PLAT_INVALID) { + return plat; + } +#endif +#if defined(CONFIG_TEGRA_NEXT2_HWPM) + plat = tegra_hwpm_next2_get_major_rev_impl(); + if (plat != PLAT_INVALID) { + return plat; + } +#endif + return plat; #else return (u32)tegra_get_platform(); #endif @@ -83,7 +119,7 @@ u32 tegra_hwpm_get_platform_impl(void) bool tegra_hwpm_is_platform_silicon_impl(void) { #if defined(CONFIG_TEGRA_HWPM_OOT) - return tegra_platform_is_silicon(); + return tegra_hwpm_get_platform() == PLAT_SI; #else return tegra_platform_is_silicon(); #endif