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tegra: hwpm: add wrapper linux os structure

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Currently, HWPM parent structure contains linux specific device
variables. In an effort to make HWPM driver OS agnostic, create Linux
specific wrapper HWPM structure tegra_hwpm_os_linux. Move linux specific
variables from tegra_soc_hwpm structure to tegra_hwpm_os_linux
structure.

Jira THWPM-60

Change-Id: I189cde92c5b83b327ccb467c72dee5756f16481d
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2729700
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
Vedashree Vidwans
2022-06-15 23:41:07 -07:00
committed by mobile promotions
parent 2dd64aec0b
commit 738361e0e2
14 changed files with 292 additions and 212 deletions
Download Patch File Download Diff File Expand all files Collapse all files

37
common/init.c
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@@ -24,32 +24,33 @@
#include <tegra_hwpm_next_init.h>
#endif
static int tegra_hwpm_init_chip_ip_structures(struct tegra_soc_hwpm *hwpm)
static int tegra_hwpm_init_chip_ip_structures(struct tegra_soc_hwpm *hwpm,
u32 chip_id, u32 chip_id_rev)
{
int err = -EINVAL;
tegra_hwpm_fn(hwpm, " ");
switch (hwpm->device_info.chip) {
switch (chip_id) {
case 0x23:
switch (hwpm->device_info.chip_revision) {
switch (chip_id_rev) {
case 0x4:
err = t234_hwpm_init_chip_info(hwpm);
break;
default:
#ifdef CONFIG_TEGRA_NEXT1_HWPM
err = tegra_hwpm_next1_init_chip_info(hwpm);
err = tegra_hwpm_next1_init_chip_info(hwpm,
chip_id, chip_id_rev);
#else
tegra_hwpm_err(hwpm, "Chip 0x%x rev 0x%x not supported",
hwpm->device_info.chip,
hwpm->device_info.chip_revision);
chip_id, chip_id_rev);
#endif
break;
}
break;
default:
tegra_hwpm_err(hwpm, "Chip 0x%x not supported",
hwpm->device_info.chip);
tegra_hwpm_err(hwpm, "Chip 0x%x not supported", chip_id);
break;
}
@@ -67,13 +68,16 @@ static int tegra_hwpm_init_chip_ip_structures(struct tegra_soc_hwpm *hwpm)
return err;
}
int tegra_hwpm_init_sw_components(struct tegra_soc_hwpm *hwpm)
int tegra_hwpm_init_sw_components(struct tegra_soc_hwpm *hwpm,
u32 chip_id, u32 chip_id_rev)
{
int err = 0;
tegra_hwpm_fn(hwpm, " ");
err = tegra_hwpm_init_chip_ip_structures(hwpm);
hwpm->dbg_mask = TEGRA_HWPM_DEFAULT_DBG_MASK;
err = tegra_hwpm_init_chip_ip_structures(hwpm, chip_id, chip_id_rev);
if (err != 0) {
tegra_hwpm_err(hwpm, "IP structure init failed");
return err;
@@ -88,17 +92,6 @@ int tegra_hwpm_init_sw_components(struct tegra_soc_hwpm *hwpm)
return 0;
}
void tegra_hwpm_release_sw_components(struct tegra_soc_hwpm *hwpm)
{
tegra_hwpm_fn(hwpm, " ");
hwpm->active_chip->release_sw_setup(hwpm);
tegra_hwpm_kfree(hwpm, hwpm->active_chip->chip_ips);
tegra_hwpm_kfree(hwpm, hwpm);
tegra_soc_hwpm_pdev = NULL;
}
int tegra_hwpm_setup_sw(struct tegra_soc_hwpm *hwpm)
{
int ret = 0;
@@ -211,5 +204,7 @@ void tegra_hwpm_release_sw_setup(struct tegra_soc_hwpm *hwpm)
return;
}
tegra_hwpm_kfree(hwpm, hwpm->active_chip->chip_ips);
return;
}