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tegra: hwpm: add nvtherm enum
Add enum for NVTHERM ip and resource to kernel driver and userspace library. JIRA MSST-868 Change-Id: Iacb6e9c9205e4293af04e28f265dd535b6fd1783 Signed-off-by: Besar Wicaksono <bwicaksono@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/3322825 Reviewed-by: Vasuki Shankar <vasukis@nvidia.com> Reviewed-by: Yifei Wan <ywan@nvidia.com> GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
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@@ -1,6 +1,6 @@
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/* SPDX-License-Identifier: MIT */
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/* SPDX-License-Identifier: MIT */
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/*
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/*
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* SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-FileCopyrightText: Copyright (c) 2021-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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*
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* copy of this software and associated documentation files (the "Software"),
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@@ -104,6 +104,7 @@ enum tegra_hwpm_ip_enum {
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TEGRA_HWPM_IP_UCF_HUB,
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TEGRA_HWPM_IP_UCF_HUB,
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TEGRA_HWPM_IP_UCF_SCB,
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TEGRA_HWPM_IP_UCF_SCB,
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TEGRA_HWPM_IP_CPU,
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TEGRA_HWPM_IP_CPU,
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TEGRA_HWPM_IP_NVTHERM,
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TERGA_HWPM_NUM_IPS
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TERGA_HWPM_NUM_IPS
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};
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};
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@@ -152,6 +153,7 @@ static inline const char *tegra_hwpm_ip_string(enum tegra_hwpm_ip_enum ip_enum)
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[TEGRA_HWPM_IP_UCF_HUB] = "ucf_hub",
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[TEGRA_HWPM_IP_UCF_HUB] = "ucf_hub",
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[TEGRA_HWPM_IP_UCF_SCB] = "ucf_scb",
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[TEGRA_HWPM_IP_UCF_SCB] = "ucf_scb",
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[TEGRA_HWPM_IP_CPU] = "cpu",
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[TEGRA_HWPM_IP_CPU] = "cpu",
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[TEGRA_HWPM_IP_NVTHERM] = "nvtherm",
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[TERGA_HWPM_NUM_IPS] = "unknown",
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[TERGA_HWPM_NUM_IPS] = "unknown",
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};
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};
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@@ -207,6 +209,7 @@ enum tegra_hwpm_resource_enum {
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TEGRA_HWPM_RESOURCE_UCF_HUB,
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TEGRA_HWPM_RESOURCE_UCF_HUB,
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TEGRA_HWPM_RESOURCE_UCF_SCB,
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TEGRA_HWPM_RESOURCE_UCF_SCB,
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TEGRA_HWPM_RESOURCE_CPU,
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TEGRA_HWPM_RESOURCE_CPU,
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TEGRA_HWPM_RESOURCE_NVTHERM,
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TERGA_HWPM_NUM_RESOURCES
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TERGA_HWPM_NUM_RESOURCES
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};
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};
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@@ -1,4 +1,4 @@
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/* SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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/* SPDX-FileCopyrightText: Copyright (c) 2021-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-License-Identifier: GPL-2.0-only
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* SPDX-License-Identifier: GPL-2.0-only
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*
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*
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* This program is free software; you can redistribute it and/or modify it
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* This program is free software; you can redistribute it and/or modify it
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@@ -147,6 +147,9 @@ static u32 tegra_hwpm_translate_soc_hwpm_ip(struct tegra_soc_hwpm *hwpm,
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case TEGRA_SOC_HWPM_IP_CPU:
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case TEGRA_SOC_HWPM_IP_CPU:
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ip_enum_idx = TEGRA_HWPM_IP_CPU;
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ip_enum_idx = TEGRA_HWPM_IP_CPU;
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break;
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break;
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case TEGRA_SOC_HWPM_IP_NVTHERM:
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ip_enum_idx = TEGRA_HWPM_IP_NVTHERM;
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break;
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default:
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default:
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tegra_hwpm_err(hwpm,
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tegra_hwpm_err(hwpm,
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"Queried enum tegra_soc_hwpm_ip %d is invalid",
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"Queried enum tegra_soc_hwpm_ip %d is invalid",
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@@ -312,6 +315,9 @@ u32 tegra_hwpm_translate_soc_hwpm_resource(struct tegra_soc_hwpm *hwpm,
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case TEGRA_SOC_HWPM_RESOURCE_CPU:
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case TEGRA_SOC_HWPM_RESOURCE_CPU:
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res_enum_idx = TEGRA_HWPM_RESOURCE_CPU;
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res_enum_idx = TEGRA_HWPM_RESOURCE_CPU;
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break;
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break;
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case TEGRA_SOC_HWPM_RESOURCE_NVTHERM:
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res_enum_idx = TEGRA_HWPM_RESOURCE_NVTHERM;
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break;
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default:
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default:
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tegra_hwpm_err(hwpm,
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tegra_hwpm_err(hwpm,
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"Queried enum tegra_soc_hwpm_resource %d is invalid",
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"Queried enum tegra_soc_hwpm_resource %d is invalid",
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@@ -1,4 +1,4 @@
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/* SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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/* SPDX-FileCopyrightText: Copyright (c) 2021-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-License-Identifier: GPL-2.0-only
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* SPDX-License-Identifier: GPL-2.0-only
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*
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*
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* This program is free software; you can redistribute it and/or modify it
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* This program is free software; you can redistribute it and/or modify it
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@@ -62,6 +62,7 @@ enum tegra_soc_hwpm_ip {
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TEGRA_SOC_HWPM_IP_UCF_HUB,
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TEGRA_SOC_HWPM_IP_UCF_HUB,
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TEGRA_SOC_HWPM_IP_UCF_SCB,
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TEGRA_SOC_HWPM_IP_UCF_SCB,
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TEGRA_SOC_HWPM_IP_CPU,
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TEGRA_SOC_HWPM_IP_CPU,
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TEGRA_SOC_HWPM_IP_NVTHERM,
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TERGA_SOC_HWPM_NUM_IPS
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TERGA_SOC_HWPM_NUM_IPS
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};
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};
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@@ -149,6 +150,7 @@ enum tegra_soc_hwpm_resource {
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TEGRA_SOC_HWPM_RESOURCE_UCF_HUB,
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TEGRA_SOC_HWPM_RESOURCE_UCF_HUB,
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TEGRA_SOC_HWPM_RESOURCE_UCF_SCB,
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TEGRA_SOC_HWPM_RESOURCE_UCF_SCB,
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TEGRA_SOC_HWPM_RESOURCE_CPU,
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TEGRA_SOC_HWPM_RESOURCE_CPU,
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TEGRA_SOC_HWPM_RESOURCE_NVTHERM,
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TERGA_SOC_HWPM_NUM_RESOURCES
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TERGA_SOC_HWPM_NUM_RESOURCES
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};
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};
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@@ -73,6 +73,7 @@ typedef enum {
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NV_SOC_HWPM_IP_UCF_HUB,
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NV_SOC_HWPM_IP_UCF_HUB,
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NV_SOC_HWPM_IP_UCF_SCB,
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NV_SOC_HWPM_IP_UCF_SCB,
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NV_SOC_HWPM_IP_CPU,
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NV_SOC_HWPM_IP_CPU,
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NV_SOC_HWPM_IP_NVTHERM,
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NV_SOC_HWPM_NUM_IPS
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NV_SOC_HWPM_NUM_IPS
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} nv_soc_hwpm_ip;
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} nv_soc_hwpm_ip;
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@@ -135,6 +136,7 @@ typedef enum {
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NV_SOC_HWPM_RESOURCE_UCF_HUB,
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NV_SOC_HWPM_RESOURCE_UCF_HUB,
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NV_SOC_HWPM_RESOURCE_UCF_SCB,
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NV_SOC_HWPM_RESOURCE_UCF_SCB,
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NV_SOC_HWPM_RESOURCE_CPU,
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NV_SOC_HWPM_RESOURCE_CPU,
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NV_SOC_HWPM_RESOURCE_NVTHERM,
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NV_SOC_HWPM_NUM_RESOURCES
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NV_SOC_HWPM_NUM_RESOURCES
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} nv_soc_hwpm_resource;
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} nv_soc_hwpm_resource;
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@@ -121,6 +121,12 @@ static uint32_t get_ip_max_instances(
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}
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}
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break;
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break;
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case TEGRA_SOC_HWPM_CHIP_ID_T410:
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case TEGRA_SOC_HWPM_CHIP_ID_T410:
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switch (ip) {
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case NV_SOC_HWPM_IP_NVTHERM:
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return 1;
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default:
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break;
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}
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break;
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break;
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default:
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default:
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break;
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break;
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