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tegra: hwpm: use consistent function names

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- Update common function names to tegra_hwpm_* instead of
tegra_soc_hwpm_*.
- Update header guards to follow similar naming guidelines.

Jira THWPM-41

Change-Id: If5ca4f136f5cb6659a99bae42030817142bd242c
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2675469
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Vasuki Shankar <vasukis@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Vedashree Vidwans
2022-02-25 10:40:12 -08:00
committed by mobile promotions
parent edb9e2c245
commit 9adf6a080d
23 changed files with 110 additions and 107 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
common/tegra_hwpm_alist_utils.c
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@@ -28,7 +28,7 @@
#include <tegra_hwpm_common.h> #include <tegra_hwpm_common.h>
#include <tegra_hwpm_static_analysis.h> #include <tegra_hwpm_static_analysis.h>
int tegra_soc_hwpm_get_allowlist_size(struct tegra_soc_hwpm *hwpm) int tegra_hwpm_get_allowlist_size(struct tegra_soc_hwpm *hwpm)
{ {
int ret = 0; int ret = 0;
@@ -49,7 +49,7 @@ int tegra_soc_hwpm_get_allowlist_size(struct tegra_soc_hwpm *hwpm)
return 0; return 0;
} }
int tegra_soc_hwpm_update_allowlist(struct tegra_soc_hwpm *hwpm, int tegra_hwpm_update_allowlist(struct tegra_soc_hwpm *hwpm,
void *ioctl_struct) void *ioctl_struct)
{ {
int err = 0; int err = 0;
@@ -67,7 +67,7 @@ int tegra_soc_hwpm_update_allowlist(struct tegra_soc_hwpm *hwpm,
tegra_hwpm_fn(hwpm, " "); tegra_hwpm_fn(hwpm, " ");
if (hwpm->full_alist_size < 0ULL) { if (hwpm->full_alist_size == 0ULL) {
tegra_hwpm_err(hwpm, "Invalid allowlist size"); tegra_hwpm_err(hwpm, "Invalid allowlist size");
return -EINVAL; return -EINVAL;
} }

10
common/tegra_hwpm_init.c
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@@ -31,7 +31,7 @@
#include <tegra_hwpm_common.h> #include <tegra_hwpm_common.h>
#include <hal/t234/t234_hwpm_init.h> #include <hal/t234/t234_hwpm_init.h>
int tegra_soc_hwpm_init_chip_info(struct tegra_soc_hwpm *hwpm) int tegra_hwpm_init_chip_info(struct tegra_soc_hwpm *hwpm)
{ {
int err = -EINVAL; int err = -EINVAL;
@@ -70,7 +70,7 @@ int tegra_soc_hwpm_init_chip_info(struct tegra_soc_hwpm *hwpm)
return err; return err;
} }
int tegra_soc_hwpm_setup_sw(struct tegra_soc_hwpm *hwpm) int tegra_hwpm_setup_sw(struct tegra_soc_hwpm *hwpm)
{ {
int ret = 0; int ret = 0;
@@ -97,7 +97,7 @@ fail:
return ret; return ret;
} }
int tegra_soc_hwpm_setup_hw(struct tegra_soc_hwpm *hwpm) int tegra_hwpm_setup_hw(struct tegra_soc_hwpm *hwpm)
{ {
int ret = 0; int ret = 0;
@@ -169,7 +169,7 @@ int tegra_hwpm_disable_triggers(struct tegra_soc_hwpm *hwpm)
return hwpm->active_chip->disable_triggers(hwpm); return hwpm->active_chip->disable_triggers(hwpm);
} }
int tegra_soc_hwpm_release_hw(struct tegra_soc_hwpm *hwpm) int tegra_hwpm_release_hw(struct tegra_soc_hwpm *hwpm)
{ {
int ret = 0; int ret = 0;
@@ -219,7 +219,7 @@ fail:
return ret; return ret;
} }
void tegra_soc_hwpm_release_sw_components(struct tegra_soc_hwpm *hwpm) void tegra_hwpm_release_sw_components(struct tegra_soc_hwpm *hwpm)
{ {
tegra_hwpm_fn(hwpm, " "); tegra_hwpm_fn(hwpm, " ");

2
common/tegra_hwpm_regops_utils.c
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@@ -19,7 +19,7 @@
#include <tegra_hwpm.h> #include <tegra_hwpm.h>
#include <tegra_hwpm_common.h> #include <tegra_hwpm_common.h>
int tegra_soc_hwpm_exec_regops(struct tegra_soc_hwpm *hwpm, int tegra_hwpm_exec_regops(struct tegra_soc_hwpm *hwpm,
struct tegra_soc_hwpm_exec_reg_ops *exec_reg_ops) struct tegra_soc_hwpm_exec_reg_ops *exec_reg_ops)
{ {
struct tegra_soc_hwpm_chip *active_chip = hwpm->active_chip; struct tegra_soc_hwpm_chip *active_chip = hwpm->active_chip;

6
common/tegra_hwpm_resource_utils.c
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@@ -19,7 +19,7 @@
#include <tegra_hwpm_common.h> #include <tegra_hwpm_common.h>
#include <tegra_hwpm_static_analysis.h> #include <tegra_hwpm_static_analysis.h>
int tegra_soc_hwpm_reserve_resource(struct tegra_soc_hwpm *hwpm, u32 resource) int tegra_hwpm_reserve_resource(struct tegra_soc_hwpm *hwpm, u32 resource)
{ {
struct tegra_soc_hwpm_chip *active_chip = hwpm->active_chip; struct tegra_soc_hwpm_chip *active_chip = hwpm->active_chip;
struct hwpm_ip *chip_ip = NULL; struct hwpm_ip *chip_ip = NULL;
@@ -75,7 +75,7 @@ int tegra_soc_hwpm_reserve_resource(struct tegra_soc_hwpm *hwpm, u32 resource)
return 0; return 0;
} }
int tegra_soc_hwpm_release_resources(struct tegra_soc_hwpm *hwpm) int tegra_hwpm_release_resources(struct tegra_soc_hwpm *hwpm)
{ {
int ret = 0; int ret = 0;
@@ -94,7 +94,7 @@ int tegra_soc_hwpm_release_resources(struct tegra_soc_hwpm *hwpm)
return 0; return 0;
} }
int tegra_soc_hwpm_bind_resources(struct tegra_soc_hwpm *hwpm) int tegra_hwpm_bind_resources(struct tegra_soc_hwpm *hwpm)
{ {
int ret = 0; int ret = 0;

4
hal/t234/hw/t234_addr_map_soc_hwpm.h
View File

@@ -47,8 +47,8 @@
* comparison with unshifted values appropriate for use in field <y> * comparison with unshifted values appropriate for use in field <y>
* of register <x>. * of register <x>.
*/ */
#ifndef TEGRA_T234_ADDR_MAP_SOC_HWPM_H #ifndef T234_ADDR_MAP_SOC_HWPM_H
#define TEGRA_T234_ADDR_MAP_SOC_HWPM_H #define T234_ADDR_MAP_SOC_HWPM_H
#define addr_map_rpg_pm_base_r() (0x0f100000U) #define addr_map_rpg_pm_base_r() (0x0f100000U)
#define addr_map_rpg_pm_limit_r() (0x0f149fffU) #define addr_map_rpg_pm_limit_r() (0x0f149fffU)

4
hal/t234/hw/t234_pmasys_soc_hwpm.h
View File

@@ -47,8 +47,8 @@
* comparison with unshifted values appropriate for use in field <y> * comparison with unshifted values appropriate for use in field <y>
* of register <x>. * of register <x>.
*/ */
#ifndef TEGRA_T234_PMASYS_SOC_HWPM_H #ifndef T234_PMASYS_SOC_HWPM_H
#define TEGRA_T234_PMASYS_SOC_HWPM_H #define T234_PMASYS_SOC_HWPM_H
#define pmasys_cg2_r() (0x0f14a044U) #define pmasys_cg2_r() (0x0f14a044U)
#define pmasys_cg2_slcg_f(v) (((v) & 0x1U) << 0U) #define pmasys_cg2_slcg_f(v) (((v) & 0x1U) << 0U)

4
hal/t234/hw/t234_pmmsys_soc_hwpm.h
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@@ -47,8 +47,8 @@
* comparison with unshifted values appropriate for use in field <y> * comparison with unshifted values appropriate for use in field <y>
* of register <x>. * of register <x>.
*/ */
#ifndef TEGRA_T234_PMMSYS_SOC_HWPM_H #ifndef T234_PMMSYS_SOC_HWPM_H
#define TEGRA_T234_PMMSYS_SOC_HWPM_H #define T234_PMMSYS_SOC_HWPM_H
#define pmmsys_perdomain_offset_v() (0x00001000U) #define pmmsys_perdomain_offset_v() (0x00001000U)
#define pmmsys_control_r(i)\ #define pmmsys_control_r(i)\

2
hal/t234/t234_hwpm_alist_utils.c
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@@ -35,7 +35,7 @@ int t234_hwpm_zero_alist_regs(struct tegra_soc_hwpm *hwpm,
for (alist_idx = 0; alist_idx < aperture->alist_size; alist_idx++) { for (alist_idx = 0; alist_idx < aperture->alist_size; alist_idx++) {
if (aperture->alist[alist_idx].zero_at_init) { if (aperture->alist[alist_idx].zero_at_init) {
regops_writel(hwpm, aperture, tegra_hwpm_regops_writel(hwpm, aperture,
tegra_hwpm_safe_add_u64(aperture->start_abs_pa, tegra_hwpm_safe_add_u64(aperture->start_abs_pa,
aperture->alist[alist_idx].reg_offset), aperture->alist[alist_idx].reg_offset),
0U); 0U);

6
hal/t234/t234_hwpm_init.h
View File

@@ -11,11 +11,11 @@
* more details. * more details.
*/ */
#ifndef T234_SOC_HWPM_INIT_H #ifndef T234_HWPM_INIT_H
#define T234_SOC_HWPM_INIT_H #define T234_HWPM_INIT_H
struct tegra_soc_hwpm; struct tegra_soc_hwpm;
int t234_hwpm_init_chip_info(struct tegra_soc_hwpm *hwpm); int t234_hwpm_init_chip_info(struct tegra_soc_hwpm *hwpm);
#endif /* T234_SOC_HWPM_INIT_H */ #endif /* T234_HWPM_INIT_H */

6
hal/t234/t234_hwpm_internal.h
View File

@@ -11,8 +11,8 @@
* more details. * more details.
*/ */
#ifndef T234_SOC_HWPM_INTERNAL_H #ifndef T234_HWPM_INTERNAL_H
#define T234_SOC_HWPM_INTERNAL_H #define T234_HWPM_INTERNAL_H
#include <hal/t234/ip/vi/t234_hwpm_ip_vi.h> #include <hal/t234/ip/vi/t234_hwpm_ip_vi.h>
#include <hal/t234/ip/isp/t234_hwpm_ip_isp.h> #include <hal/t234/ip/isp/t234_hwpm_ip_isp.h>
@@ -119,4 +119,4 @@ int t234_hwpm_exec_reg_ops(struct tegra_soc_hwpm *hwpm,
void t234_hwpm_release_sw_setup(struct tegra_soc_hwpm *hwpm); void t234_hwpm_release_sw_setup(struct tegra_soc_hwpm *hwpm);
#endif /* T234_SOC_HWPM_INTERNAL_H */ #endif /* T234_HWPM_INTERNAL_H */

2
hal/t234/t234_hwpm_regops_allowlist.c
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@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved.
* *
* This program is free software; you can redistribute it and/or modify it * This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License, * under the terms and conditions of the GNU General Public License,

3
hal/t234/t234_hwpm_regops_allowlist.h
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@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved.
* *
* This program is free software; you can redistribute it and/or modify it * This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License, * under the terms and conditions of the GNU General Public License,
@@ -48,4 +48,5 @@ extern struct allowlist t234_mc8_res_mss_iso_niso_hub_alist[1];
extern struct allowlist t234_mcb_mss_mcf_alist[4]; extern struct allowlist t234_mcb_mss_mcf_alist[4];
extern struct allowlist t234_mc0to1_mss_mcf_alist[3]; extern struct allowlist t234_mc0to1_mss_mcf_alist[3];
extern struct allowlist t234_mc2to7_mss_mcf_alist[1]; extern struct allowlist t234_mc2to7_mss_mcf_alist[1];
#endif /* T234_HWPM_REGOPS_ALLOWLIST_H */ #endif /* T234_HWPM_REGOPS_ALLOWLIST_H */

38
hal/t234/t234_hwpm_regops_utils.c
View File

@@ -249,29 +249,28 @@ int t234_hwpm_exec_reg_ops(struct tegra_soc_hwpm *hwpm,
switch (reg_op->cmd) { switch (reg_op->cmd) {
case TEGRA_SOC_HWPM_REG_OP_CMD_RD32: case TEGRA_SOC_HWPM_REG_OP_CMD_RD32:
reg_op->reg_val_lo = regops_readl(hwpm, reg_op->reg_val_lo = tegra_hwpm_regops_readl(hwpm,
aperture, aperture, reg_op->phys_addr);
reg_op->phys_addr);
reg_op->status = TEGRA_SOC_HWPM_REG_OP_STATUS_SUCCESS; reg_op->status = TEGRA_SOC_HWPM_REG_OP_STATUS_SUCCESS;
break; break;
case TEGRA_SOC_HWPM_REG_OP_CMD_RD64: case TEGRA_SOC_HWPM_REG_OP_CMD_RD64:
addr_hi = tegra_hwpm_safe_add_u64(reg_op->phys_addr, 4ULL); addr_hi = tegra_hwpm_safe_add_u64(reg_op->phys_addr, 4ULL);
reg_op->reg_val_lo = regops_readl(hwpm, reg_op->reg_val_lo = tegra_hwpm_regops_readl(hwpm,
aperture, aperture, reg_op->phys_addr);
reg_op->phys_addr); reg_op->reg_val_hi = tegra_hwpm_regops_readl(hwpm,
reg_op->reg_val_hi = regops_readl(hwpm, aperture, addr_hi);
aperture,
addr_hi);
reg_op->status = TEGRA_SOC_HWPM_REG_OP_STATUS_SUCCESS; reg_op->status = TEGRA_SOC_HWPM_REG_OP_STATUS_SUCCESS;
break; break;
/* Read Modify Write operation */ /* Read Modify Write operation */
case TEGRA_SOC_HWPM_REG_OP_CMD_WR32: case TEGRA_SOC_HWPM_REG_OP_CMD_WR32:
reg_val = regops_readl(hwpm, aperture, reg_op->phys_addr); reg_val = tegra_hwpm_regops_readl(hwpm,
aperture, reg_op->phys_addr);
reg_val = set_field(reg_val, reg_op->mask_lo, reg_val = set_field(reg_val, reg_op->mask_lo,
reg_op->reg_val_lo); reg_op->reg_val_lo);
regops_writel(hwpm, aperture, reg_op->phys_addr, reg_val); tegra_hwpm_regops_writel(hwpm,
aperture, reg_op->phys_addr, reg_val);
reg_op->status = TEGRA_SOC_HWPM_REG_OP_STATUS_SUCCESS; reg_op->status = TEGRA_SOC_HWPM_REG_OP_STATUS_SUCCESS;
break; break;
@@ -280,16 +279,19 @@ int t234_hwpm_exec_reg_ops(struct tegra_soc_hwpm *hwpm,
addr_hi = tegra_hwpm_safe_add_u64(reg_op->phys_addr, 4ULL); addr_hi = tegra_hwpm_safe_add_u64(reg_op->phys_addr, 4ULL);
/* Lower 32 bits */ /* Lower 32 bits */
reg_val = regops_readl(hwpm, aperture, reg_op->phys_addr); reg_val = tegra_hwpm_regops_readl(hwpm,
aperture, reg_op->phys_addr);
reg_val = set_field(reg_val, reg_op->mask_lo, reg_val = set_field(reg_val, reg_op->mask_lo,
reg_op->reg_val_lo); reg_op->reg_val_lo);
regops_writel(hwpm, aperture, reg_op->phys_addr, reg_val); tegra_hwpm_regops_writel(hwpm,
aperture, reg_op->phys_addr, reg_val);
/* Upper 32 bits */ /* Upper 32 bits */
reg_val = regops_readl(hwpm, aperture, addr_hi); reg_val = tegra_hwpm_regops_readl(hwpm, aperture, addr_hi);
reg_val = set_field(reg_val, reg_op->mask_hi, reg_val = set_field(reg_val, reg_op->mask_hi,
reg_op->reg_val_hi); reg_op->reg_val_hi);
regops_writel(hwpm, aperture, reg_op->phys_addr, reg_val); tegra_hwpm_regops_writel(hwpm,
aperture, reg_op->phys_addr, reg_val);
reg_op->status = TEGRA_SOC_HWPM_REG_OP_STATUS_SUCCESS; reg_op->status = TEGRA_SOC_HWPM_REG_OP_STATUS_SUCCESS;
break; break;

26
include/tegra_hwpm_common.h
View File

@@ -20,24 +20,24 @@ struct tegra_soc_hwpm_ip_floorsweep_info;
struct tegra_soc_hwpm_alloc_pma_stream; struct tegra_soc_hwpm_alloc_pma_stream;
struct tegra_soc_hwpm_update_get_put; struct tegra_soc_hwpm_update_get_put;
int tegra_soc_hwpm_init_chip_info(struct tegra_soc_hwpm *hwpm); int tegra_hwpm_init_chip_info(struct tegra_soc_hwpm *hwpm);
int tegra_soc_hwpm_init_floorsweep_info(struct tegra_soc_hwpm *hwpm); int tegra_hwpm_init_floorsweep_info(struct tegra_soc_hwpm *hwpm);
int tegra_soc_hwpm_reserve_resource(struct tegra_soc_hwpm *hwpm, u32 resource); int tegra_hwpm_reserve_resource(struct tegra_soc_hwpm *hwpm, u32 resource);
int tegra_soc_hwpm_release_resources(struct tegra_soc_hwpm *hwpm); int tegra_hwpm_release_resources(struct tegra_soc_hwpm *hwpm);
int tegra_soc_hwpm_bind_resources(struct tegra_soc_hwpm *hwpm); int tegra_hwpm_bind_resources(struct tegra_soc_hwpm *hwpm);
int tegra_soc_hwpm_get_allowlist_size(struct tegra_soc_hwpm *hwpm); int tegra_hwpm_get_allowlist_size(struct tegra_soc_hwpm *hwpm);
int tegra_soc_hwpm_update_allowlist(struct tegra_soc_hwpm *hwpm, int tegra_hwpm_update_allowlist(struct tegra_soc_hwpm *hwpm,
void *ioctl_struct); void *ioctl_struct);
int tegra_soc_hwpm_exec_regops(struct tegra_soc_hwpm *hwpm, int tegra_hwpm_exec_regops(struct tegra_soc_hwpm *hwpm,
struct tegra_soc_hwpm_exec_reg_ops *exec_reg_ops); struct tegra_soc_hwpm_exec_reg_ops *exec_reg_ops);
int tegra_soc_hwpm_setup_hw(struct tegra_soc_hwpm *hwpm); int tegra_hwpm_setup_hw(struct tegra_soc_hwpm *hwpm);
int tegra_soc_hwpm_setup_sw(struct tegra_soc_hwpm *hwpm); int tegra_hwpm_setup_sw(struct tegra_soc_hwpm *hwpm);
int tegra_hwpm_disable_triggers(struct tegra_soc_hwpm *hwpm); int tegra_hwpm_disable_triggers(struct tegra_soc_hwpm *hwpm);
int tegra_soc_hwpm_release_hw(struct tegra_soc_hwpm *hwpm); int tegra_hwpm_release_hw(struct tegra_soc_hwpm *hwpm);
void tegra_soc_hwpm_release_sw_components(struct tegra_soc_hwpm *hwpm); void tegra_hwpm_release_sw_components(struct tegra_soc_hwpm *hwpm);
int tegra_soc_hwpm_get_floorsweep_info(struct tegra_soc_hwpm *hwpm, int tegra_hwpm_get_floorsweep_info(struct tegra_soc_hwpm *hwpm,
struct tegra_soc_hwpm_ip_floorsweep_info *fs_info); struct tegra_soc_hwpm_ip_floorsweep_info *fs_info);
int tegra_hwpm_map_stream_buffer(struct tegra_soc_hwpm *hwpm, int tegra_hwpm_map_stream_buffer(struct tegra_soc_hwpm *hwpm,

8
include/tegra_hwpm_debugfs.h
View File

@@ -17,11 +17,11 @@
struct tegra_soc_hwpm; struct tegra_soc_hwpm;
#ifdef CONFIG_DEBUG_FS #ifdef CONFIG_DEBUG_FS
void tegra_soc_hwpm_debugfs_init(struct tegra_soc_hwpm *hwpm); void tegra_hwpm_debugfs_init(struct tegra_soc_hwpm *hwpm);
void tegra_soc_hwpm_debugfs_deinit(struct tegra_soc_hwpm *hwpm); void tegra_hwpm_debugfs_deinit(struct tegra_soc_hwpm *hwpm);
#else #else
static inline void tegra_soc_hwpm_debugfs_init(struct tegra_soc_hwpm *hwpm) {} static inline void tegra_hwpm_debugfs_init(struct tegra_soc_hwpm *hwpm) {}
static inline void tegra_soc_hwpm_debugfs_deinit(struct tegra_soc_hwpm *hwpm) {} static inline void tegra_hwpm_debugfs_deinit(struct tegra_soc_hwpm *hwpm) {}
#endif /* CONFIG_DEBUG_FS */ #endif /* CONFIG_DEBUG_FS */
#endif /* TEGRA_HWPM_DEBUGFS_H */ #endif /* TEGRA_HWPM_DEBUGFS_H */

4
include/tegra_hwpm_io.h
View File

@@ -57,9 +57,9 @@ u32 tegra_hwpm_readl(struct tegra_soc_hwpm *hwpm,
struct hwpm_ip_aperture *aperture, u64 addr); struct hwpm_ip_aperture *aperture, u64 addr);
void tegra_hwpm_writel(struct tegra_soc_hwpm *hwpm, void tegra_hwpm_writel(struct tegra_soc_hwpm *hwpm,
struct hwpm_ip_aperture *aperture, u64 addr, u32 val); struct hwpm_ip_aperture *aperture, u64 addr, u32 val);
u32 regops_readl(struct tegra_soc_hwpm *hwpm, u32 tegra_hwpm_regops_readl(struct tegra_soc_hwpm *hwpm,
struct hwpm_ip_aperture *aperture, u64 addr); struct hwpm_ip_aperture *aperture, u64 addr);
void regops_writel(struct tegra_soc_hwpm *hwpm, void tegra_hwpm_regops_writel(struct tegra_soc_hwpm *hwpm,
struct hwpm_ip_aperture *aperture, u64 addr, u32 val); struct hwpm_ip_aperture *aperture, u64 addr, u32 val);
#endif /* TEGRA_HWPM_IO_H */ #endif /* TEGRA_HWPM_IO_H */

4
include/tegra_hwpm_log.h
View File

@@ -30,7 +30,7 @@ enum tegra_soc_hwpm_log_type {
#define hwpm_verbose BIT(3) #define hwpm_verbose BIT(3)
#define tegra_hwpm_err(hwpm, fmt, arg...) \ #define tegra_hwpm_err(hwpm, fmt, arg...) \
tegra_soc_err_impl(hwpm, __func__, __LINE__, fmt, ##arg) tegra_hwpm_err_impl(hwpm, __func__, __LINE__, fmt, ##arg)
#define tegra_hwpm_dbg(hwpm, dbg_mask, fmt, arg...) \ #define tegra_hwpm_dbg(hwpm, dbg_mask, fmt, arg...) \
tegra_hwpm_dbg_impl(hwpm, dbg_mask, __func__, __LINE__, fmt, ##arg) tegra_hwpm_dbg_impl(hwpm, dbg_mask, __func__, __LINE__, fmt, ##arg)
#define tegra_hwpm_fn(hwpm, fmt, arg...) \ #define tegra_hwpm_fn(hwpm, fmt, arg...) \
@@ -38,7 +38,7 @@ enum tegra_soc_hwpm_log_type {
struct tegra_soc_hwpm; struct tegra_soc_hwpm;
void tegra_soc_err_impl(struct tegra_soc_hwpm *hwpm, void tegra_hwpm_err_impl(struct tegra_soc_hwpm *hwpm,
const char *func, int line, const char *fmt, ...); const char *func, int line, const char *fmt, ...);
void tegra_hwpm_dbg_impl(struct tegra_soc_hwpm *hwpm, void tegra_hwpm_dbg_impl(struct tegra_soc_hwpm *hwpm,
u32 dbg_mask, const char *func, int line, const char *fmt, ...); u32 dbg_mask, const char *func, int line, const char *fmt, ...);

4
os/linux/tegra_hwpm_debugfs.c
View File

@@ -19,7 +19,7 @@
#include <tegra_hwpm.h> #include <tegra_hwpm.h>
/* FIXME: This is a placeholder for now. We can add debugfs nodes as needed. */ /* FIXME: This is a placeholder for now. We can add debugfs nodes as needed. */
void tegra_soc_hwpm_debugfs_init(struct tegra_soc_hwpm *hwpm) void tegra_hwpm_debugfs_init(struct tegra_soc_hwpm *hwpm)
{ {
if (!hwpm) { if (!hwpm) {
tegra_hwpm_err(hwpm, "Invalid hwpm struct"); tegra_hwpm_err(hwpm, "Invalid hwpm struct");
@@ -44,7 +44,7 @@ fail:
hwpm->debugfs_root = NULL; hwpm->debugfs_root = NULL;
} }
void tegra_soc_hwpm_debugfs_deinit(struct tegra_soc_hwpm *hwpm) void tegra_hwpm_debugfs_deinit(struct tegra_soc_hwpm *hwpm)
{ {
if (!hwpm) { if (!hwpm) {
tegra_hwpm_err(hwpm, "Invalid hwpm struct"); tegra_hwpm_err(hwpm, "Invalid hwpm struct");

4
os/linux/tegra_hwpm_io.c
View File

@@ -243,7 +243,7 @@ void tegra_hwpm_writel(struct tegra_soc_hwpm *hwpm,
* Read a register from the EXEC_REG_OPS IOCTL. It is assumed that the allowlist * Read a register from the EXEC_REG_OPS IOCTL. It is assumed that the allowlist
* check has been done before calling this function. * check has been done before calling this function.
*/ */
u32 regops_readl(struct tegra_soc_hwpm *hwpm, u32 tegra_hwpm_regops_readl(struct tegra_soc_hwpm *hwpm,
struct hwpm_ip_aperture *aperture, u64 addr) struct hwpm_ip_aperture *aperture, u64 addr)
{ {
u32 reg_val = 0; u32 reg_val = 0;
@@ -269,7 +269,7 @@ u32 regops_readl(struct tegra_soc_hwpm *hwpm,
* Write a register from the EXEC_REG_OPS IOCTL. It is assumed that the * Write a register from the EXEC_REG_OPS IOCTL. It is assumed that the
* allowlist check has been done before calling this function. * allowlist check has been done before calling this function.
*/ */
void regops_writel(struct tegra_soc_hwpm *hwpm, void tegra_hwpm_regops_writel(struct tegra_soc_hwpm *hwpm,
struct hwpm_ip_aperture *aperture, u64 addr, u32 val) struct hwpm_ip_aperture *aperture, u64 addr, u32 val)
{ {
u64 reg_offset = 0ULL; u64 reg_offset = 0ULL;

40
os/linux/tegra_hwpm_ioctl.c
View File

@@ -139,7 +139,7 @@ static int floorsweep_info_ioctl(struct tegra_soc_hwpm *hwpm,
return -EINVAL; return -EINVAL;
} }
return tegra_soc_hwpm_get_floorsweep_info(hwpm, fs_info); return tegra_hwpm_get_floorsweep_info(hwpm, fs_info);
} }
static int timer_relation_ioctl(struct tegra_soc_hwpm *hwpm, static int timer_relation_ioctl(struct tegra_soc_hwpm *hwpm,
@@ -177,7 +177,7 @@ static int reserve_resource_ioctl(struct tegra_soc_hwpm *hwpm,
return -EINVAL; return -EINVAL;
} }
ret = tegra_soc_hwpm_reserve_resource(hwpm, resource); ret = tegra_hwpm_reserve_resource(hwpm, resource);
if (ret < 0) { if (ret < 0) {
tegra_hwpm_err(hwpm, "Failed to reserve resource %d", resource); tegra_hwpm_err(hwpm, "Failed to reserve resource %d", resource);
} }
@@ -224,7 +224,7 @@ static int bind_ioctl(struct tegra_soc_hwpm *hwpm,
{ {
int ret = 0; int ret = 0;
ret = tegra_soc_hwpm_bind_resources(hwpm); ret = tegra_hwpm_bind_resources(hwpm);
if (ret != 0) { if (ret != 0) {
tegra_hwpm_err(hwpm, "Failed to bind resources"); tegra_hwpm_err(hwpm, "Failed to bind resources");
} else { } else {
@@ -252,7 +252,7 @@ static int query_allowlist_ioctl(struct tegra_soc_hwpm *hwpm,
/* Userspace is querying allowlist size only */ /* Userspace is querying allowlist size only */
if (hwpm->full_alist_size == 0) { if (hwpm->full_alist_size == 0) {
/*Full alist size is not computed yet */ /*Full alist size is not computed yet */
ret = tegra_soc_hwpm_get_allowlist_size(hwpm); ret = tegra_hwpm_get_allowlist_size(hwpm);
if (ret != 0) { if (ret != 0) {
tegra_hwpm_err(hwpm, tegra_hwpm_err(hwpm,
"failed to get alist_size"); "failed to get alist_size");
@@ -262,7 +262,7 @@ static int query_allowlist_ioctl(struct tegra_soc_hwpm *hwpm,
query_allowlist->allowlist_size = hwpm->full_alist_size; query_allowlist->allowlist_size = hwpm->full_alist_size;
} else { } else {
/* Concatenate allowlists and return */ /* Concatenate allowlists and return */
ret = tegra_soc_hwpm_update_allowlist(hwpm, query_allowlist); ret = tegra_hwpm_update_allowlist(hwpm, query_allowlist);
if (ret != 0) { if (ret != 0) {
tegra_hwpm_err(hwpm, "Failed to update full alist"); tegra_hwpm_err(hwpm, "Failed to update full alist");
return ret; return ret;
@@ -280,7 +280,7 @@ static int exec_reg_ops_ioctl(struct tegra_soc_hwpm *hwpm,
return -EPERM; return -EPERM;
} }
return tegra_soc_hwpm_exec_regops(hwpm, return tegra_hwpm_exec_regops(hwpm,
(struct tegra_soc_hwpm_exec_reg_ops *)ioctl_struct); (struct tegra_soc_hwpm_exec_reg_ops *)ioctl_struct);
} }
@@ -305,7 +305,7 @@ static int update_get_put_ioctl(struct tegra_soc_hwpm *hwpm,
return tegra_hwpm_update_mem_bytes(hwpm, update_get_put); return tegra_hwpm_update_mem_bytes(hwpm, update_get_put);
} }
static long tegra_soc_hwpm_ioctl(struct file *file, static long tegra_hwpm_ioctl(struct file *file,
unsigned int cmd, unsigned int cmd,
unsigned long arg) unsigned long arg)
{ {
@@ -397,7 +397,7 @@ end:
return ret; return ret;
} }
static int tegra_soc_hwpm_open(struct inode *inode, struct file *filp) static int tegra_hwpm_open(struct inode *inode, struct file *filp)
{ {
int ret = 0; int ret = 0;
unsigned int minor; unsigned int minor;
@@ -474,13 +474,13 @@ static int tegra_soc_hwpm_open(struct inode *inode, struct file *filp)
} }
} }
ret = tegra_soc_hwpm_setup_hw(hwpm); ret = tegra_hwpm_setup_hw(hwpm);
if (ret < 0) { if (ret < 0) {
tegra_hwpm_err(hwpm, "Failed to setup hw"); tegra_hwpm_err(hwpm, "Failed to setup hw");
goto fail; goto fail;
} }
ret = tegra_soc_hwpm_setup_sw(hwpm); ret = tegra_hwpm_setup_sw(hwpm);
if (ret < 0) { if (ret < 0) {
tegra_hwpm_err(hwpm, "Failed to setup sw"); tegra_hwpm_err(hwpm, "Failed to setup sw");
goto fail; goto fail;
@@ -488,7 +488,7 @@ static int tegra_soc_hwpm_open(struct inode *inode, struct file *filp)
return 0; return 0;
fail: fail:
ret = tegra_soc_hwpm_release_hw(hwpm); ret = tegra_hwpm_release_hw(hwpm);
if (ret < 0) { if (ret < 0) {
tegra_hwpm_err(hwpm, "Failed to release hw"); tegra_hwpm_err(hwpm, "Failed to release hw");
} }
@@ -497,7 +497,7 @@ fail:
return ret; return ret;
} }
static ssize_t tegra_soc_hwpm_read(struct file *file, static ssize_t tegra_hwpm_read(struct file *file,
char __user *ubuf, char __user *ubuf,
size_t count, size_t count,
loff_t *offp) loff_t *offp)
@@ -506,7 +506,7 @@ static ssize_t tegra_soc_hwpm_read(struct file *file,
} }
/* FIXME: Fix double release bug */ /* FIXME: Fix double release bug */
static int tegra_soc_hwpm_release(struct inode *inode, struct file *filp) static int tegra_hwpm_release(struct inode *inode, struct file *filp)
{ {
int ret = 0; int ret = 0;
struct tegra_soc_hwpm *hwpm = NULL; struct tegra_soc_hwpm *hwpm = NULL;
@@ -538,7 +538,7 @@ static int tegra_soc_hwpm_release(struct inode *inode, struct file *filp)
} }
/* Disable and release reserved IPs */ /* Disable and release reserved IPs */
ret = tegra_soc_hwpm_release_resources(hwpm); ret = tegra_hwpm_release_resources(hwpm);
if (ret < 0) { if (ret < 0) {
tegra_hwpm_err(hwpm, "Failed to release IP apertures"); tegra_hwpm_err(hwpm, "Failed to release IP apertures");
goto fail; goto fail;
@@ -551,7 +551,7 @@ static int tegra_soc_hwpm_release(struct inode *inode, struct file *filp)
goto fail; goto fail;
} }
ret = tegra_soc_hwpm_release_hw(hwpm); ret = tegra_hwpm_release_hw(hwpm);
if (ret < 0) { if (ret < 0) {
tegra_hwpm_err(hwpm, "Failed to release hw"); tegra_hwpm_err(hwpm, "Failed to release hw");
goto fail; goto fail;
@@ -577,11 +577,11 @@ fail:
/* File ops for device node */ /* File ops for device node */
const struct file_operations tegra_soc_hwpm_ops = { const struct file_operations tegra_soc_hwpm_ops = {
.owner = THIS_MODULE, .owner = THIS_MODULE,
.open = tegra_soc_hwpm_open, .open = tegra_hwpm_open,
.read = tegra_soc_hwpm_read, .read = tegra_hwpm_read,
.release = tegra_soc_hwpm_release, .release = tegra_hwpm_release,
.unlocked_ioctl = tegra_soc_hwpm_ioctl, .unlocked_ioctl = tegra_hwpm_ioctl,
#ifdef CONFIG_COMPAT #ifdef CONFIG_COMPAT
.compat_ioctl = tegra_soc_hwpm_ioctl, .compat_ioctl = tegra_hwpm_ioctl,
#endif #endif
}; };

2
os/linux/tegra_hwpm_ip.c
View File

@@ -85,7 +85,7 @@ void tegra_soc_hwpm_ip_unregister(struct tegra_soc_hwpm_ip_ops *hwpm_ip_ops)
} }
} }
int tegra_soc_hwpm_get_floorsweep_info(struct tegra_soc_hwpm *hwpm, int tegra_hwpm_get_floorsweep_info(struct tegra_soc_hwpm *hwpm,
struct tegra_soc_hwpm_ip_floorsweep_info *fs_info) struct tegra_soc_hwpm_ip_floorsweep_info *fs_info)
{ {
int ret = 0; int ret = 0;

24
os/linux/tegra_hwpm_linux.c
View File

@@ -36,7 +36,7 @@ static const struct of_device_id tegra_soc_hwpm_of_match[] = {
}; };
MODULE_DEVICE_TABLE(of, tegra_soc_hwpm_of_match); MODULE_DEVICE_TABLE(of, tegra_soc_hwpm_of_match);
static int tegra_soc_hwpm_probe(struct platform_device *pdev) static int tegra_hwpm_probe(struct platform_device *pdev)
{ {
int ret = 0; int ret = 0;
struct device *dev = NULL; struct device *dev = NULL;
@@ -125,8 +125,8 @@ static int tegra_soc_hwpm_probe(struct platform_device *pdev)
} }
} }
tegra_soc_hwpm_debugfs_init(hwpm); tegra_hwpm_debugfs_init(hwpm);
tegra_soc_hwpm_init_chip_info(hwpm); tegra_hwpm_init_chip_info(hwpm);
/* /*
* Currently VDK doesn't have a fmodel for SOC HWPM. Therefore, we * Currently VDK doesn't have a fmodel for SOC HWPM. Therefore, we
@@ -169,7 +169,7 @@ success:
return ret; return ret;
} }
static int tegra_soc_hwpm_remove(struct platform_device *pdev) static int tegra_hwpm_remove(struct platform_device *pdev)
{ {
struct tegra_soc_hwpm *hwpm = NULL; struct tegra_soc_hwpm *hwpm = NULL;
@@ -200,22 +200,22 @@ static int tegra_soc_hwpm_remove(struct platform_device *pdev)
unregister_chrdev_region(hwpm->dev_t, 1); unregister_chrdev_region(hwpm->dev_t, 1);
class_unregister(&hwpm->class); class_unregister(&hwpm->class);
tegra_soc_hwpm_debugfs_deinit(hwpm); tegra_hwpm_debugfs_deinit(hwpm);
tegra_soc_hwpm_release_sw_components(hwpm); tegra_hwpm_release_sw_components(hwpm);
return 0; return 0;
} }
static struct platform_driver tegra_soc_hwpm_pdrv = { static struct platform_driver tegra_soc_hwpm_pdrv = {
.probe = tegra_soc_hwpm_probe, .probe = tegra_hwpm_probe,
.remove = tegra_soc_hwpm_remove, .remove = tegra_hwpm_remove,
.driver = { .driver = {
.name = TEGRA_SOC_HWPM_MODULE_NAME, .name = TEGRA_SOC_HWPM_MODULE_NAME,
.of_match_table = of_match_ptr(tegra_soc_hwpm_of_match), .of_match_table = of_match_ptr(tegra_soc_hwpm_of_match),
}, },
}; };
static int __init tegra_soc_hwpm_init(void) static int __init tegra_hwpm_init(void)
{ {
int ret = 0; int ret = 0;
@@ -226,13 +226,13 @@ static int __init tegra_soc_hwpm_init(void)
return ret; return ret;
} }
static void __exit tegra_soc_hwpm_exit(void) static void __exit tegra_hwpm_exit(void)
{ {
platform_driver_unregister(&tegra_soc_hwpm_pdrv); platform_driver_unregister(&tegra_soc_hwpm_pdrv);
} }
postcore_initcall(tegra_soc_hwpm_init); postcore_initcall(tegra_hwpm_init);
module_exit(tegra_soc_hwpm_exit); module_exit(tegra_hwpm_exit);
MODULE_ALIAS(TEGRA_SOC_HWPM_MODULE_NAME); MODULE_ALIAS(TEGRA_SOC_HWPM_MODULE_NAME);
MODULE_DESCRIPTION("Tegra SOC HWPM Driver"); MODULE_DESCRIPTION("Tegra SOC HWPM Driver");

8
os/linux/tegra_hwpm_log.c
View File

@@ -18,7 +18,7 @@
#define LOG_BUF_SIZE 160 #define LOG_BUF_SIZE 160
static void tegra_soc_hwpm_print(const char *func, int line, static void tegra_hwpm_print(const char *func, int line,
int type, const char *log) int type, const char *log)
{ {
switch (type) { switch (type) {
@@ -33,7 +33,7 @@ static void tegra_soc_hwpm_print(const char *func, int line,
} }
} }
void tegra_soc_err_impl(struct tegra_soc_hwpm *hwpm, void tegra_hwpm_err_impl(struct tegra_soc_hwpm *hwpm,
const char *func, int line, const char *fmt, ...) const char *func, int line, const char *fmt, ...)
{ {
char log[LOG_BUF_SIZE]; char log[LOG_BUF_SIZE];
@@ -43,7 +43,7 @@ void tegra_soc_err_impl(struct tegra_soc_hwpm *hwpm,
(void) vsnprintf(log, LOG_BUF_SIZE, fmt, args); (void) vsnprintf(log, LOG_BUF_SIZE, fmt, args);
va_end(args); va_end(args);
tegra_soc_hwpm_print(func, line, TEGRA_HWPM_ERROR, log); tegra_hwpm_print(func, line, TEGRA_HWPM_ERROR, log);
} }
void tegra_hwpm_dbg_impl(struct tegra_soc_hwpm *hwpm, void tegra_hwpm_dbg_impl(struct tegra_soc_hwpm *hwpm,
@@ -60,5 +60,5 @@ void tegra_hwpm_dbg_impl(struct tegra_soc_hwpm *hwpm,
(void) vsnprintf(log, LOG_BUF_SIZE, fmt, args); (void) vsnprintf(log, LOG_BUF_SIZE, fmt, args);
va_end(args); va_end(args);
tegra_soc_hwpm_print(func, line, TEGRA_HWPM_DEBUG, log); tegra_hwpm_print(func, line, TEGRA_HWPM_DEBUG, log);
} }