diff --git a/drivers/tegra/hwpm/hal/t264/ip/isp/t264_isp.c b/drivers/tegra/hwpm/hal/t264/ip/isp/t264_isp.c
index 99ff594..6ab4936 100644
--- a/drivers/tegra/hwpm/hal/t264/ip/isp/t264_isp.c
+++ b/drivers/tegra/hwpm/hal/t264/ip/isp/t264_isp.c
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT
 /*
- * SPDX-FileCopyrightText: Copyright (c) 2023-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright (c) 2023-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -265,6 +265,7 @@ struct hwpm_ip t264_hwpm_ip_isp = {
 			.inst_stride = addr_map_isp_thi_limit_r() -
 				addr_map_isp_thi_base_r() + 1ULL,
 			.inst_slots = 0U,
+			.islots_overlimit = true,
 			.inst_arr = NULL,
 		},
 		/*
diff --git a/drivers/tegra/hwpm/hal/t264/ip/vi/t264_vi.c b/drivers/tegra/hwpm/hal/t264/ip/vi/t264_vi.c
index 9211d34..db6aa7b 100644
--- a/drivers/tegra/hwpm/hal/t264/ip/vi/t264_vi.c
+++ b/drivers/tegra/hwpm/hal/t264/ip/vi/t264_vi.c
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT
 /*
- * SPDX-FileCopyrightText: Copyright (c) 2023-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright (c) 2023-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -265,6 +265,7 @@ struct hwpm_ip t264_hwpm_ip_vi = {
 			.inst_stride = addr_map_vi_thi_limit_r() -
 				addr_map_vi_thi_base_r() + 1ULL,
 			.inst_slots = 0U,
+			.islots_overlimit = true,
 			.inst_arr = NULL,
 		},
 		/*
diff --git a/drivers/tegra/hwpm/hal/t264/t264_interface.c b/drivers/tegra/hwpm/hal/t264/t264_interface.c
index 35288c6..7cda07b 100644
--- a/drivers/tegra/hwpm/hal/t264/t264_interface.c
+++ b/drivers/tegra/hwpm/hal/t264/t264_interface.c
@@ -242,7 +242,7 @@ bool t264_hwpm_is_resource_active(struct tegra_soc_hwpm *hwpm,
 #endif
 		break;
 #if defined(CONFIG_T264_HWPM_IP_ISP)
-	case TEGRA_HWPM_IP_ISP:
+	case TEGRA_HWPM_RESOURCE_ISP:
 		config_ip = T264_HWPM_IP_ISP;
 #endif
 		break;
diff --git a/drivers/tegra/hwpm/hal/t264/t264_internal.h b/drivers/tegra/hwpm/hal/t264/t264_internal.h
index e6c9aaf..077cb3e 100644
--- a/drivers/tegra/hwpm/hal/t264/t264_internal.h
+++ b/drivers/tegra/hwpm/hal/t264/t264_internal.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: MIT */
 /*
- * SPDX-FileCopyrightText: Copyright (c) 2023-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright (c) 2023-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -47,6 +47,8 @@
 #define T264_ACTIVE_IPS							\
 	DEFINE_SOC_HWPM_ACTIVE_IP(T264_HWPM_ACTIVE_IP_PMA)		\
 	DEFINE_SOC_HWPM_ACTIVE_IP(T264_HWPM_ACTIVE_IP_RTR)		\
+	DEFINE_SOC_HWPM_ACTIVE_IP(T264_HWPM_ACTIVE_IP_VI)		\
+	DEFINE_SOC_HWPM_ACTIVE_IP(T264_HWPM_ACTIVE_IP_ISP)		\
 	DEFINE_SOC_HWPM_ACTIVE_IP(T264_HWPM_ACTIVE_IP_VIC)		\
 	DEFINE_SOC_HWPM_ACTIVE_IP(T264_HWPM_ACTIVE_IP_PVA)		\
 	DEFINE_SOC_HWPM_ACTIVE_IP(T264_HWPM_ACTIVE_IP_MSS_CHANNEL)	\
@@ -57,8 +59,6 @@
 	DEFINE_SOC_HWPM_ACTIVE_IP(T264_HWPM_ACTIVE_IP_UCF_PSW)		\
 	DEFINE_SOC_HWPM_ACTIVE_IP(T264_HWPM_ACTIVE_IP_UCF_CSW)		\
 	DEFINE_SOC_HWPM_ACTIVE_IP(T264_HWPM_ACTIVE_IP_CPU)		\
-	DEFINE_SOC_HWPM_ACTIVE_IP(T264_HWPM_ACTIVE_IP_VI)		\
-	DEFINE_SOC_HWPM_ACTIVE_IP(T264_HWPM_ACTIVE_IP_ISP)		\
 	DEFINE_SOC_HWPM_ACTIVE_IP(T264_HWPM_ACTIVE_IP_MAX)
 
 enum t264_hwpm_active_ips {