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tegra: hwpm: move linux APIs in aperture to os
Perfmux/perfmon reserve and release functions use linux APIs to map/unmap mmio apertures. In an effort to make HWPM driver OS agnostic, add wrappers to reserve and release apertures. Jira THWPM-59 Change-Id: I2e8e820ae0b7c46f5656e8dfd2cf7ef370f168cc Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2738157 Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com> Reviewed-by: Vasuki Shankar <vasukis@nvidia.com> Reviewed-by: Seema Khowala <seemaj@nvidia.com> GVS: Gerrit_Virtual_Submit
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Vedashree Vidwans
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153
os/linux/aperture_utils.c
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153
os/linux/aperture_utils.c
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/*
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* Copyright (c) 2022, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#include <linux/slab.h>
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#include <linux/of_address.h>
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#include <tegra_hwpm_static_analysis.h>
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#include <tegra_hwpm_aperture.h>
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#include <tegra_hwpm_kmem.h>
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#include <tegra_hwpm_log.h>
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#include <tegra_hwpm_io.h>
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#include <tegra_hwpm.h>
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int tegra_hwpm_perfmon_reserve_impl(struct tegra_soc_hwpm *hwpm,
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struct hwpm_ip_inst *ip_inst, struct hwpm_ip_aperture *perfmon)
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{
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struct resource *res = NULL;
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tegra_hwpm_fn(hwpm, " ");
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/* Reserve */
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res = platform_get_resource_byname(hwpm->pdev,
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IORESOURCE_MEM, perfmon->name);
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if ((!res) || (res->start == 0) || (res->end == 0)) {
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tegra_hwpm_err(hwpm, "Failed to get perfmon %s", perfmon->name);
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return -ENOMEM;
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}
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perfmon->dt_mmio = devm_ioremap(hwpm->dev, res->start,
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resource_size(res));
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if (IS_ERR(perfmon->dt_mmio)) {
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tegra_hwpm_err(hwpm, "Couldn't map perfmon %s", perfmon->name);
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return PTR_ERR(perfmon->dt_mmio);
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}
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perfmon->start_pa = res->start;
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perfmon->end_pa = res->end;
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if (hwpm->fake_registers_enabled) {
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u64 address_range = tegra_hwpm_safe_add_u64(
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tegra_hwpm_safe_sub_u64(res->end, res->start), 1ULL);
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u64 num_regs = address_range / sizeof(u32);
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perfmon->fake_registers =
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tegra_hwpm_kcalloc(hwpm, num_regs, sizeof(u32));
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if (perfmon->fake_registers == NULL) {
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tegra_hwpm_err(hwpm, "Perfmon (0x%llx - 0x%llx) "
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"Couldn't allocate memory for fake regs",
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perfmon->start_abs_pa, perfmon->end_abs_pa);
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return -ENOMEM;
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}
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}
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return 0;
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}
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int tegra_hwpm_perfmux_reserve_impl(struct tegra_soc_hwpm *hwpm,
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struct hwpm_ip_inst *ip_inst, struct hwpm_ip_aperture *perfmux)
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{
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int ret = 0;
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u32 reg_val = 0U;
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tegra_hwpm_fn(hwpm, " ");
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perfmux->start_pa = perfmux->start_abs_pa;
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perfmux->end_pa = perfmux->end_abs_pa;
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/* Allocate fake registers */
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if (hwpm->fake_registers_enabled) {
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u64 address_range = tegra_hwpm_safe_add_u64(
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tegra_hwpm_safe_sub_u64(
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perfmux->end_pa, perfmux->start_pa), 1ULL);
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u64 num_regs = address_range / sizeof(u32);
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perfmux->fake_registers =
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tegra_hwpm_kcalloc(hwpm, num_regs, sizeof(u32));
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if (perfmux->fake_registers == NULL) {
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tegra_hwpm_err(hwpm, "Aperture(0x%llx - 0x%llx):"
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" Couldn't allocate memory for fake registers",
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perfmux->start_pa, perfmux->end_pa);
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return -ENOMEM;
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}
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}
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/* Validate perfmux availability by reading 1st alist offset */
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ret = tegra_hwpm_regops_readl(hwpm, ip_inst, perfmux,
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tegra_hwpm_safe_add_u64(perfmux->start_abs_pa,
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perfmux->alist[0U].reg_offset), ®_val);
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if (ret != 0) {
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/*
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* If an IP element is unavailable, perfmux register
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* read will return with failure.
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* Mark corresponding element as unavailable.
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* NOTE: This is possible if IP elements are floorswept.
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* Hence, failure should not be propagated.
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*/
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tegra_hwpm_dbg(hwpm, hwpm_dbg_reserve_resource,
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"perfmux start_abs_pa 0x%llx unavailable",
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perfmux->start_abs_pa);
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ip_inst->element_fs_mask &= ~(perfmux->element_index_mask);
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}
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return 0;
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}
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int tegra_hwpm_perfmon_release_impl(struct tegra_soc_hwpm *hwpm,
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struct hwpm_ip_aperture *perfmon)
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{
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tegra_hwpm_fn(hwpm, " ");
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if (perfmon->dt_mmio == NULL) {
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tegra_hwpm_err(hwpm, "Perfmon was not mapped");
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return -EINVAL;
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}
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devm_iounmap(hwpm->dev, perfmon->dt_mmio);
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perfmon->dt_mmio = NULL;
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perfmon->start_pa = 0ULL;
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perfmon->end_pa = 0ULL;
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if (perfmon->fake_registers) {
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tegra_hwpm_kfree(hwpm, perfmon->fake_registers);
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perfmon->fake_registers = NULL;
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}
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return 0;
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}
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int tegra_hwpm_perfmux_release_impl(struct tegra_soc_hwpm *hwpm,
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struct hwpm_ip_aperture *perfmux)
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{
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tegra_hwpm_fn(hwpm, " ");
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/*
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* Release
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* This is only required for fake registers
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*/
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if (perfmux->fake_registers) {
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tegra_hwpm_kfree(hwpm, perfmux->fake_registers);
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perfmux->fake_registers = NULL;
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}
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return 0;
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}
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