tegra: hwpm: Add support for next3 chip

- This patch adds the support for next3 chip in the hwpm kernel repo.
- Add NULL check for fake registers before read/write operations.
- On simulation platform, HWPM allocates memory to simulate perfmux and
perfmon address spaces. Update IP instance mask logic to assume perfmux
is available.

Jira THWPM-87
Jira THWPM-88

Change-Id: I6cdc882025d29268452c18b91873f4570f0d3462
Signed-off-by: vasukis <vasukis@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/2924799
Reviewed-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-by: Adeel Raza <araza@nvidia.com>
Tested-by: Vedashree Vidwans <vvidwans@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
vasukis
2023-06-13 18:17:14 +00:00
committed by mobile promotions
parent 034993b547
commit bbe13a4fa2
5 changed files with 59 additions and 6 deletions

View File

@@ -52,6 +52,11 @@ int tegra_hwpm_fake_readl_impl(struct tegra_soc_hwpm *hwpm,
return -ENODEV;
}
if (aperture->fake_registers == NULL) {
tegra_hwpm_err(hwpm, "Expected fake registers to be populated");
return -ENODEV;
}
*val = aperture->fake_registers[offset];
return 0;
}
@@ -64,6 +69,11 @@ int tegra_hwpm_fake_writel_impl(struct tegra_soc_hwpm *hwpm,
return -ENODEV;
}
if (aperture->fake_registers == NULL) {
tegra_hwpm_err(hwpm, "Expected fake registers to be populated");
return -ENODEV;
}
aperture->fake_registers[offset] = val;
return 0;
}