tegra: hwpm: Add support for next3 chip

- This patch adds the support for next3 chip in the hwpm kernel repo.
- Add NULL check for fake registers before read/write operations.
- On simulation platform, HWPM allocates memory to simulate perfmux and
perfmon address spaces. Update IP instance mask logic to assume perfmux
is available.

Jira THWPM-87
Jira THWPM-88

Change-Id: I6cdc882025d29268452c18b91873f4570f0d3462
Signed-off-by: vasukis <vasukis@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/2924799
Reviewed-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-by: Adeel Raza <araza@nvidia.com>
Tested-by: Vedashree Vidwans <vvidwans@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
vasukis
2023-06-13 18:17:14 +00:00
committed by mobile promotions
parent 034993b547
commit bbe13a4fa2
5 changed files with 59 additions and 6 deletions

View File

@@ -320,10 +320,24 @@ static int tegra_hwpm_func_single_element(struct tegra_soc_hwpm *hwpm,
} }
} }
/* Validate perfmux availability by reading 1st alist offset */ if (hwpm->fake_registers_enabled) {
ret = tegra_hwpm_regops_readl(hwpm, ip_inst, element, /*
tegra_hwpm_safe_add_u64(element->start_abs_pa, * In this case, HWPM will allocate memory to simulate
element->alist[0U].reg_offset), &reg_val); * IP perfmux address space. Hence, the perfmux will
* always be available.
* Indicate this by setting ret = 0.
*/
ret = 0;
} else {
/*
* Validate perfmux availability by reading 1st alist offset
*/
ret = tegra_hwpm_regops_readl(hwpm, ip_inst, element,
tegra_hwpm_safe_add_u64(element->start_abs_pa,
element->alist[0U].reg_offset),
&reg_val);
}
if (ret != 0) { if (ret != 0) {
/* /*
* If an IP element is unavailable, perfmux register * If an IP element is unavailable, perfmux register

View File

@@ -37,6 +37,9 @@
#ifdef CONFIG_TEGRA_NEXT2_HWPM #ifdef CONFIG_TEGRA_NEXT2_HWPM
#include <tegra_hwpm_next2_init.h> #include <tegra_hwpm_next2_init.h>
#endif #endif
#ifdef CONFIG_TEGRA_NEXT3_HWPM
#include <tegra_hwpm_next3_init.h>
#endif
static int tegra_hwpm_init_chip_ip_structures(struct tegra_soc_hwpm *hwpm, static int tegra_hwpm_init_chip_ip_structures(struct tegra_soc_hwpm *hwpm,
u32 chip_id, u32 chip_id_rev) u32 chip_id, u32 chip_id_rev)
@@ -63,10 +66,25 @@ static int tegra_hwpm_init_chip_ip_structures(struct tegra_soc_hwpm *hwpm,
} }
break; break;
default: default:
#ifdef CONFIG_TEGRA_NEXT2_HWPM #if defined(CONFIG_TEGRA_NEXT2_HWPM)
err = tegra_hwpm_next2_init_chip_ip_structures( err = tegra_hwpm_next2_init_chip_ip_structures(
hwpm, chip_id, chip_id_rev); hwpm, chip_id, chip_id_rev);
#else if (err == 0) {
/* Execution is for NEXT2 chip */
break;
}
#endif
#if defined(CONFIG_TEGRA_NEXT3_HWPM)
err = tegra_hwpm_next3_init_chip_ip_structures(
hwpm, chip_id, chip_id_rev);
if (err == 0) {
/* Execution is for NEXT3 chip */
break;
}
#endif
#if !defined(CONFIG_TEGRA_NEXT2_HWPM) && !defined(CONFIG_TEGRA_NEXT3_HWPM)
tegra_hwpm_err(hwpm, "Chip 0x%x not supported", chip_id); tegra_hwpm_err(hwpm, "Chip 0x%x not supported", chip_id);
#endif #endif
break; break;

View File

@@ -45,6 +45,9 @@ static const struct of_device_id tegra_soc_hwpm_of_match[] = {
#endif #endif
#ifdef CONFIG_TEGRA_NEXT2_HWPM #ifdef CONFIG_TEGRA_NEXT2_HWPM
#include <os/linux/next2_driver.h> #include <os/linux/next2_driver.h>
#endif
#ifdef CONFIG_TEGRA_NEXT3_HWPM
#include <os/linux/next3_driver.h>
#endif #endif
{ }, { },
}; };

View File

@@ -52,6 +52,11 @@ int tegra_hwpm_fake_readl_impl(struct tegra_soc_hwpm *hwpm,
return -ENODEV; return -ENODEV;
} }
if (aperture->fake_registers == NULL) {
tegra_hwpm_err(hwpm, "Expected fake registers to be populated");
return -ENODEV;
}
*val = aperture->fake_registers[offset]; *val = aperture->fake_registers[offset];
return 0; return 0;
} }
@@ -64,6 +69,11 @@ int tegra_hwpm_fake_writel_impl(struct tegra_soc_hwpm *hwpm,
return -ENODEV; return -ENODEV;
} }
if (aperture->fake_registers == NULL) {
tegra_hwpm_err(hwpm, "Expected fake registers to be populated");
return -ENODEV;
}
aperture->fake_registers[offset] = val; aperture->fake_registers[offset] = val;
return 0; return 0;
} }

View File

@@ -34,6 +34,9 @@
#if defined(CONFIG_TEGRA_NEXT2_HWPM) #if defined(CONFIG_TEGRA_NEXT2_HWPM)
#include <os/linux/next2_soc_utils.h> #include <os/linux/next2_soc_utils.h>
#endif #endif
#if defined(CONFIG_TEGRA_NEXT3_HWPM)
#include <os/linux/next3_soc_utils.h>
#endif
static struct hwpm_soc_chip_info chip_info = { static struct hwpm_soc_chip_info chip_info = {
.chip_id = CHIP_ID_UNKNOWN, .chip_id = CHIP_ID_UNKNOWN,
@@ -89,6 +92,11 @@ int tegra_hwpm_init_chip_info(struct tegra_hwpm_os_linux *hwpm_linux)
goto complete; goto complete;
} }
#endif #endif
#if defined(CONFIG_TEGRA_NEXT3_HWPM)
if (tegra_hwpm_next3_get_chip_compatible(&chip_info) == 0) {
goto complete;
}
#endif
return -ENODEV; return -ENODEV;
complete: complete: