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tegra: hwpm: expand debug log masks

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Add more debug masks to better manage debug prints.

Jira THWPM-41

Change-Id: Ibfa41f0aeb0e630e264a12d9e15df363eb4774dc
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2715619
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Vasuki Shankar <vasukis@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Vedashree Vidwans
2022-05-19 23:02:51 -07:00
committed by mobile promotions
parent 5518c6ea4c
commit bd8ca72dc2
11 changed files with 219 additions and 62 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
common/tegra_hwpm_alist_utils.c
View File

@@ -100,6 +100,9 @@ int tegra_hwpm_update_allowlist(struct tegra_soc_hwpm *hwpm,
alist_buf_size = tegra_hwpm_safe_mult_u64(hwpm->full_alist_size, alist_buf_size = tegra_hwpm_safe_mult_u64(hwpm->full_alist_size,
hwpm->active_chip->get_alist_buf_size(hwpm)); hwpm->active_chip->get_alist_buf_size(hwpm));
tegra_hwpm_dbg(hwpm, hwpm_info | hwpm_dbg_allowlist,
"alist_buf_size 0x%llx", alist_buf_size);
/* Memory map user buffer into kernel address space */ /* Memory map user buffer into kernel address space */
alist_buf_size = tegra_hwpm_safe_add_u64(offset, alist_buf_size); alist_buf_size = tegra_hwpm_safe_add_u64(offset, alist_buf_size);

85
common/tegra_hwpm_aperture_utils.c
View File

@@ -94,7 +94,14 @@ static int tegra_hwpm_perfmux_reserve(struct tegra_soc_hwpm *hwpm,
tegra_hwpm_safe_add_u64(perfmux->start_abs_pa, tegra_hwpm_safe_add_u64(perfmux->start_abs_pa,
perfmux->alist[0U].reg_offset), &reg_val); perfmux->alist[0U].reg_offset), &reg_val);
if (ret != 0) { if (ret != 0) {
tegra_hwpm_dbg(hwpm, hwpm_info, /*
* If an IP element is unavailable, perfmux register
* read will return with failure.
* Mark corresponding element as unavailable.
* NOTE: This is possible if IP elements are floorswept.
* Hence, failure should not be propagated.
*/
tegra_hwpm_dbg(hwpm, hwpm_dbg_reserve_resource,
"perfmux start_abs_pa 0x%llx unavailable", "perfmux start_abs_pa 0x%llx unavailable",
perfmux->start_abs_pa); perfmux->start_abs_pa);
@@ -244,7 +251,9 @@ static void tegra_hwpm_free_dynamic_inst_array(struct tegra_soc_hwpm *hwpm,
&chip_ip->inst_aperture_info[a_type]; &chip_ip->inst_aperture_info[a_type];
if (inst_a_info->inst_arr == NULL) { if (inst_a_info->inst_arr == NULL) {
/* No a_type elements in the IP */ tegra_hwpm_dbg(hwpm, hwpm_verbose,
"No a_type = %d elements in IP %d",
a_type, ip_idx);
continue; continue;
} }
@@ -263,7 +272,8 @@ static int tegra_hwpm_alloc_dynamic_inst_element_array(
tegra_hwpm_fn(hwpm, " "); tegra_hwpm_fn(hwpm, " ");
if (inst_a_info->range_start == 0ULL) { if (inst_a_info->range_start == 0ULL) {
/* No a_type elements in the IP */ tegra_hwpm_dbg(hwpm, hwpm_dbg_driver_init,
"No a_type = %d elements in IP", a_type);
return 0; return 0;
} }
@@ -276,8 +286,7 @@ static int tegra_hwpm_alloc_dynamic_inst_element_array(
inst_a_info->inst_arr = kcalloc(inst_a_info->inst_slots, inst_a_info->inst_arr = kcalloc(inst_a_info->inst_slots,
sizeof(struct hwpm_ip_inst *), GFP_KERNEL); sizeof(struct hwpm_ip_inst *), GFP_KERNEL);
if (inst_a_info->inst_arr == NULL) { if (inst_a_info->inst_arr == NULL) {
tegra_hwpm_err(hwpm, tegra_hwpm_err(hwpm, "a_type %d instance array alloc failed",
"a_type %d instance array alloc failed",
a_type); a_type);
return -ENOMEM; return -ENOMEM;
} }
@@ -340,7 +349,7 @@ static int tegra_hwpm_func_single_element(struct tegra_soc_hwpm *hwpm,
idx = tegra_hwpm_safe_cast_u64_to_u32( idx = tegra_hwpm_safe_cast_u64_to_u32(
element_offset / e_info->element_stride); element_offset / e_info->element_stride);
tegra_hwpm_dbg(hwpm, hwpm_info, tegra_hwpm_dbg(hwpm, hwpm_dbg_driver_init,
"IP %d inst %d a_type %d element type %d" "IP %d inst %d a_type %d element type %d"
" start_addr 0x%llx static idx %d == dynamic idx %d", " start_addr 0x%llx static idx %d == dynamic idx %d",
ip_idx, static_inst_idx, a_type, element->element_type, ip_idx, static_inst_idx, a_type, element->element_type,
@@ -352,6 +361,11 @@ static int tegra_hwpm_func_single_element(struct tegra_soc_hwpm *hwpm,
case TEGRA_HWPM_GET_ALIST_SIZE: case TEGRA_HWPM_GET_ALIST_SIZE:
if ((element->element_index_mask & if ((element->element_index_mask &
ip_inst->element_fs_mask) == 0U) { ip_inst->element_fs_mask) == 0U) {
tegra_hwpm_dbg(hwpm, hwpm_dbg_allowlist,
"IP %d inst %d a_type %d element type %d"
" start_addr 0x%llx not reserved",
ip_idx, static_inst_idx, a_type,
element->element_type, element->start_abs_pa);
return 0; return 0;
} }
if (element->alist) { if (element->alist) {
@@ -366,6 +380,11 @@ static int tegra_hwpm_func_single_element(struct tegra_soc_hwpm *hwpm,
case TEGRA_HWPM_COMBINE_ALIST: case TEGRA_HWPM_COMBINE_ALIST:
if ((element->element_index_mask & if ((element->element_index_mask &
ip_inst->element_fs_mask) == 0U) { ip_inst->element_fs_mask) == 0U) {
tegra_hwpm_dbg(hwpm, hwpm_dbg_allowlist,
"IP %d inst %d a_type %d element type %d"
" start_addr 0x%llx not reserved",
ip_idx, static_inst_idx, a_type,
element->element_type, element->start_abs_pa);
return 0; return 0;
} }
err = hwpm->active_chip->copy_alist(hwpm, err = hwpm->active_chip->copy_alist(hwpm,
@@ -381,6 +400,11 @@ static int tegra_hwpm_func_single_element(struct tegra_soc_hwpm *hwpm,
case TEGRA_HWPM_RESERVE_GIVEN_RESOURCE: case TEGRA_HWPM_RESERVE_GIVEN_RESOURCE:
if ((element->element_index_mask & if ((element->element_index_mask &
ip_inst->element_fs_mask) == 0U) { ip_inst->element_fs_mask) == 0U) {
tegra_hwpm_dbg(hwpm, hwpm_dbg_reserve_resource,
"IP %d inst %d a_type %d element type %d"
" start_addr 0x%llx not reservable",
ip_idx, static_inst_idx, a_type,
element->element_type, element->start_abs_pa);
return 0; return 0;
} }
err = tegra_hwpm_element_reserve(hwpm, ip_inst, element); err = tegra_hwpm_element_reserve(hwpm, ip_inst, element);
@@ -395,6 +419,11 @@ static int tegra_hwpm_func_single_element(struct tegra_soc_hwpm *hwpm,
case TEGRA_HWPM_RELEASE_ROUTER: case TEGRA_HWPM_RELEASE_ROUTER:
if ((element->element_index_mask & if ((element->element_index_mask &
ip_inst->element_fs_mask) == 0U) { ip_inst->element_fs_mask) == 0U) {
tegra_hwpm_dbg(hwpm, hwpm_dbg_release_resource,
"IP %d inst %d a_type %d element type %d"
" start_addr 0x%llx not reserved",
ip_idx, static_inst_idx, a_type,
element->element_type, element->start_abs_pa);
return 0; return 0;
} }
ret = tegra_hwpm_element_release(hwpm, element); ret = tegra_hwpm_element_release(hwpm, element);
@@ -407,6 +436,11 @@ static int tegra_hwpm_func_single_element(struct tegra_soc_hwpm *hwpm,
case TEGRA_HWPM_BIND_RESOURCES: case TEGRA_HWPM_BIND_RESOURCES:
if ((element->element_index_mask & if ((element->element_index_mask &
ip_inst->element_fs_mask) == 0U) { ip_inst->element_fs_mask) == 0U) {
tegra_hwpm_dbg(hwpm, hwpm_dbg_bind,
"IP %d inst %d a_type %d element type %d"
" start_addr 0x%llx not reserved",
ip_idx, static_inst_idx, a_type,
element->element_type, element->start_abs_pa);
return 0; return 0;
} }
err = hwpm->active_chip->zero_alist_regs( err = hwpm->active_chip->zero_alist_regs(
@@ -430,6 +464,11 @@ static int tegra_hwpm_func_single_element(struct tegra_soc_hwpm *hwpm,
case TEGRA_HWPM_RELEASE_IP_STRUCTURES: case TEGRA_HWPM_RELEASE_IP_STRUCTURES:
if ((element->element_index_mask & if ((element->element_index_mask &
ip_inst->element_fs_mask) == 0U) { ip_inst->element_fs_mask) == 0U) {
tegra_hwpm_dbg(hwpm, hwpm_dbg_driver_release,
"IP %d inst %d a_type %d element type %d"
" start_addr 0x%llx not reserved",
ip_idx, static_inst_idx, a_type,
element->element_type, element->start_abs_pa);
return 0; return 0;
} }
break; break;
@@ -461,6 +500,9 @@ static int tegra_hwpm_func_all_elements_of_type(struct tegra_soc_hwpm *hwpm,
if (iia_func == TEGRA_HWPM_INIT_IP_STRUCTURES) { if (iia_func == TEGRA_HWPM_INIT_IP_STRUCTURES) {
if (e_info->num_element_per_inst == 0U) { if (e_info->num_element_per_inst == 0U) {
/* no a_type elements in this IP */ /* no a_type elements in this IP */
tegra_hwpm_dbg(hwpm, hwpm_dbg_driver_init,
"No a_type = %d elements in IP %d",
a_type, ip_idx);
return 0; return 0;
} }
@@ -556,7 +598,9 @@ static int tegra_hwpm_func_single_inst(struct tegra_soc_hwpm *hwpm,
e_info = &ip_inst->element_info[a_type]; e_info = &ip_inst->element_info[a_type];
if (inst_a_info->range_start == 0ULL) { if (inst_a_info->range_start == 0ULL) {
/* No a_type elements in the IP */ tegra_hwpm_dbg(hwpm, hwpm_dbg_driver_init,
"No a_type = %d elements in IP %d",
a_type, ip_idx);
continue; continue;
} }
@@ -568,7 +612,8 @@ static int tegra_hwpm_func_single_inst(struct tegra_soc_hwpm *hwpm,
idx = tegra_hwpm_safe_cast_u64_to_u32( idx = tegra_hwpm_safe_cast_u64_to_u32(
inst_offset / inst_a_info->inst_stride); inst_offset / inst_a_info->inst_stride);
tegra_hwpm_dbg(hwpm, hwpm_info, "IP %d a_type %d " tegra_hwpm_dbg(hwpm, hwpm_dbg_driver_init,
"IP %d a_type %d "
" static inst idx %d == dynamic idx %d", " static inst idx %d == dynamic idx %d",
ip_idx, a_type, static_inst_idx, idx); ip_idx, a_type, static_inst_idx, idx);
@@ -654,7 +699,7 @@ fail:
ip_idx, chip_ip, idx); ip_idx, chip_ip, idx);
if (ret != 0) { if (ret != 0) {
tegra_hwpm_err(hwpm, tegra_hwpm_err(hwpm,
"IP %d inst %d func 0x%x failed", "IP %d inst %ld func 0x%x failed",
ip_idx, idx, ip_idx, idx,
TEGRA_HWPM_RELEASE_RESOURCES); TEGRA_HWPM_RELEASE_RESOURCES);
} }
@@ -685,25 +730,28 @@ int tegra_hwpm_func_single_ip(struct tegra_soc_hwpm *hwpm,
case TEGRA_HWPM_BIND_RESOURCES: case TEGRA_HWPM_BIND_RESOURCES:
/* Skip unavailable IPs */ /* Skip unavailable IPs */
if (!chip_ip->reserved) { if (!chip_ip->reserved) {
tegra_hwpm_dbg(hwpm, hwpm_dbg_allowlist | hwpm_dbg_bind,
"Chip IP %d not reserved", ip_idx);
return 0; return 0;
} }
if (chip_ip->inst_fs_mask == 0U) { if (chip_ip->inst_fs_mask == 0U) {
/* No IP instance is available */ tegra_hwpm_dbg(hwpm, hwpm_dbg_allowlist | hwpm_dbg_bind,
"Chip IP %d not available", ip_idx);
return 0; return 0;
} }
break; break;
case TEGRA_HWPM_RESERVE_GIVEN_RESOURCE: case TEGRA_HWPM_RESERVE_GIVEN_RESOURCE:
/* Skip IPs which are already reserved */ /* Skip IPs which are already reserved */
if (chip_ip->reserved) { if (chip_ip->reserved) {
tegra_hwpm_dbg(hwpm, hwpm_info, tegra_hwpm_dbg(hwpm, hwpm_dbg_reserve_resource,
"Chip IP %d already reserved", ip_idx); "Chip IP %d already reserved", ip_idx);
return 0; return 0;
} }
/* Make sure IP override is not enabled */ /* Make sure IP override is not enabled */
if (chip_ip->override_enable) { if (chip_ip->override_enable) {
tegra_hwpm_dbg(hwpm, hwpm_info, tegra_hwpm_dbg(hwpm, hwpm_dbg_reserve_resource,
"Chip IP %d not available", ip_idx); "Chip IP %d not available", ip_idx);
return 0; return 0;
} }
@@ -711,32 +759,43 @@ int tegra_hwpm_func_single_ip(struct tegra_soc_hwpm *hwpm,
if (chip_ip->resource_status == if (chip_ip->resource_status ==
TEGRA_HWPM_RESOURCE_STATUS_INVALID) { TEGRA_HWPM_RESOURCE_STATUS_INVALID) {
/* No IP instance is available to reserve */ /* No IP instance is available to reserve */
tegra_hwpm_dbg(hwpm, hwpm_dbg_reserve_resource,
"Chip IP %d not available", ip_idx);
return -EINVAL; return -EINVAL;
} }
break; break;
case TEGRA_HWPM_RELEASE_RESOURCES: case TEGRA_HWPM_RELEASE_RESOURCES:
/* RTR will be released later */
if (ip_idx == active_chip->get_rtr_int_idx(hwpm)) { if (ip_idx == active_chip->get_rtr_int_idx(hwpm)) {
tegra_hwpm_dbg(hwpm, hwpm_dbg_release_resource,
"Router will be released later");
return 0; return 0;
} }
/* Skip unavailable IPs */ /* Skip unavailable IPs */
if (!chip_ip->reserved) { if (!chip_ip->reserved) {
tegra_hwpm_dbg(hwpm, hwpm_dbg_release_resource,
"Chip IP %d not reserved", ip_idx);
return 0; return 0;
} }
if (chip_ip->inst_fs_mask == 0U) { if (chip_ip->inst_fs_mask == 0U) {
/* No IP instance is available to release */ /* No IP instance is available to release */
tegra_hwpm_dbg(hwpm, hwpm_dbg_release_resource,
"Chip IP %d not available", ip_idx);
return 0; return 0;
} }
break; break;
case TEGRA_HWPM_RELEASE_ROUTER: case TEGRA_HWPM_RELEASE_ROUTER:
/* Skip unavailable IPs */ /* Skip unavailable IPs */
if (!chip_ip->reserved) { if (!chip_ip->reserved) {
tegra_hwpm_dbg(hwpm, hwpm_dbg_release_resource,
"Router not reserved");
return 0; return 0;
} }
if (chip_ip->inst_fs_mask == 0U) { if (chip_ip->inst_fs_mask == 0U) {
/* No IP instance is available to release */ /* No IP instance is available to release */
tegra_hwpm_dbg(hwpm, hwpm_dbg_release_resource,
"Router not available");
return 0; return 0;
} }
break; break;

54
common/tegra_hwpm_ip_utils.c
View File

@@ -38,7 +38,7 @@ int tegra_hwpm_get_floorsweep_info(struct tegra_soc_hwpm *hwpm,
tegra_hwpm_err(hwpm, "Failed to get fs_info"); tegra_hwpm_err(hwpm, "Failed to get fs_info");
} }
tegra_hwpm_dbg(hwpm, hwpm_verbose, tegra_hwpm_dbg(hwpm, hwpm_info | hwpm_dbg_floorsweep_info,
"Query %d: ip %d: ip_status: %d inst_mask 0x%llx", "Query %d: ip %d: ip_status: %d inst_mask 0x%llx",
i, fs_info->ip_fsinfo[i].ip, i, fs_info->ip_fsinfo[i].ip,
fs_info->ip_fsinfo[i].status, fs_info->ip_fsinfo[i].status,
@@ -64,7 +64,7 @@ int tegra_hwpm_get_resource_info(struct tegra_soc_hwpm *hwpm,
tegra_hwpm_err(hwpm, "Failed to get rsrc_info"); tegra_hwpm_err(hwpm, "Failed to get rsrc_info");
} }
tegra_hwpm_dbg(hwpm, hwpm_verbose, tegra_hwpm_dbg(hwpm, hwpm_info | hwpm_dbg_resource_info,
"Query %d: resource %d: status: %d", "Query %d: resource %d: status: %d",
i, rsrc_info->resource_info[i].resource, i, rsrc_info->resource_info[i].resource,
rsrc_info->resource_info[i].status); rsrc_info->resource_info[i].status);
@@ -92,7 +92,8 @@ int tegra_hwpm_ip_handle_power_mgmt(struct tegra_soc_hwpm *hwpm,
disable == true ? "disable" : "enable"); disable == true ? "disable" : "enable");
} }
} else { } else {
tegra_hwpm_dbg(hwpm, hwpm_verbose, "Runtime PM not configured"); tegra_hwpm_dbg(hwpm, hwpm_dbg_reserve_resource,
"Runtime PM not configured");
} }
return err; return err;
@@ -204,7 +205,7 @@ int tegra_hwpm_set_fs_info_ip_ops(struct tegra_soc_hwpm *hwpm,
return -EINVAL; return -EINVAL;
} }
tegra_hwpm_dbg(hwpm, hwpm_verbose, tegra_hwpm_dbg(hwpm, hwpm_dbg_ip_register,
"Found addr 0x%llx IP %d inst_idx %d element_idx %d e_type %d", "Found addr 0x%llx IP %d inst_idx %d element_idx %d e_type %d",
base_address, idx, inst_idx, element_idx, element_type); base_address, idx, inst_idx, element_idx, element_type);
@@ -257,12 +258,12 @@ static int tegra_hwpm_complete_ip_register(struct tegra_soc_hwpm *hwpm)
tegra_hwpm_fn(hwpm, " "); tegra_hwpm_fn(hwpm, " ");
while (node != NULL) { while (node != NULL) {
tegra_hwpm_dbg(hwpm, hwpm_info, "IP ext idx %d info",
node->ip_ops.resource_enum);
ret = hwpm->active_chip->extract_ip_ops( ret = hwpm->active_chip->extract_ip_ops(
hwpm, &node->ip_ops, true); hwpm, &node->ip_ops, true);
if (ret != 0) { if (ret != 0) {
tegra_hwpm_err(hwpm, "Failed to extract IP ops"); tegra_hwpm_err(hwpm,
"Resource enum %d extract IP ops failed",
node->ip_ops.resource_enum);
return ret; return ret;
} }
node = node->next; node = node->next;
@@ -318,7 +319,8 @@ static bool tegra_hwpm_addr_in_single_element(struct tegra_soc_hwpm *hwpm,
struct hwpm_ip_aperture *element = e_info->element_arr[*element_idx]; struct hwpm_ip_aperture *element = e_info->element_arr[*element_idx];
if (element == NULL) { if (element == NULL) {
tegra_hwpm_dbg(hwpm, hwpm_info, "IP %d addr 0x%llx inst_idx %d " tegra_hwpm_dbg(hwpm, hwpm_verbose,
"IP %d addr 0x%llx inst_idx %d "
"a_type %d: element_idx %d not populated", "a_type %d: element_idx %d not populated",
*ip_idx, find_addr, *inst_idx, a_type, *element_idx); *ip_idx, find_addr, *inst_idx, a_type, *element_idx);
return false; return false;
@@ -328,7 +330,7 @@ static bool tegra_hwpm_addr_in_single_element(struct tegra_soc_hwpm *hwpm,
/* Make sure this instance is available */ /* Make sure this instance is available */
if ((element->element_index_mask & if ((element->element_index_mask &
ip_inst->element_fs_mask) == 0U) { ip_inst->element_fs_mask) == 0U) {
tegra_hwpm_dbg(hwpm, hwpm_info, tegra_hwpm_dbg(hwpm, hwpm_dbg_regops,
"IP %d addr 0x%llx inst_idx %d " "IP %d addr 0x%llx inst_idx %d "
"a_type %d: element_idx %d: not available", "a_type %d: element_idx %d: not available",
*ip_idx, find_addr, *inst_idx, a_type, *ip_idx, find_addr, *inst_idx, a_type,
@@ -351,7 +353,7 @@ static bool tegra_hwpm_addr_in_single_element(struct tegra_soc_hwpm *hwpm,
return true; return true;
} }
tegra_hwpm_dbg(hwpm, hwpm_verbose, tegra_hwpm_dbg(hwpm, hwpm_dbg_regops,
"IP %d addr 0x%llx inst_idx %d " "IP %d addr 0x%llx inst_idx %d "
"a_type %d element_idx %d address not in alist", "a_type %d element_idx %d address not in alist",
*ip_idx, find_addr, *inst_idx, a_type, *ip_idx, find_addr, *inst_idx, a_type,
@@ -362,7 +364,7 @@ static bool tegra_hwpm_addr_in_single_element(struct tegra_soc_hwpm *hwpm,
if (iia_func == TEGRA_HWPM_MATCH_BASE_ADDRESS) { if (iia_func == TEGRA_HWPM_MATCH_BASE_ADDRESS) {
/* Confirm that given addr is base address of this element */ /* Confirm that given addr is base address of this element */
if (find_addr != element->start_abs_pa) { if (find_addr != element->start_abs_pa) {
tegra_hwpm_dbg(hwpm, hwpm_info, tegra_hwpm_dbg(hwpm, hwpm_dbg_ip_register,
"IP %d addr 0x%llx inst_idx %d " "IP %d addr 0x%llx inst_idx %d "
"a_type %d element_idx %d: addr != start addr", "a_type %d element_idx %d: addr != start addr",
*ip_idx, find_addr, *inst_idx, a_type, *ip_idx, find_addr, *inst_idx, a_type,
@@ -393,7 +395,7 @@ static bool tegra_hwpm_addr_in_all_elements(struct tegra_soc_hwpm *hwpm,
/* Make sure address falls in elements of a_type */ /* Make sure address falls in elements of a_type */
if (e_info->num_element_per_inst == 0U) { if (e_info->num_element_per_inst == 0U) {
tegra_hwpm_dbg(hwpm, hwpm_info, tegra_hwpm_dbg(hwpm, hwpm_verbose,
"IP %d addr 0x%llx: inst_idx %d no type %d elements", "IP %d addr 0x%llx: inst_idx %d no type %d elements",
*ip_idx, find_addr, *inst_idx, a_type); *ip_idx, find_addr, *inst_idx, a_type);
return false; return false;
@@ -402,6 +404,9 @@ static bool tegra_hwpm_addr_in_all_elements(struct tegra_soc_hwpm *hwpm,
if ((find_addr < e_info->range_start) || if ((find_addr < e_info->range_start) ||
(find_addr > e_info->range_end)) { (find_addr > e_info->range_end)) {
/* Address not in this instance corresponding to a_type */ /* Address not in this instance corresponding to a_type */
tegra_hwpm_dbg(hwpm, hwpm_verbose, "IP %d inst_idx %d: "
"addr 0x%llx not in type %d elements",
*ip_idx, find_addr, *inst_idx, a_type);
return false; return false;
} }
@@ -440,7 +445,7 @@ static bool tegra_hwpm_addr_in_single_instance(struct tegra_soc_hwpm *hwpm,
tegra_hwpm_fn(hwpm, " "); tegra_hwpm_fn(hwpm, " ");
if (ip_inst == NULL) { if (ip_inst == NULL) {
tegra_hwpm_dbg(hwpm, hwpm_info, "IP %d addr 0x%llx: " tegra_hwpm_dbg(hwpm, hwpm_verbose, "IP %d addr 0x%llx: "
"a_type %d inst_idx %d not populated", "a_type %d inst_idx %d not populated",
*ip_idx, find_addr, a_type, *inst_idx); *ip_idx, find_addr, a_type, *inst_idx);
return false; return false;
@@ -449,7 +454,8 @@ static bool tegra_hwpm_addr_in_single_instance(struct tegra_soc_hwpm *hwpm,
if (iia_func == TEGRA_HWPM_FIND_GIVEN_ADDRESS) { if (iia_func == TEGRA_HWPM_FIND_GIVEN_ADDRESS) {
/* Make sure this instance is available */ /* Make sure this instance is available */
if ((chip_ip->inst_fs_mask & ip_inst->hw_inst_mask) == 0U) { if ((chip_ip->inst_fs_mask & ip_inst->hw_inst_mask) == 0U) {
tegra_hwpm_dbg(hwpm, hwpm_info, "IP %d addr 0x%llx: " tegra_hwpm_dbg(hwpm, hwpm_dbg_regops,
"IP %d addr 0x%llx: "
"a_type %d inst_idx %d not available", "a_type %d inst_idx %d not available",
*ip_idx, find_addr, a_type, *inst_idx); *ip_idx, find_addr, a_type, *inst_idx);
return false; return false;
@@ -516,7 +522,7 @@ static bool tegra_hwpm_addr_in_single_ip(struct tegra_soc_hwpm *hwpm,
if (chip_ip->override_enable) { if (chip_ip->override_enable) {
/* This IP should not be configured for HWPM */ /* This IP should not be configured for HWPM */
tegra_hwpm_dbg(hwpm, hwpm_info, "IP %d override enabled", tegra_hwpm_dbg(hwpm, hwpm_verbose, "IP %d override enabled",
*ip_idx); *ip_idx);
return false; return false;
} }
@@ -524,15 +530,16 @@ static bool tegra_hwpm_addr_in_single_ip(struct tegra_soc_hwpm *hwpm,
if (iia_func == TEGRA_HWPM_FIND_GIVEN_ADDRESS) { if (iia_func == TEGRA_HWPM_FIND_GIVEN_ADDRESS) {
/* Make sure this instance is available */ /* Make sure this instance is available */
if (!chip_ip->reserved) { if (!chip_ip->reserved) {
tegra_hwpm_dbg(hwpm, hwpm_info, "IP %d not reserved", tegra_hwpm_dbg(hwpm, hwpm_dbg_regops,
*ip_idx); "IP %d not reserved", *ip_idx);
return false; return false;
} }
} }
if (chip_ip->num_instances == 0U) { if (chip_ip->num_instances == 0U) {
/* No instances in this IP */ /* No instances in this IP */
tegra_hwpm_dbg(hwpm, hwpm_info, "IP %d no instances", *ip_idx); tegra_hwpm_dbg(hwpm, hwpm_verbose,
"IP %d no instances", *ip_idx);
return false; return false;
} }
@@ -544,6 +551,9 @@ static bool tegra_hwpm_addr_in_single_ip(struct tegra_soc_hwpm *hwpm,
if ((find_addr < inst_a_info->range_start) || if ((find_addr < inst_a_info->range_start) ||
(find_addr > inst_a_info->range_end)) { (find_addr > inst_a_info->range_end)) {
/* Address not in this IP for this a_type */ /* Address not in this IP for this a_type */
tegra_hwpm_dbg(hwpm, hwpm_verbose,
"IP %d addr 0x%llx not in a_type %d elements",
*ip_idx, find_addr, a_type);
continue; continue;
} }
@@ -586,6 +596,8 @@ static bool tegra_hwpm_addr_in_all_ip(struct tegra_soc_hwpm *hwpm,
} }
if (!chip_ip->reserved) { if (!chip_ip->reserved) {
tegra_hwpm_dbg(hwpm, hwpm_verbose,
"IP %d not reserved", *ip_idx);
continue; continue;
} }
@@ -620,7 +632,8 @@ bool tegra_hwpm_aperture_for_address(struct tegra_soc_hwpm *hwpm,
found = tegra_hwpm_addr_in_all_ip(hwpm, iia_func, find_addr, found = tegra_hwpm_addr_in_all_ip(hwpm, iia_func, find_addr,
ip_idx, inst_idx, element_idx, element_type); ip_idx, inst_idx, element_idx, element_type);
if (!found) { if (!found) {
tegra_hwpm_err(hwpm, "Address not in any IP"); tegra_hwpm_err(hwpm,
"Address 0x%llx not in any IP", find_addr);
return found; return found;
} }
} }
@@ -629,7 +642,8 @@ bool tegra_hwpm_aperture_for_address(struct tegra_soc_hwpm *hwpm,
found = tegra_hwpm_addr_in_single_ip(hwpm, iia_func, find_addr, found = tegra_hwpm_addr_in_single_ip(hwpm, iia_func, find_addr,
ip_idx, inst_idx, element_idx, element_type); ip_idx, inst_idx, element_idx, element_type);
if (!found) { if (!found) {
tegra_hwpm_err(hwpm, "Address not in IP %d", *ip_idx); tegra_hwpm_err(hwpm, "Address 0x%llx not in IP %d",
find_addr, *ip_idx);
return found; return found;
} }
} }

9
common/tegra_hwpm_mem_buf_utils.c
View File

@@ -158,8 +158,9 @@ int tegra_hwpm_map_stream_buffer(struct tegra_soc_hwpm *hwpm,
ret = -ENXIO; ret = -ENXIO;
goto fail; goto fail;
} }
tegra_hwpm_dbg(hwpm, hwpm_verbose, "stream_buf_pma_va = 0x%llx", tegra_hwpm_dbg(hwpm, hwpm_dbg_alloc_pma_stream,
alloc_pma_stream->stream_buf_pma_va); "stream_buf_pma_va = 0x%llx",
alloc_pma_stream->stream_buf_pma_va);
/* Memory map mem bytes buffer */ /* Memory map mem bytes buffer */
ret = tegra_hwpm_dma_map_mem_bytes_buffer(hwpm, alloc_pma_stream); ret = tegra_hwpm_dma_map_mem_bytes_buffer(hwpm, alloc_pma_stream);
@@ -284,7 +285,7 @@ int tegra_hwpm_update_mem_bytes(struct tegra_soc_hwpm *hwpm,
if (update_get_put->b_read_mem_head) { if (update_get_put->b_read_mem_head) {
update_get_put->mem_head = update_get_put->mem_head =
hwpm->active_chip->get_mem_bytes_put_ptr(hwpm); hwpm->active_chip->get_mem_bytes_put_ptr(hwpm);
tegra_hwpm_dbg(hwpm, hwpm_verbose, tegra_hwpm_dbg(hwpm, hwpm_dbg_update_get_put,
"MEM_HEAD = 0x%llx", update_get_put->mem_head); "MEM_HEAD = 0x%llx", update_get_put->mem_head);
} }
@@ -292,7 +293,7 @@ int tegra_hwpm_update_mem_bytes(struct tegra_soc_hwpm *hwpm,
if (update_get_put->b_check_overflow) { if (update_get_put->b_check_overflow) {
update_get_put->b_overflowed = update_get_put->b_overflowed =
(u8) hwpm->active_chip->membuf_overflow_status(hwpm); (u8) hwpm->active_chip->membuf_overflow_status(hwpm);
tegra_hwpm_dbg(hwpm, hwpm_verbose, "OVERFLOWED = %u", tegra_hwpm_dbg(hwpm, hwpm_dbg_update_get_put, "OVERFLOWED = %u",
update_get_put->b_overflowed); update_get_put->b_overflowed);
} }

6
common/tegra_hwpm_regops_utils.c
View File

@@ -47,14 +47,14 @@ static int tegra_hwpm_exec_reg_ops(struct tegra_soc_hwpm *hwpm,
&ip_idx, &inst_idx, &element_idx, &element_type); &ip_idx, &inst_idx, &element_idx, &element_type);
if (!found) { if (!found) {
/* Silent failure as regops can continue on error */ /* Silent failure as regops can continue on error */
tegra_hwpm_dbg(hwpm, hwpm_verbose, tegra_hwpm_dbg(hwpm, hwpm_dbg_regops,
"Phys addr 0x%llx not available in any IP", "Phys addr 0x%llx not available in any IP",
reg_op->phys_addr); reg_op->phys_addr);
reg_op->status = TEGRA_SOC_HWPM_REG_OP_STATUS_INVALID_ADDR; reg_op->status = TEGRA_SOC_HWPM_REG_OP_STATUS_INVALID_ADDR;
return -EINVAL; return -EINVAL;
} }
tegra_hwpm_dbg(hwpm, hwpm_verbose, tegra_hwpm_dbg(hwpm, hwpm_dbg_regops,
"Found addr 0x%llx IP %d inst_idx %d element_idx %d e_type %d", "Found addr 0x%llx IP %d inst_idx %d element_idx %d e_type %d",
reg_op->phys_addr, ip_idx, inst_idx, element_idx, element_type); reg_op->phys_addr, ip_idx, inst_idx, element_idx, element_type);
@@ -210,7 +210,7 @@ int tegra_hwpm_exec_regops(struct tegra_soc_hwpm *hwpm,
for (op_idx = 0; op_idx < exec_reg_ops->op_count; op_idx++) { for (op_idx = 0; op_idx < exec_reg_ops->op_count; op_idx++) {
reg_op = &(exec_reg_ops->ops[op_idx]); reg_op = &(exec_reg_ops->ops[op_idx]);
tegra_hwpm_dbg(hwpm, hwpm_verbose, tegra_hwpm_dbg(hwpm, hwpm_dbg_regops,
"reg op: idx(%d), phys(0x%llx), cmd(%u)", "reg op: idx(%d), phys(0x%llx), cmd(%u)",
op_idx, reg_op->phys_addr, reg_op->cmd); op_idx, reg_op->phys_addr, reg_op->cmd);

24
hal/t234/t234_hwpm_ip_utils.c
View File

@@ -35,6 +35,10 @@ int t234_hwpm_extract_ip_ops(struct tegra_soc_hwpm *hwpm,
tegra_hwpm_fn(hwpm, " "); tegra_hwpm_fn(hwpm, " ");
tegra_hwpm_dbg(hwpm, hwpm_dbg_ip_register,
"Extract IP ops for resource enum %d info",
hwpm_ip_ops->resource_enum);
/* Convert tegra_soc_hwpm_resource to internal enum */ /* Convert tegra_soc_hwpm_resource to internal enum */
if (!(t234_hwpm_is_resource_active(hwpm, if (!(t234_hwpm_is_resource_active(hwpm,
hwpm_ip_ops->resource_enum, &ip_idx))) { hwpm_ip_ops->resource_enum, &ip_idx))) {
@@ -226,13 +230,15 @@ int t234_hwpm_validate_current_config(struct tegra_soc_hwpm *hwpm)
return err; return err;
} }
tegra_hwpm_dbg(hwpm, hwpm_info, "PROD_MODE fuse = 0x%x "
"SECURITY_MODE fuse = 0x%x HWPM_GLOBAL_DISABLE = 0x%x",
production_mode, security_mode, hwpm_global_disable);
/* Override enable depends on security mode and global hwpm disable */ /* Override enable depends on security mode and global hwpm disable */
if ((security_mode == 0U) && if ((security_mode == 0U) &&
(hwpm_global_disable == TEGRA_HWPM_GLOBAL_DISABLE_DISABLED)) { (hwpm_global_disable == TEGRA_HWPM_GLOBAL_DISABLE_DISABLED)) {
tegra_hwpm_dbg(hwpm, hwpm_info, "PROD_MODE fuse = 0x%x " tegra_hwpm_dbg(hwpm, hwpm_info,
"SECURITY_MODE fuse = 0x%x HWPM_GLOBAL_DISABLE = 0x%x," "security fuses are disabled, no override required");
" no override required",
production_mode, security_mode, hwpm_global_disable);
return 0; return 0;
} }
@@ -255,8 +261,12 @@ int t234_hwpm_validate_current_config(struct tegra_soc_hwpm *hwpm)
/* IP depends on security mode fuse */ /* IP depends on security mode fuse */
chip_ip->override_enable = true; chip_ip->override_enable = true;
} else { } else {
tegra_hwpm_err(hwpm, /*
"Execution shouldn't reach here"); * This is a valid case since not all IPs
* depend on security fuse.
*/
tegra_hwpm_dbg(hwpm, hwpm_info,
"IP %d not overridden", idx);
} }
} }
} }
@@ -483,7 +493,7 @@ int t234_hwpm_get_fs_info(struct tegra_soc_hwpm *hwpm,
} }
} }
tegra_hwpm_dbg(hwpm, hwpm_info, tegra_hwpm_dbg(hwpm, hwpm_dbg_floorsweep_info,
"SOC hwpm IP %d is unavailable", ip_enum); "SOC hwpm IP %d is unavailable", ip_enum);
*ip_status = TEGRA_SOC_HWPM_IP_STATUS_INVALID; *ip_status = TEGRA_SOC_HWPM_IP_STATUS_INVALID;

6
hal/t234/t234_hwpm_resource_utils.c
View File

@@ -34,7 +34,8 @@ int t234_hwpm_perfmon_enable(struct tegra_soc_hwpm *hwpm,
tegra_hwpm_fn(hwpm, " "); tegra_hwpm_fn(hwpm, " ");
/* Enable */ /* Enable */
tegra_hwpm_dbg(hwpm, hwpm_verbose, "Enabling PERFMON(0x%llx - 0x%llx)", tegra_hwpm_dbg(hwpm, hwpm_dbg_bind,
"Enabling PERFMON(0x%llx - 0x%llx)",
perfmon->start_abs_pa, perfmon->end_abs_pa); perfmon->start_abs_pa, perfmon->end_abs_pa);
err = tegra_hwpm_readl(hwpm, perfmon, err = tegra_hwpm_readl(hwpm, perfmon,
@@ -80,7 +81,8 @@ int t234_hwpm_perfmon_disable(struct tegra_soc_hwpm *hwpm,
} }
/* Disable */ /* Disable */
tegra_hwpm_dbg(hwpm, hwpm_verbose, "Disabling PERFMON(0x%llx - 0x%llx)", tegra_hwpm_dbg(hwpm, hwpm_dbg_release_resource,
"Disabling PERFMON(0x%llx - 0x%llx)",
perfmon->start_abs_pa, perfmon->end_abs_pa); perfmon->start_abs_pa, perfmon->end_abs_pa);
err = tegra_hwpm_readl(hwpm, perfmon, pmmsys_control_r(0), &reg_val); err = tegra_hwpm_readl(hwpm, perfmon, pmmsys_control_r(0), &reg_val);

35
include/tegra_hwpm_log.h
View File

@@ -24,10 +24,41 @@ enum tegra_soc_hwpm_log_type {
}; };
#define TEGRA_HWPM_DEFAULT_DBG_MASK (0) #define TEGRA_HWPM_DEFAULT_DBG_MASK (0)
#define hwpm_fn BIT(0) /* Primary info prints */
#define hwpm_info BIT(1) #define hwpm_info BIT(0)
/* Trace function execution */
#define hwpm_fn BIT(1)
/* Log register accesses */
#define hwpm_register BIT(2) #define hwpm_register BIT(2)
/* General verbose prints */
#define hwpm_verbose BIT(3) #define hwpm_verbose BIT(3)
/* Driver init specific verbose prints */
#define hwpm_dbg_driver_init BIT(4)
/* IP register specific verbose prints */
#define hwpm_dbg_ip_register BIT(5)
/* Device info specific verbose prints */
#define hwpm_dbg_device_info BIT(6)
/* Floorsweep info specific verbose prints */
#define hwpm_dbg_floorsweep_info BIT(7)
/* Resource info specific verbose prints */
#define hwpm_dbg_resource_info BIT(8)
/* Reserve resource specific verbose prints */
#define hwpm_dbg_reserve_resource BIT(9)
/* Release resource specific verbose prints */
#define hwpm_dbg_release_resource BIT(10)
/* Alloc PMA stream specific verbose prints */
#define hwpm_dbg_alloc_pma_stream BIT(11)
/* Bind operation specific verbose prints */
#define hwpm_dbg_bind BIT(12)
/* Allowlist specific verbose prints */
#define hwpm_dbg_allowlist BIT(13)
/* Regops specific verbose prints */
#define hwpm_dbg_regops BIT(14)
/* Get Put pointer specific verbose prints */
#define hwpm_dbg_update_get_put BIT(15)
/* Driver release specific verbose prints */
#define hwpm_dbg_driver_release BIT(16)
#define tegra_hwpm_err(hwpm, fmt, arg...) \ #define tegra_hwpm_err(hwpm, fmt, arg...) \
tegra_hwpm_err_impl(hwpm, __func__, __LINE__, fmt, ##arg) tegra_hwpm_err_impl(hwpm, __func__, __LINE__, fmt, ##arg)

8
os/linux/tegra_hwpm_io.c
View File

@@ -232,6 +232,8 @@ static int hwpm_writel(struct tegra_soc_hwpm *hwpm,
int tegra_hwpm_readl(struct tegra_soc_hwpm *hwpm, int tegra_hwpm_readl(struct tegra_soc_hwpm *hwpm,
struct hwpm_ip_aperture *aperture, u64 addr, u32 *val) struct hwpm_ip_aperture *aperture, u64 addr, u32 *val)
{ {
tegra_hwpm_fn(hwpm, " ");
if (!aperture) { if (!aperture) {
tegra_hwpm_err(hwpm, "aperture is NULL"); tegra_hwpm_err(hwpm, "aperture is NULL");
return -ENODEV; return -ENODEV;
@@ -257,6 +259,8 @@ int tegra_hwpm_readl(struct tegra_soc_hwpm *hwpm,
int tegra_hwpm_writel(struct tegra_soc_hwpm *hwpm, int tegra_hwpm_writel(struct tegra_soc_hwpm *hwpm,
struct hwpm_ip_aperture *aperture, u64 addr, u32 val) struct hwpm_ip_aperture *aperture, u64 addr, u32 val)
{ {
tegra_hwpm_fn(hwpm, " ");
if (!aperture) { if (!aperture) {
tegra_hwpm_err(hwpm, "aperture is NULL"); tegra_hwpm_err(hwpm, "aperture is NULL");
return -ENODEV; return -ENODEV;
@@ -286,6 +290,8 @@ int tegra_hwpm_regops_readl(struct tegra_soc_hwpm *hwpm,
u64 reg_offset = 0ULL; u64 reg_offset = 0ULL;
int err = 0; int err = 0;
tegra_hwpm_fn(hwpm, " ");
if (!aperture) { if (!aperture) {
tegra_hwpm_err(hwpm, "aperture is NULL"); tegra_hwpm_err(hwpm, "aperture is NULL");
return -ENODEV; return -ENODEV;
@@ -313,6 +319,8 @@ int tegra_hwpm_regops_writel(struct tegra_soc_hwpm *hwpm,
u64 reg_offset = 0ULL; u64 reg_offset = 0ULL;
int err = 0; int err = 0;
tegra_hwpm_fn(hwpm, " ");
if (!aperture) { if (!aperture) {
tegra_hwpm_err(hwpm, "aperture is NULL"); tegra_hwpm_err(hwpm, "aperture is NULL");
return -ENODEV; return -ENODEV;

41
os/linux/tegra_hwpm_ioctl.c
View File

@@ -109,19 +109,22 @@ static int device_info_ioctl(struct tegra_soc_hwpm *hwpm,
void *ioctl_struct) void *ioctl_struct)
{ {
struct tegra_soc_hwpm_device_info *device_info = struct tegra_soc_hwpm_device_info *device_info =
(struct tegra_soc_hwpm_device_info *)ioctl_struct; (struct tegra_soc_hwpm_device_info *)ioctl_struct;
tegra_hwpm_fn(hwpm, " ");
device_info->chip = hwpm->device_info.chip; device_info->chip = hwpm->device_info.chip;
device_info->chip_revision = hwpm->device_info.chip_revision; device_info->chip_revision = hwpm->device_info.chip_revision;
device_info->revision = hwpm->device_info.revision; device_info->revision = hwpm->device_info.revision;
device_info->platform = hwpm->device_info.platform; device_info->platform = hwpm->device_info.platform;
tegra_hwpm_dbg(hwpm, hwpm_verbose, "chip id 0x%x", device_info->chip); tegra_hwpm_dbg(hwpm, hwpm_info | hwpm_dbg_device_info,
tegra_hwpm_dbg(hwpm, hwpm_verbose, "chip id 0x%x", device_info->chip);
tegra_hwpm_dbg(hwpm, hwpm_info | hwpm_dbg_device_info,
"chip_revision 0x%x", device_info->chip_revision); "chip_revision 0x%x", device_info->chip_revision);
tegra_hwpm_dbg(hwpm, hwpm_verbose, tegra_hwpm_dbg(hwpm, hwpm_info | hwpm_dbg_device_info,
"revision 0x%x", device_info->revision); "revision 0x%x", device_info->revision);
tegra_hwpm_dbg(hwpm, hwpm_verbose, tegra_hwpm_dbg(hwpm, hwpm_info | hwpm_dbg_device_info,
"platform 0x%x", device_info->platform); "platform 0x%x", device_info->platform);
return 0; return 0;
@@ -133,6 +136,8 @@ static int floorsweep_info_ioctl(struct tegra_soc_hwpm *hwpm,
struct tegra_soc_hwpm_ip_floorsweep_info *fs_info = struct tegra_soc_hwpm_ip_floorsweep_info *fs_info =
(struct tegra_soc_hwpm_ip_floorsweep_info *)ioctl_struct; (struct tegra_soc_hwpm_ip_floorsweep_info *)ioctl_struct;
tegra_hwpm_fn(hwpm, " ");
if (fs_info->num_queries > TEGRA_SOC_HWPM_IP_QUERIES_MAX) { if (fs_info->num_queries > TEGRA_SOC_HWPM_IP_QUERIES_MAX) {
tegra_hwpm_err(hwpm, "Number of queries exceed max limit of %u", tegra_hwpm_err(hwpm, "Number of queries exceed max limit of %u",
TEGRA_SOC_HWPM_IP_QUERIES_MAX); TEGRA_SOC_HWPM_IP_QUERIES_MAX);
@@ -146,7 +151,9 @@ static int resource_info_ioctl(struct tegra_soc_hwpm *hwpm,
void *ioctl_struct) void *ioctl_struct)
{ {
struct tegra_soc_hwpm_resource_info *rsrc_info = struct tegra_soc_hwpm_resource_info *rsrc_info =
(struct tegra_soc_hwpm_resource_info *)ioctl_struct; (struct tegra_soc_hwpm_resource_info *)ioctl_struct;
tegra_hwpm_fn(hwpm, " ");
if (rsrc_info->num_queries > TEGRA_SOC_HWPM_RESOURCE_QUERIES_MAX) { if (rsrc_info->num_queries > TEGRA_SOC_HWPM_RESOURCE_QUERIES_MAX) {
tegra_hwpm_err(hwpm, "Number of queries exceed max limit of %u", tegra_hwpm_err(hwpm, "Number of queries exceed max limit of %u",
@@ -166,6 +173,8 @@ static int reserve_resource_ioctl(struct tegra_soc_hwpm *hwpm,
u32 resource = reserve_resource->resource; u32 resource = reserve_resource->resource;
int ret = 0; int ret = 0;
tegra_hwpm_fn(hwpm, " ");
if (hwpm->bind_completed) { if (hwpm->bind_completed) {
tegra_hwpm_err(hwpm, "The RESERVE_RESOURCE IOCTL can only be" tegra_hwpm_err(hwpm, "The RESERVE_RESOURCE IOCTL can only be"
" called before the BIND IOCTL."); " called before the BIND IOCTL.");
@@ -193,6 +202,8 @@ static int alloc_pma_stream_ioctl(struct tegra_soc_hwpm *hwpm,
(struct tegra_soc_hwpm_alloc_pma_stream *)ioctl_struct; (struct tegra_soc_hwpm_alloc_pma_stream *)ioctl_struct;
int ret = 0; int ret = 0;
tegra_hwpm_fn(hwpm, " ");
if (hwpm->bind_completed) { if (hwpm->bind_completed) {
tegra_hwpm_err(hwpm, "The ALLOC_PMA_STREAM IOCTL can only be" tegra_hwpm_err(hwpm, "The ALLOC_PMA_STREAM IOCTL can only be"
" called before the BIND IOCTL."); " called before the BIND IOCTL.");
@@ -225,6 +236,8 @@ static int bind_ioctl(struct tegra_soc_hwpm *hwpm,
{ {
int ret = 0; int ret = 0;
tegra_hwpm_fn(hwpm, " ");
ret = tegra_hwpm_bind_resources(hwpm); ret = tegra_hwpm_bind_resources(hwpm);
if (ret != 0) { if (ret != 0) {
tegra_hwpm_err(hwpm, "Failed to bind resources"); tegra_hwpm_err(hwpm, "Failed to bind resources");
@@ -240,7 +253,9 @@ static int query_allowlist_ioctl(struct tegra_soc_hwpm *hwpm,
{ {
int ret = 0; int ret = 0;
struct tegra_soc_hwpm_query_allowlist *query_allowlist = struct tegra_soc_hwpm_query_allowlist *query_allowlist =
(struct tegra_soc_hwpm_query_allowlist *)ioctl_struct; (struct tegra_soc_hwpm_query_allowlist *)ioctl_struct;
tegra_hwpm_fn(hwpm, " ");
if (!hwpm->bind_completed) { if (!hwpm->bind_completed) {
tegra_hwpm_err(hwpm, tegra_hwpm_err(hwpm,
@@ -275,6 +290,8 @@ static int query_allowlist_ioctl(struct tegra_soc_hwpm *hwpm,
static int exec_reg_ops_ioctl(struct tegra_soc_hwpm *hwpm, static int exec_reg_ops_ioctl(struct tegra_soc_hwpm *hwpm,
void *ioctl_struct) void *ioctl_struct)
{ {
tegra_hwpm_fn(hwpm, " ");
if (!hwpm->bind_completed) { if (!hwpm->bind_completed) {
tegra_hwpm_err(hwpm, "The EXEC_REG_OPS IOCTL can only be called" tegra_hwpm_err(hwpm, "The EXEC_REG_OPS IOCTL can only be called"
" after the BIND IOCTL."); " after the BIND IOCTL.");
@@ -289,7 +306,9 @@ static int update_get_put_ioctl(struct tegra_soc_hwpm *hwpm,
void *ioctl_struct) void *ioctl_struct)
{ {
struct tegra_soc_hwpm_update_get_put *update_get_put = struct tegra_soc_hwpm_update_get_put *update_get_put =
(struct tegra_soc_hwpm_update_get_put *)ioctl_struct; (struct tegra_soc_hwpm_update_get_put *)ioctl_struct;
tegra_hwpm_fn(hwpm, " ");
if (!hwpm->bind_completed) { if (!hwpm->bind_completed) {
tegra_hwpm_err(hwpm, tegra_hwpm_err(hwpm,
@@ -344,6 +363,8 @@ static long tegra_hwpm_ioctl(struct file *file,
goto fail; goto fail;
} }
tegra_hwpm_fn(hwpm, " ");
if (!hwpm->device_opened) { if (!hwpm->device_opened) {
tegra_hwpm_err(hwpm, "Device open failed, can't process IOCTL"); tegra_hwpm_err(hwpm, "Device open failed, can't process IOCTL");
ret = -ENODEV; ret = -ENODEV;
@@ -433,6 +454,8 @@ static int tegra_hwpm_open(struct inode *inode, struct file *filp)
} }
filp->private_data = hwpm; filp->private_data = hwpm;
tegra_hwpm_fn(hwpm, " ");
/* Initialize driver on first open call only */ /* Initialize driver on first open call only */
if (!atomic_add_unless(&hwpm->hwpm_in_use, 1U, 1U)) { if (!atomic_add_unless(&hwpm->hwpm_in_use, 1U, 1U)) {
return -EAGAIN; return -EAGAIN;
@@ -535,6 +558,8 @@ static int tegra_hwpm_release(struct inode *inode, struct file *filp)
return -EINVAL; return -EINVAL;
} }
tegra_hwpm_fn(hwpm, " ");
/* De-init driver on last close call only */ /* De-init driver on last close call only */
if (!atomic_dec_and_test(&hwpm->hwpm_in_use)) { if (!atomic_dec_and_test(&hwpm->hwpm_in_use)) {
return 0; return 0;

10
os/linux/tegra_hwpm_ip.c
View File

@@ -90,6 +90,9 @@ void tegra_soc_hwpm_ip_register(struct tegra_soc_hwpm_ip_ops *hwpm_ip_ops)
} }
if (tegra_soc_hwpm_pdev == NULL) { if (tegra_soc_hwpm_pdev == NULL) {
tegra_hwpm_dbg(hwpm, hwpm_info | hwpm_dbg_ip_register,
"Noting IP 0x%llx register request",
hwpm_ip_ops->ip_base_address);
ret = tegra_hwpm_note_ip_register(hwpm_ip_ops); ret = tegra_hwpm_note_ip_register(hwpm_ip_ops);
if (ret != 0) { if (ret != 0) {
tegra_hwpm_err(NULL, tegra_hwpm_err(NULL,
@@ -103,7 +106,7 @@ void tegra_soc_hwpm_ip_register(struct tegra_soc_hwpm_ip_ops *hwpm_ip_ops)
} }
hwpm = platform_get_drvdata(tegra_soc_hwpm_pdev); hwpm = platform_get_drvdata(tegra_soc_hwpm_pdev);
tegra_hwpm_dbg(hwpm, hwpm_info, tegra_hwpm_dbg(hwpm, hwpm_info | hwpm_dbg_ip_register,
"Register IP 0x%llx", hwpm_ip_ops->ip_base_address); "Register IP 0x%llx", hwpm_ip_ops->ip_base_address);
ret = hwpm->active_chip->extract_ip_ops(hwpm, ret = hwpm->active_chip->extract_ip_ops(hwpm,
@@ -126,7 +129,8 @@ void tegra_soc_hwpm_ip_unregister(struct tegra_soc_hwpm_ip_ops *hwpm_ip_ops)
} }
if (tegra_soc_hwpm_pdev == NULL) { if (tegra_soc_hwpm_pdev == NULL) {
tegra_hwpm_dbg(hwpm, hwpm_info, "HWPM device not available"); tegra_hwpm_dbg(hwpm, hwpm_info | hwpm_dbg_ip_register,
"HWPM device not available");
} else { } else {
if (hwpm_ip_ops->ip_dev == NULL) { if (hwpm_ip_ops->ip_dev == NULL) {
tegra_hwpm_err(hwpm, "IP dev to unregister is NULL"); tegra_hwpm_err(hwpm, "IP dev to unregister is NULL");
@@ -134,7 +138,7 @@ void tegra_soc_hwpm_ip_unregister(struct tegra_soc_hwpm_ip_ops *hwpm_ip_ops)
} }
hwpm = platform_get_drvdata(tegra_soc_hwpm_pdev); hwpm = platform_get_drvdata(tegra_soc_hwpm_pdev);
tegra_hwpm_dbg(hwpm, hwpm_info, tegra_hwpm_dbg(hwpm, hwpm_info | hwpm_dbg_ip_register,
"Unregister IP 0x%llx", hwpm_ip_ops->ip_base_address); "Unregister IP 0x%llx", hwpm_ip_ops->ip_base_address);
ret = hwpm->active_chip->extract_ip_ops(hwpm, ret = hwpm->active_chip->extract_ip_ops(hwpm,