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tegra: hwpm: Add dev_name details for NVDLA
- NVDLA exposes a debug node for HWPM on QNX to send Read/Write register Operation requests. This can be accessed via the 'dev_name' property. - Set fd to 1, to indicate that NVDLA has debug node enabled. Bug 3945000 Change-Id: I8a4859fbafa204c8f8e18292fbd224c4897a85be Signed-off-by: vasukis <vasukis@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/2908524 Reviewed-by: Vedashree Vidwans <vvidwans@nvidia.com> Reviewed-by: Seema Khowala <seemaj@nvidia.com> GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
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@@ -166,11 +166,11 @@ static struct hwpm_ip_inst t234_nvdla_inst_static_array[
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.ip_dev = NULL,
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.hwpm_ip_pm = NULL,
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.hwpm_ip_reg_op = NULL,
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.fd = -1,
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.fd = 1,
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},
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.element_fs_mask = 0U,
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.dev_name = "",
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.dev_name = "/dev/nvdladebugfs/nvdla0/hwpm/ctrl",
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},
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{
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.hw_inst_mask = BIT(1),
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@@ -229,11 +229,11 @@ static struct hwpm_ip_inst t234_nvdla_inst_static_array[
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.ip_dev = NULL,
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.hwpm_ip_pm = NULL,
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.hwpm_ip_reg_op = NULL,
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.fd = -1,
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.fd = 1,
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},
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.element_fs_mask = 0U,
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.dev_name = "",
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.dev_name = "/dev/nvdladebugfs/nvdla1/hwpm/ctrl",
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},
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};
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@@ -152,9 +152,9 @@ struct tegra_hwpm_ip_ops {
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u32 inst_element_index, u64 reg_offset,
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u32 *reg_data);
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/*
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* fd - is used to store the
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* file descriptor of the IP devctl node
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* in QNX
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* fd - is used to store the file descriptor of the IP devctl node in QNX.
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* Default is -1, which indicates the IP has no debug node enabled for Reg ops.
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* Set to 1 if IP has debug node enabled for Reg ops.
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*/
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int fd;
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};
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