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tegra: hwpm: replace dt_index with element_index

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Currently, dt_index aperture spec actually holds the element index of
the aperture within the IP instance. Hence, replace dt_index with
element_index to better indicate its purpose.

JIRA THWPM-71

Change-Id: Ic805da3281c60991e7966a80f442d84a2cfcf7cc
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/2797447
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
This commit is contained in:
Vedashree Vidwans
2022-10-20 09:38:16 -07:00
committed by mobile promotions
parent afe35d034f
commit da9a29418a
20 changed files with 129 additions and 129 deletions
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4
drivers/tegra/hwpm/hal/t234/ip/display/t234_display.c
View File

@@ -22,7 +22,7 @@ static struct hwpm_ip_aperture t234_display_inst0_perfmon_element_static_array[
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = "perfmon_nvdisplay0",
.start_abs_pa = addr_map_rpg_pm_disp_base_r(),
@@ -41,7 +41,7 @@ static struct hwpm_ip_aperture t234_display_inst0_perfmux_element_static_array[
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_disp_base_r(),

4
drivers/tegra/hwpm/hal/t234/ip/isp/t234_isp.c
View File

@@ -22,7 +22,7 @@ static struct hwpm_ip_aperture t234_isp_inst0_perfmon_element_static_array[
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = "perfmon_isp0",
.start_abs_pa = addr_map_rpg_pm_isp0_base_r(),
@@ -41,7 +41,7 @@ static struct hwpm_ip_aperture t234_isp_inst0_perfmux_element_static_array[
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_isp_thi_base_r(),

16
drivers/tegra/hwpm/hal/t234/ip/mgbe/t234_mgbe.c
View File

@@ -22,7 +22,7 @@ static struct hwpm_ip_aperture t234_mgbe_inst0_perfmon_element_static_array[
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = "perfmon_mgbe0",
.start_abs_pa = addr_map_rpg_pm_mgbe0_base_r(),
@@ -41,7 +41,7 @@ static struct hwpm_ip_aperture t234_mgbe_inst1_perfmon_element_static_array[
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = "perfmon_mgbe1",
.start_abs_pa = addr_map_rpg_pm_mgbe1_base_r(),
@@ -60,7 +60,7 @@ static struct hwpm_ip_aperture t234_mgbe_inst2_perfmon_element_static_array[
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = "perfmon_mgbe2",
.start_abs_pa = addr_map_rpg_pm_mgbe2_base_r(),
@@ -79,7 +79,7 @@ static struct hwpm_ip_aperture t234_mgbe_inst3_perfmon_element_static_array[
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = "perfmon_mgbe3",
.start_abs_pa = addr_map_rpg_pm_mgbe3_base_r(),
@@ -98,7 +98,7 @@ static struct hwpm_ip_aperture t234_mgbe_inst0_perfmux_element_static_array[
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_mgbe0_mac_rm_base_r(),
@@ -117,7 +117,7 @@ static struct hwpm_ip_aperture t234_mgbe_inst1_perfmux_element_static_array[
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_mgbe1_mac_rm_base_r(),
@@ -136,7 +136,7 @@ static struct hwpm_ip_aperture t234_mgbe_inst2_perfmux_element_static_array[
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_mgbe2_mac_rm_base_r(),
@@ -155,7 +155,7 @@ static struct hwpm_ip_aperture t234_mgbe_inst3_perfmux_element_static_array[
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_mgbe3_mac_rm_base_r(),

66
drivers/tegra/hwpm/hal/t234/ip/mss_channel/t234_mss_channel.c
View File

@@ -22,7 +22,7 @@ static struct hwpm_ip_aperture t234_mss_channel_inst0_perfmon_element_static_arr
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(0),
.dt_index = 1U,
.element_index = 1U,
.dt_mmio = NULL,
.name = "perfmon_msschannel_parta0",
.start_abs_pa = addr_map_rpg_pm_mss0_base_r(),
@@ -37,7 +37,7 @@ static struct hwpm_ip_aperture t234_mss_channel_inst0_perfmon_element_static_arr
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(1),
.dt_index = 2U,
.element_index = 2U,
.dt_mmio = NULL,
.name = "perfmon_msschannel_parta1",
.start_abs_pa = addr_map_rpg_pm_mss1_base_r(),
@@ -52,7 +52,7 @@ static struct hwpm_ip_aperture t234_mss_channel_inst0_perfmon_element_static_arr
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(2),
.dt_index = 3U,
.element_index = 3U,
.dt_mmio = NULL,
.name = "perfmon_msschannel_parta2",
.start_abs_pa = addr_map_rpg_pm_mss2_base_r(),
@@ -67,7 +67,7 @@ static struct hwpm_ip_aperture t234_mss_channel_inst0_perfmon_element_static_arr
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(3),
.dt_index = 4U,
.element_index = 4U,
.dt_mmio = NULL,
.name = "perfmon_msschannel_parta3",
.start_abs_pa = addr_map_rpg_pm_mss3_base_r(),
@@ -82,7 +82,7 @@ static struct hwpm_ip_aperture t234_mss_channel_inst0_perfmon_element_static_arr
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(4),
.dt_index = 5U,
.element_index = 5U,
.dt_mmio = NULL,
.name = "perfmon_msschannel_partb0",
.start_abs_pa = addr_map_rpg_pm_mss4_base_r(),
@@ -97,7 +97,7 @@ static struct hwpm_ip_aperture t234_mss_channel_inst0_perfmon_element_static_arr
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(5),
.dt_index = 6U,
.element_index = 6U,
.dt_mmio = NULL,
.name = "perfmon_msschannel_partb1",
.start_abs_pa = addr_map_rpg_pm_mss5_base_r(),
@@ -112,7 +112,7 @@ static struct hwpm_ip_aperture t234_mss_channel_inst0_perfmon_element_static_arr
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(6),
.dt_index = 7U,
.element_index = 7U,
.dt_mmio = NULL,
.name = "perfmon_msschannel_partb2",
.start_abs_pa = addr_map_rpg_pm_mss6_base_r(),
@@ -127,7 +127,7 @@ static struct hwpm_ip_aperture t234_mss_channel_inst0_perfmon_element_static_arr
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(7),
.dt_index = 8U,
.element_index = 8U,
.dt_mmio = NULL,
.name = "perfmon_msschannel_partb3",
.start_abs_pa = addr_map_rpg_pm_mss7_base_r(),
@@ -142,7 +142,7 @@ static struct hwpm_ip_aperture t234_mss_channel_inst0_perfmon_element_static_arr
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(8),
.dt_index = 9U,
.element_index = 9U,
.dt_mmio = NULL,
.name = "perfmon_msschannel_partc0",
.start_abs_pa = addr_map_rpg_pm_mss8_base_r(),
@@ -157,7 +157,7 @@ static struct hwpm_ip_aperture t234_mss_channel_inst0_perfmon_element_static_arr
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(9),
.dt_index = 10U,
.element_index = 10U,
.dt_mmio = NULL,
.name = "perfmon_msschannel_partc1",
.start_abs_pa = addr_map_rpg_pm_mss9_base_r(),
@@ -172,7 +172,7 @@ static struct hwpm_ip_aperture t234_mss_channel_inst0_perfmon_element_static_arr
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(10),
.dt_index = 11U,
.element_index = 11U,
.dt_mmio = NULL,
.name = "perfmon_msschannel_partc2",
.start_abs_pa = addr_map_rpg_pm_mss10_base_r(),
@@ -187,7 +187,7 @@ static struct hwpm_ip_aperture t234_mss_channel_inst0_perfmon_element_static_arr
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(11),
.dt_index = 12U,
.element_index = 12U,
.dt_mmio = NULL,
.name = "perfmon_msschannel_partc3",
.start_abs_pa = addr_map_rpg_pm_mss11_base_r(),
@@ -202,7 +202,7 @@ static struct hwpm_ip_aperture t234_mss_channel_inst0_perfmon_element_static_arr
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(12),
.dt_index = 13U,
.element_index = 13U,
.dt_mmio = NULL,
.name = "perfmon_msschannel_partd0",
.start_abs_pa = addr_map_rpg_pm_mss12_base_r(),
@@ -217,7 +217,7 @@ static struct hwpm_ip_aperture t234_mss_channel_inst0_perfmon_element_static_arr
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(13),
.dt_index = 14U,
.element_index = 14U,
.dt_mmio = NULL,
.name = "perfmon_msschannel_partd1",
.start_abs_pa = addr_map_rpg_pm_mss13_base_r(),
@@ -232,7 +232,7 @@ static struct hwpm_ip_aperture t234_mss_channel_inst0_perfmon_element_static_arr
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(14),
.dt_index = 15U,
.element_index = 15U,
.dt_mmio = NULL,
.name = "perfmon_msschannel_partd2",
.start_abs_pa = addr_map_rpg_pm_mss14_base_r(),
@@ -247,7 +247,7 @@ static struct hwpm_ip_aperture t234_mss_channel_inst0_perfmon_element_static_arr
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(15),
.dt_index = 16U,
.element_index = 16U,
.dt_mmio = NULL,
.name = "perfmon_msschannel_partd3",
.start_abs_pa = addr_map_rpg_pm_mss15_base_r(),
@@ -266,7 +266,7 @@ static struct hwpm_ip_aperture t234_mss_channel_inst0_perfmux_element_static_arr
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(0),
.dt_index = 1U,
.element_index = 1U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_mc0_base_r(),
@@ -281,7 +281,7 @@ static struct hwpm_ip_aperture t234_mss_channel_inst0_perfmux_element_static_arr
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(1),
.dt_index = 2U,
.element_index = 2U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_mc1_base_r(),
@@ -296,7 +296,7 @@ static struct hwpm_ip_aperture t234_mss_channel_inst0_perfmux_element_static_arr
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(2),
.dt_index = 3U,
.element_index = 3U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_mc2_base_r(),
@@ -311,7 +311,7 @@ static struct hwpm_ip_aperture t234_mss_channel_inst0_perfmux_element_static_arr
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(3),
.dt_index = 4U,
.element_index = 4U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_mc3_base_r(),
@@ -326,7 +326,7 @@ static struct hwpm_ip_aperture t234_mss_channel_inst0_perfmux_element_static_arr
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(4),
.dt_index = 5U,
.element_index = 5U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_mc4_base_r(),
@@ -341,7 +341,7 @@ static struct hwpm_ip_aperture t234_mss_channel_inst0_perfmux_element_static_arr
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(5),
.dt_index = 6U,
.element_index = 6U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_mc5_base_r(),
@@ -356,7 +356,7 @@ static struct hwpm_ip_aperture t234_mss_channel_inst0_perfmux_element_static_arr
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(6),
.dt_index = 7U,
.element_index = 7U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_mc6_base_r(),
@@ -371,7 +371,7 @@ static struct hwpm_ip_aperture t234_mss_channel_inst0_perfmux_element_static_arr
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(7),
.dt_index = 8U,
.element_index = 8U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_mc7_base_r(),
@@ -386,7 +386,7 @@ static struct hwpm_ip_aperture t234_mss_channel_inst0_perfmux_element_static_arr
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(8),
.dt_index = 9U,
.element_index = 9U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_mc8_base_r(),
@@ -401,7 +401,7 @@ static struct hwpm_ip_aperture t234_mss_channel_inst0_perfmux_element_static_arr
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(9),
.dt_index = 10U,
.element_index = 10U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_mc9_base_r(),
@@ -416,7 +416,7 @@ static struct hwpm_ip_aperture t234_mss_channel_inst0_perfmux_element_static_arr
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(10),
.dt_index = 11U,
.element_index = 11U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_mc10_base_r(),
@@ -431,7 +431,7 @@ static struct hwpm_ip_aperture t234_mss_channel_inst0_perfmux_element_static_arr
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(11),
.dt_index = 12U,
.element_index = 12U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_mc11_base_r(),
@@ -446,7 +446,7 @@ static struct hwpm_ip_aperture t234_mss_channel_inst0_perfmux_element_static_arr
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(12),
.dt_index = 13U,
.element_index = 13U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_mc12_base_r(),
@@ -461,7 +461,7 @@ static struct hwpm_ip_aperture t234_mss_channel_inst0_perfmux_element_static_arr
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(13),
.dt_index = 14U,
.element_index = 14U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_mc13_base_r(),
@@ -476,7 +476,7 @@ static struct hwpm_ip_aperture t234_mss_channel_inst0_perfmux_element_static_arr
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(14),
.dt_index = 15U,
.element_index = 15U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_mc14_base_r(),
@@ -491,7 +491,7 @@ static struct hwpm_ip_aperture t234_mss_channel_inst0_perfmux_element_static_arr
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(15),
.dt_index = 16U,
.element_index = 16U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_mc15_base_r(),
@@ -510,7 +510,7 @@ static struct hwpm_ip_aperture t234_mss_channel_inst0_broadcast_element_static_a
{
.element_type = IP_ELEMENT_BROADCAST,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_mcb_base_r(),

18
drivers/tegra/hwpm/hal/t234/ip/mss_gpu_hub/t234_mss_gpu_hub.c
View File

@@ -22,7 +22,7 @@ static struct hwpm_ip_aperture t234_mss_gpu_hub_inst0_perfmon_element_static_arr
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = "perfmon_mssnvlhsh0",
.start_abs_pa = addr_map_rpg_pm_mssnvl_base_r(),
@@ -41,7 +41,7 @@ static struct hwpm_ip_aperture t234_mss_gpu_hub_inst0_perfmux_element_static_arr
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(0),
.dt_index = 1U,
.element_index = 1U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_mss_nvlink_1_base_r(),
@@ -56,7 +56,7 @@ static struct hwpm_ip_aperture t234_mss_gpu_hub_inst0_perfmux_element_static_arr
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(1),
.dt_index = 2U,
.element_index = 2U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_mss_nvlink_2_base_r(),
@@ -71,7 +71,7 @@ static struct hwpm_ip_aperture t234_mss_gpu_hub_inst0_perfmux_element_static_arr
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(2),
.dt_index = 3U,
.element_index = 3U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_mss_nvlink_3_base_r(),
@@ -86,7 +86,7 @@ static struct hwpm_ip_aperture t234_mss_gpu_hub_inst0_perfmux_element_static_arr
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(3),
.dt_index = 4U,
.element_index = 4U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_mss_nvlink_4_base_r(),
@@ -101,7 +101,7 @@ static struct hwpm_ip_aperture t234_mss_gpu_hub_inst0_perfmux_element_static_arr
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(4),
.dt_index = 5U,
.element_index = 5U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_mss_nvlink_5_base_r(),
@@ -116,7 +116,7 @@ static struct hwpm_ip_aperture t234_mss_gpu_hub_inst0_perfmux_element_static_arr
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(5),
.dt_index = 6U,
.element_index = 6U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_mss_nvlink_6_base_r(),
@@ -131,7 +131,7 @@ static struct hwpm_ip_aperture t234_mss_gpu_hub_inst0_perfmux_element_static_arr
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(6),
.dt_index = 7U,
.element_index = 7U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_mss_nvlink_7_base_r(),
@@ -146,7 +146,7 @@ static struct hwpm_ip_aperture t234_mss_gpu_hub_inst0_perfmux_element_static_arr
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(7),
.dt_index = 8U,
.element_index = 8U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_mss_nvlink_8_base_r(),

24
drivers/tegra/hwpm/hal/t234/ip/mss_iso_niso_hubs/t234_mss_iso_niso_hubs.c
View File

@@ -22,7 +22,7 @@ static struct hwpm_ip_aperture t234_mss_iso_niso_hub_inst0_perfmon_element_stati
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = "perfmon_msshub0",
.start_abs_pa = addr_map_rpg_pm_msshub0_base_r(),
@@ -37,7 +37,7 @@ static struct hwpm_ip_aperture t234_mss_iso_niso_hub_inst0_perfmon_element_stati
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(0),
.dt_index = 1U,
.element_index = 1U,
.dt_mmio = NULL,
.name = "perfmon_msshub1",
.start_abs_pa = addr_map_rpg_pm_msshub1_base_r(),
@@ -56,7 +56,7 @@ static struct hwpm_ip_aperture t234_mss_iso_niso_hub_inst0_perfmux_element_stati
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(0),
.dt_index = 1U,
.element_index = 1U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_mc0_base_r(),
@@ -72,7 +72,7 @@ static struct hwpm_ip_aperture t234_mss_iso_niso_hub_inst0_perfmux_element_stati
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(1),
.dt_index = 2U,
.element_index = 2U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_mc1_base_r(),
@@ -88,7 +88,7 @@ static struct hwpm_ip_aperture t234_mss_iso_niso_hub_inst0_perfmux_element_stati
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(2),
.dt_index = 3U,
.element_index = 3U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_mc2_base_r(),
@@ -104,7 +104,7 @@ static struct hwpm_ip_aperture t234_mss_iso_niso_hub_inst0_perfmux_element_stati
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(3),
.dt_index = 4U,
.element_index = 4U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_mc3_base_r(),
@@ -120,7 +120,7 @@ static struct hwpm_ip_aperture t234_mss_iso_niso_hub_inst0_perfmux_element_stati
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(4),
.dt_index = 5U,
.element_index = 5U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_mc4_base_r(),
@@ -136,7 +136,7 @@ static struct hwpm_ip_aperture t234_mss_iso_niso_hub_inst0_perfmux_element_stati
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(5),
.dt_index = 6U,
.element_index = 6U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_mc5_base_r(),
@@ -152,7 +152,7 @@ static struct hwpm_ip_aperture t234_mss_iso_niso_hub_inst0_perfmux_element_stati
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(6),
.dt_index = 7U,
.element_index = 7U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_mc6_base_r(),
@@ -168,7 +168,7 @@ static struct hwpm_ip_aperture t234_mss_iso_niso_hub_inst0_perfmux_element_stati
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(7),
.dt_index = 8U,
.element_index = 8U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_mc7_base_r(),
@@ -184,7 +184,7 @@ static struct hwpm_ip_aperture t234_mss_iso_niso_hub_inst0_perfmux_element_stati
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(8),
.dt_index = 9U,
.element_index = 9U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_mc8_base_r(),
@@ -203,7 +203,7 @@ static struct hwpm_ip_aperture t234_mss_iso_niso_hub_inst0_broadcast_element_sta
{
.element_type = IP_ELEMENT_BROADCAST,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_mcb_base_r(),

24
drivers/tegra/hwpm/hal/t234/ip/mss_mcf/t234_mss_mcf.c
View File

@@ -22,7 +22,7 @@ static struct hwpm_ip_aperture t234_mss_mcf_inst0_perfmon_element_static_array[
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = "perfmon_mssmcfclient0",
.start_abs_pa = addr_map_rpg_pm_mcf0_base_r(),
@@ -37,7 +37,7 @@ static struct hwpm_ip_aperture t234_mss_mcf_inst0_perfmon_element_static_array[
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(0),
.dt_index = 1U,
.element_index = 1U,
.dt_mmio = NULL,
.name = "perfmon_mssmcfmem0",
.start_abs_pa = addr_map_rpg_pm_mcf1_base_r(),
@@ -52,7 +52,7 @@ static struct hwpm_ip_aperture t234_mss_mcf_inst0_perfmon_element_static_array[
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(0),
.dt_index = 2U,
.element_index = 2U,
.dt_mmio = NULL,
.name = "perfmon_mssmcfmem1",
.start_abs_pa = addr_map_rpg_pm_mcf2_base_r(),
@@ -71,7 +71,7 @@ static struct hwpm_ip_aperture t234_mss_mcf_inst0_perfmux_element_static_array[
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(0),
.dt_index = 1U,
.element_index = 1U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_mc0_base_r(),
@@ -86,7 +86,7 @@ static struct hwpm_ip_aperture t234_mss_mcf_inst0_perfmux_element_static_array[
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(1),
.dt_index = 2U,
.element_index = 2U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_mc1_base_r(),
@@ -101,7 +101,7 @@ static struct hwpm_ip_aperture t234_mss_mcf_inst0_perfmux_element_static_array[
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(2),
.dt_index = 3U,
.element_index = 3U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_mc2_base_r(),
@@ -116,7 +116,7 @@ static struct hwpm_ip_aperture t234_mss_mcf_inst0_perfmux_element_static_array[
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(3),
.dt_index = 4U,
.element_index = 4U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_mc3_base_r(),
@@ -131,7 +131,7 @@ static struct hwpm_ip_aperture t234_mss_mcf_inst0_perfmux_element_static_array[
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(4),
.dt_index = 5U,
.element_index = 5U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_mc4_base_r(),
@@ -146,7 +146,7 @@ static struct hwpm_ip_aperture t234_mss_mcf_inst0_perfmux_element_static_array[
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(5),
.dt_index = 6U,
.element_index = 6U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_mc5_base_r(),
@@ -161,7 +161,7 @@ static struct hwpm_ip_aperture t234_mss_mcf_inst0_perfmux_element_static_array[
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(6),
.dt_index = 7U,
.element_index = 7U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_mc6_base_r(),
@@ -176,7 +176,7 @@ static struct hwpm_ip_aperture t234_mss_mcf_inst0_perfmux_element_static_array[
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(7),
.dt_index = 8U,
.element_index = 8U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_mc7_base_r(),
@@ -195,7 +195,7 @@ static struct hwpm_ip_aperture t234_mss_mcf_inst0_broadcast_element_static_array
{
.element_type = IP_ELEMENT_BROADCAST,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_mcb_base_r(),

4
drivers/tegra/hwpm/hal/t234/ip/nvdec/t234_nvdec.c
View File

@@ -22,7 +22,7 @@ static struct hwpm_ip_aperture t234_nvdec_inst0_perfmon_element_static_array[
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = "perfmon_nvdeca0",
.start_abs_pa = addr_map_rpg_pm_nvdec0_base_r(),
@@ -41,7 +41,7 @@ static struct hwpm_ip_aperture t234_nvdec_inst0_perfmux_element_static_array[
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_nvdec_base_r(),

8
drivers/tegra/hwpm/hal/t234/ip/nvdla/t234_nvdla.c
View File

@@ -22,7 +22,7 @@ static struct hwpm_ip_aperture t234_nvdla_inst0_perfmon_element_static_array[
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = "perfmon_nvdlab0",
.start_abs_pa = addr_map_rpg_pm_nvdla0_base_r(),
@@ -41,7 +41,7 @@ static struct hwpm_ip_aperture t234_nvdla_inst1_perfmon_element_static_array[
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = "perfmon_nvdlab1",
.start_abs_pa = addr_map_rpg_pm_nvdla1_base_r(),
@@ -60,7 +60,7 @@ static struct hwpm_ip_aperture t234_nvdla_inst0_perfmux_element_static_array[
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_nvdla0_base_r(),
@@ -79,7 +79,7 @@ static struct hwpm_ip_aperture t234_nvdla_inst1_perfmux_element_static_array[
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_nvdla1_base_r(),

4
drivers/tegra/hwpm/hal/t234/ip/nvenc/t234_nvenc.c
View File

@@ -22,7 +22,7 @@ static struct hwpm_ip_aperture t234_nvenc_inst0_perfmon_element_static_array[
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = "perfmon_nvenca0",
.start_abs_pa = addr_map_rpg_pm_nvenc0_base_r(),
@@ -41,7 +41,7 @@ static struct hwpm_ip_aperture t234_nvenc_inst0_perfmux_element_static_array[
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_nvenc_base_r(),

4
drivers/tegra/hwpm/hal/t234/ip/ofa/t234_ofa.c
View File

@@ -22,7 +22,7 @@ static struct hwpm_ip_aperture t234_ofa_inst0_perfmon_element_static_array[
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = "perfmon_ofaa0",
.start_abs_pa = addr_map_rpg_pm_ofa_base_r(),
@@ -41,7 +41,7 @@ static struct hwpm_ip_aperture t234_ofa_inst0_perfmux_element_static_array[
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_ofa_base_r(),

44
drivers/tegra/hwpm/hal/t234/ip/pcie/t234_pcie.c
View File

@@ -22,7 +22,7 @@ static struct hwpm_ip_aperture t234_pcie_inst0_perfmon_element_static_array[
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = "perfmon_pcie0",
.start_abs_pa = addr_map_rpg_pm_pcie_c0_base_r(),
@@ -41,7 +41,7 @@ static struct hwpm_ip_aperture t234_pcie_inst1_perfmon_element_static_array[
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = "perfmon_pcie1",
.start_abs_pa = addr_map_rpg_pm_pcie_c1_base_r(),
@@ -60,7 +60,7 @@ static struct hwpm_ip_aperture t234_pcie_inst2_perfmon_element_static_array[
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = "perfmon_pcie2",
.start_abs_pa = addr_map_rpg_pm_pcie_c2_base_r(),
@@ -79,7 +79,7 @@ static struct hwpm_ip_aperture t234_pcie_inst3_perfmon_element_static_array[
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = "perfmon_pcie3",
.start_abs_pa = addr_map_rpg_pm_pcie_c3_base_r(),
@@ -98,7 +98,7 @@ static struct hwpm_ip_aperture t234_pcie_inst4_perfmon_element_static_array[
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = "perfmon_pcie4",
.start_abs_pa = addr_map_rpg_pm_pcie_c4_base_r(),
@@ -117,7 +117,7 @@ static struct hwpm_ip_aperture t234_pcie_inst5_perfmon_element_static_array[
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = "perfmon_pcie5",
.start_abs_pa = addr_map_rpg_pm_pcie_c5_base_r(),
@@ -136,7 +136,7 @@ static struct hwpm_ip_aperture t234_pcie_inst6_perfmon_element_static_array[
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = "perfmon_pcie6",
.start_abs_pa = addr_map_rpg_pm_pcie_c6_base_r(),
@@ -155,7 +155,7 @@ static struct hwpm_ip_aperture t234_pcie_inst7_perfmon_element_static_array[
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = "perfmon_pcie7",
.start_abs_pa = addr_map_rpg_pm_pcie_c7_base_r(),
@@ -174,7 +174,7 @@ static struct hwpm_ip_aperture t234_pcie_inst8_perfmon_element_static_array[
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = "perfmon_pcie8",
.start_abs_pa = addr_map_rpg_pm_pcie_c8_base_r(),
@@ -193,7 +193,7 @@ static struct hwpm_ip_aperture t234_pcie_inst9_perfmon_element_static_array[
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = "perfmon_pcie9",
.start_abs_pa = addr_map_rpg_pm_pcie_c9_base_r(),
@@ -212,7 +212,7 @@ static struct hwpm_ip_aperture t234_pcie_inst10_perfmon_element_static_array[
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(10),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = "perfmon_pcie10",
.start_abs_pa = addr_map_rpg_pm_pcie_c10_base_r(),
@@ -231,7 +231,7 @@ static struct hwpm_ip_aperture t234_pcie_inst0_perfmux_element_static_array[
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_pcie_c0_ctl_base_r(),
@@ -250,7 +250,7 @@ static struct hwpm_ip_aperture t234_pcie_inst1_perfmux_element_static_array[
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_pcie_c1_ctl_base_r(),
@@ -269,7 +269,7 @@ static struct hwpm_ip_aperture t234_pcie_inst2_perfmux_element_static_array[
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(10),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_pcie_c2_ctl_base_r(),
@@ -288,7 +288,7 @@ static struct hwpm_ip_aperture t234_pcie_inst3_perfmux_element_static_array[
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_pcie_c3_ctl_base_r(),
@@ -307,7 +307,7 @@ static struct hwpm_ip_aperture t234_pcie_inst4_perfmux_element_static_array[
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_pcie_c4_ctl_base_r(),
@@ -326,7 +326,7 @@ static struct hwpm_ip_aperture t234_pcie_inst5_perfmux_element_static_array[
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_pcie_c5_ctl_base_r(),
@@ -345,7 +345,7 @@ static struct hwpm_ip_aperture t234_pcie_inst6_perfmux_element_static_array[
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_pcie_c6_ctl_base_r(),
@@ -364,7 +364,7 @@ static struct hwpm_ip_aperture t234_pcie_inst7_perfmux_element_static_array[
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_pcie_c7_ctl_base_r(),
@@ -383,7 +383,7 @@ static struct hwpm_ip_aperture t234_pcie_inst8_perfmux_element_static_array[
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_pcie_c8_ctl_base_r(),
@@ -402,7 +402,7 @@ static struct hwpm_ip_aperture t234_pcie_inst9_perfmux_element_static_array[
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_pcie_c9_ctl_base_r(),
@@ -421,7 +421,7 @@ static struct hwpm_ip_aperture t234_pcie_inst10_perfmux_element_static_array[
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_pcie_c10_ctl_base_r(),

4
drivers/tegra/hwpm/hal/t234/ip/pma/t234_pma.c
View File

@@ -22,7 +22,7 @@ static struct hwpm_ip_aperture t234_pma_inst0_perfmon_element_static_array[
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = "perfmon_sys0",
.start_abs_pa = addr_map_rpg_pm_pma_base_r(),
@@ -41,7 +41,7 @@ static struct hwpm_ip_aperture t234_pma_inst0_perfmux_element_static_array[
{
.element_type = HWPM_ELEMENT_PERFMUX,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = "pma",
.start_abs_pa = addr_map_pma_base_r(),

8
drivers/tegra/hwpm/hal/t234/ip/pva/t234_pva.c
View File

@@ -22,7 +22,7 @@ static struct hwpm_ip_aperture t234_pva_inst0_perfmon_element_static_array[
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = "perfmon_pvav0",
.start_abs_pa = addr_map_rpg_pm_pva0_0_base_r(),
@@ -37,7 +37,7 @@ static struct hwpm_ip_aperture t234_pva_inst0_perfmon_element_static_array[
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(0),
.dt_index = 1U,
.element_index = 1U,
.dt_mmio = NULL,
.name = "perfmon_pvav1",
.start_abs_pa = addr_map_rpg_pm_pva0_1_base_r(),
@@ -52,7 +52,7 @@ static struct hwpm_ip_aperture t234_pva_inst0_perfmon_element_static_array[
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(0),
.dt_index = 2U,
.element_index = 2U,
.dt_mmio = NULL,
.name = "perfmon_pvac0",
.start_abs_pa = addr_map_rpg_pm_pva0_2_base_r(),
@@ -71,7 +71,7 @@ static struct hwpm_ip_aperture t234_pva_inst0_perfmux_element_static_array[
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_pva0_pm_base_r(),

4
drivers/tegra/hwpm/hal/t234/ip/rtr/t234_rtr.c
View File

@@ -23,7 +23,7 @@ static struct hwpm_ip_aperture t234_rtr_inst0_perfmux_element_static_array[
{
.element_type = HWPM_ELEMENT_PERFMUX,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = "rtr",
.start_abs_pa = addr_map_rtr_base_r(),
@@ -44,7 +44,7 @@ static struct hwpm_ip_aperture t234_rtr_inst1_perfmux_element_static_array[
{
.element_type = HWPM_ELEMENT_PERFMUX,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = "pma",
.start_abs_pa = addr_map_pma_base_r(),

2
drivers/tegra/hwpm/hal/t234/ip/scf/t234_scf.c
View File

@@ -22,7 +22,7 @@ static struct hwpm_ip_aperture t234_scf_inst0_perfmon_element_static_array[
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = "perfmon_scf",
.start_abs_pa = addr_map_rpg_pm_scf_base_r(),

8
drivers/tegra/hwpm/hal/t234/ip/vi/t234_vi.c
View File

@@ -22,7 +22,7 @@ static struct hwpm_ip_aperture t234_vi_inst0_perfmon_element_static_array[
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = "perfmon_vi0",
.start_abs_pa = addr_map_rpg_pm_vi0_base_r(),
@@ -41,7 +41,7 @@ static struct hwpm_ip_aperture t234_vi_inst1_perfmon_element_static_array[
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = "perfmon_vi1",
.start_abs_pa = addr_map_rpg_pm_vi1_base_r(),
@@ -60,7 +60,7 @@ static struct hwpm_ip_aperture t234_vi_inst0_perfmux_element_static_array[
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_vi_thi_base_r(),
@@ -79,7 +79,7 @@ static struct hwpm_ip_aperture t234_vi_inst1_perfmux_element_static_array[
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_vi2_thi_base_r(),

4
drivers/tegra/hwpm/hal/t234/ip/vic/t234_vic.c
View File

@@ -22,7 +22,7 @@ static struct hwpm_ip_aperture t234_vic_inst0_perfmon_element_static_array[
{
.element_type = HWPM_ELEMENT_PERFMON,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = "perfmon_vica0",
.start_abs_pa = addr_map_rpg_pm_vic_base_r(),
@@ -41,7 +41,7 @@ static struct hwpm_ip_aperture t234_vic_inst0_perfmux_element_static_array[
{
.element_type = IP_ELEMENT_PERFMUX,
.element_index_mask = BIT(0),
.dt_index = 0U,
.element_index = 0U,
.dt_mmio = NULL,
.name = {'\0'},
.start_abs_pa = addr_map_vic_base_r(),

4
drivers/tegra/hwpm/include/tegra_hwpm.h
View File

@@ -199,10 +199,10 @@ struct hwpm_ip_aperture {
u32 element_index_mask;
/*
* Element index in device tree entry
* Index of the element within the IP instance
* For perfmux entries, this index is passed to hwpm_ip_reg_op()
*/
u32 dt_index;
u32 element_index;
/* MMIO device tree aperture - only populated for perfmon */
void __iomem *dt_mmio;

4
drivers/tegra/hwpm/os/linux/io_utils.c
View File

@@ -85,7 +85,7 @@ static int ip_readl(struct tegra_soc_hwpm *hwpm, struct hwpm_ip_inst *ip_inst,
err = (*ip_ops_ptr->hwpm_ip_reg_op)(ip_ops_ptr->ip_dev,
TEGRA_SOC_HWPM_IP_REG_OP_READ,
aperture->dt_index, offset, val);
aperture->element_index, offset, val);
if (err < 0) {
tegra_hwpm_err(hwpm, "Aperture (0x%llx-0x%llx) "
"read offset(0x%llx) failed",
@@ -133,7 +133,7 @@ static int ip_writel(struct tegra_soc_hwpm *hwpm, struct hwpm_ip_inst *ip_inst,
err = (*ip_ops_ptr->hwpm_ip_reg_op)(ip_ops_ptr->ip_dev,
TEGRA_SOC_HWPM_IP_REG_OP_WRITE,
aperture->dt_index, offset, &val);
aperture->element_index, offset, &val);
if (err < 0) {
tegra_hwpm_err(hwpm, "Aperture (0x%llx-0x%llx) "
"write offset(0x%llx) val 0x%x failed",