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tegra: hwpm: Rename slcg HAls to cg HALs

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There are different clock gating types. Currently, t234 HWPM only
supports SLCG, however it is possible that future chips will include
more CG features.
Rename disable_slcg() and enable_slcg() HALs to disable_cg() and
enable_cg() respectively.
Setting CG features to enabled mode is a PROD value. Hence, call
enable_cg() from init_prod_values().
To make sure that the CG features are disabled during profiling session,
rearrange init_prod_value() function call before disable_cg().

Bug 3682605

Change-Id: I3426603de14a14bce37880a8c47833ae3203665e
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2734039
(cherry picked from commit eb5cacc67a551714d453465d4ef070971718375a)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2737531
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Vedashree Vidwans
2022-06-22 21:18:36 -07:00
committed by mobile promotions
parent f9d82f5bb7
commit db4f24026e
5 changed files with 28 additions and 21 deletions
Download Patch File Download Diff File Expand all files Collapse all files

18
common/tegra_hwpm_init.c
View File

@@ -183,13 +183,6 @@ int tegra_hwpm_setup_hw(struct tegra_soc_hwpm *hwpm)
goto fail; goto fail;
} }
/* Disable SLCG */
ret = hwpm->active_chip->disable_slcg(hwpm);
if (ret < 0) {
tegra_hwpm_err(hwpm, "Unable to disable SLCG");
goto fail;
}
/* Program PROD values */ /* Program PROD values */
ret = hwpm->active_chip->init_prod_values(hwpm); ret = hwpm->active_chip->init_prod_values(hwpm);
if (ret < 0) { if (ret < 0) {
@@ -197,6 +190,13 @@ int tegra_hwpm_setup_hw(struct tegra_soc_hwpm *hwpm)
goto fail; goto fail;
} }
/* Disable SLCG */
ret = hwpm->active_chip->disable_cg(hwpm);
if (ret < 0) {
tegra_hwpm_err(hwpm, "Unable to disable SLCG");
goto fail;
}
return 0; return 0;
fail: fail:
return ret; return ret;
@@ -215,8 +215,8 @@ int tegra_hwpm_release_hw(struct tegra_soc_hwpm *hwpm)
tegra_hwpm_fn(hwpm, " "); tegra_hwpm_fn(hwpm, " ");
/* Enable SLCG */ /* Enable CG */
ret = hwpm->active_chip->enable_slcg(hwpm); ret = hwpm->active_chip->enable_cg(hwpm);
if (ret < 0) { if (ret < 0) {
tegra_hwpm_err(hwpm, "Unable to enable SLCG"); tegra_hwpm_err(hwpm, "Unable to enable SLCG");
goto fail; goto fail;

11
hal/t234/t234_hwpm_aperture_utils.c
View File

@@ -198,10 +198,17 @@ int t234_hwpm_init_prod_values(struct tegra_soc_hwpm *hwpm)
return err; return err;
} }
/* CG enable is expected PROD value */
err = hwpm->active_chip->enable_cg(hwpm);
if (err < 0) {
tegra_hwpm_err(hwpm, "Unable to enable SLCG");
return err;
}
return 0; return 0;
} }
int t234_hwpm_disable_slcg(struct tegra_soc_hwpm *hwpm) int t234_hwpm_disable_cg(struct tegra_soc_hwpm *hwpm)
{ {
int err = 0; int err = 0;
u32 field_mask = 0U; u32 field_mask = 0U;
@@ -257,7 +264,7 @@ int t234_hwpm_disable_slcg(struct tegra_soc_hwpm *hwpm)
return 0; return 0;
} }
int t234_hwpm_enable_slcg(struct tegra_soc_hwpm *hwpm) int t234_hwpm_enable_cg(struct tegra_soc_hwpm *hwpm)
{ {
int err = 0; int err = 0;
u32 reg_val = 0U; u32 reg_val = 0U;

12
hal/t234/t234_hwpm_interface_utils.c
View File

@@ -38,8 +38,8 @@ static struct tegra_soc_hwpm_chip t234_chip_info = {
.get_resource_info = t234_hwpm_get_resource_info, .get_resource_info = t234_hwpm_get_resource_info,
.init_prod_values = t234_hwpm_init_prod_values, .init_prod_values = t234_hwpm_init_prod_values,
.disable_slcg = t234_hwpm_disable_slcg, .disable_cg = t234_hwpm_disable_cg,
.enable_slcg = t234_hwpm_enable_slcg, .enable_cg = t234_hwpm_enable_cg,
.reserve_rtr = tegra_hwpm_reserve_rtr, .reserve_rtr = tegra_hwpm_reserve_rtr,
.release_rtr = tegra_hwpm_release_rtr, .release_rtr = tegra_hwpm_release_rtr,
@@ -118,13 +118,13 @@ static bool t234_hwpm_validate_hals(struct tegra_soc_hwpm *hwpm)
return false; return false;
} }
if (hwpm->active_chip->disable_slcg == NULL) { if (hwpm->active_chip->disable_cg == NULL) {
tegra_hwpm_err(hwpm, "disable_slcg uninitialized"); tegra_hwpm_err(hwpm, "disable_cg uninitialized");
return false; return false;
} }
if (hwpm->active_chip->enable_slcg == NULL) { if (hwpm->active_chip->enable_cg == NULL) {
tegra_hwpm_err(hwpm, "enable_slcg uninitialized"); tegra_hwpm_err(hwpm, "enable_cg uninitialized");
return false; return false;
} }

4
hal/t234/t234_hwpm_internal.h
View File

@@ -86,8 +86,8 @@ int t234_hwpm_get_resource_info(struct tegra_soc_hwpm *hwpm,
u32 resource_enum, u8 *status); u32 resource_enum, u8 *status);
int t234_hwpm_init_prod_values(struct tegra_soc_hwpm *hwpm); int t234_hwpm_init_prod_values(struct tegra_soc_hwpm *hwpm);
int t234_hwpm_disable_slcg(struct tegra_soc_hwpm *hwpm); int t234_hwpm_disable_cg(struct tegra_soc_hwpm *hwpm);
int t234_hwpm_enable_slcg(struct tegra_soc_hwpm *hwpm); int t234_hwpm_enable_cg(struct tegra_soc_hwpm *hwpm);
int t234_hwpm_disable_triggers(struct tegra_soc_hwpm *hwpm); int t234_hwpm_disable_triggers(struct tegra_soc_hwpm *hwpm);
int t234_hwpm_perfmon_enable(struct tegra_soc_hwpm *hwpm, int t234_hwpm_perfmon_enable(struct tegra_soc_hwpm *hwpm,

4
include/tegra_hwpm.h
View File

@@ -361,8 +361,8 @@ struct tegra_soc_hwpm_chip {
u32 resource_enum, u8 *status); u32 resource_enum, u8 *status);
int (*init_prod_values)(struct tegra_soc_hwpm *hwpm); int (*init_prod_values)(struct tegra_soc_hwpm *hwpm);
int (*disable_slcg)(struct tegra_soc_hwpm *hwpm); int (*disable_cg)(struct tegra_soc_hwpm *hwpm);
int (*enable_slcg)(struct tegra_soc_hwpm *hwpm); int (*enable_cg)(struct tegra_soc_hwpm *hwpm);
int (*reserve_rtr)(struct tegra_soc_hwpm *hwpm); int (*reserve_rtr)(struct tegra_soc_hwpm *hwpm);
int (*release_rtr)(struct tegra_soc_hwpm *hwpm); int (*release_rtr)(struct tegra_soc_hwpm *hwpm);