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tegra: hwpm: move common hals to common path
Allowlist, get IP/resource info and perfmux disable HALs defined in t234 specific files do not require any chip specific details. Move such functions to common files. This way common functions can be reused by future chips, reducing maintainability of these functions. Rename linux specific get_resource_info and get_floorsweep_info functions to avoid multiple definitions. Jira THPM-41 Change-Id: I0fc9eaf5b5d2591fa740939e1a43fe6911b5a378 Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2780702 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Seema Khowala <seemaj@nvidia.com> GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
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72
common/ip.c
72
common/ip.c
@@ -186,6 +186,78 @@ fail:
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return ret;
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}
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int tegra_hwpm_get_fs_info(struct tegra_soc_hwpm *hwpm,
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u32 ip_enum, u64 *fs_mask, u8 *ip_status)
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{
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u32 ip_idx = 0U, inst_idx = 0U, element_mask_shift = 0U;
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u64 floorsweep = 0ULL;
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struct tegra_soc_hwpm_chip *active_chip = NULL;
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struct hwpm_ip *chip_ip = NULL;
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struct hwpm_ip_inst *ip_inst = NULL;
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tegra_hwpm_fn(hwpm, " ");
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/* Convert tegra_soc_hwpm_ip enum to internal ip index */
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if (hwpm->active_chip->is_ip_active(hwpm, ip_enum, &ip_idx)) {
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active_chip = hwpm->active_chip;
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chip_ip = active_chip->chip_ips[ip_idx];
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if (!(chip_ip->override_enable) && chip_ip->inst_fs_mask) {
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for (inst_idx = 0U; inst_idx < chip_ip->num_instances;
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inst_idx++) {
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ip_inst = &chip_ip->ip_inst_static_array[
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inst_idx];
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element_mask_shift = (inst_idx == 0U ? 0U :
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ip_inst->num_core_elements_per_inst);
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if (ip_inst->hw_inst_mask &
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chip_ip->inst_fs_mask) {
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floorsweep |= ((u64)
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ip_inst->element_fs_mask <<
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element_mask_shift);
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}
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}
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*fs_mask = floorsweep;
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*ip_status = TEGRA_HWPM_IP_STATUS_VALID;
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return 0;
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}
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}
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tegra_hwpm_dbg(hwpm, hwpm_dbg_floorsweep_info,
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"SOC hwpm IP %d is unavailable", ip_enum);
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*ip_status = TEGRA_HWPM_IP_STATUS_INVALID;
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*fs_mask = 0ULL;
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return 0;
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}
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int tegra_hwpm_get_resource_info(struct tegra_soc_hwpm *hwpm,
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u32 resource_enum, u8 *status)
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{
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u32 ip_idx = 0U;
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struct tegra_soc_hwpm_chip *active_chip = hwpm->active_chip;
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struct hwpm_ip *chip_ip = NULL;
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tegra_hwpm_fn(hwpm, " ");
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/* Convert tegra_soc_hwpm_resource to internal enum */
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if (hwpm->active_chip->is_resource_active(hwpm, resource_enum, &ip_idx)) {
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chip_ip = active_chip->chip_ips[ip_idx];
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if (!(chip_ip->override_enable)) {
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*status = tegra_hwpm_safe_cast_u32_to_u8(
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chip_ip->resource_status);
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return 0;
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}
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}
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*status = tegra_hwpm_safe_cast_u32_to_u8(
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TEGRA_HWPM_RESOURCE_STATUS_INVALID);
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return 0;
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}
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/*
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* There are 3 ways to get info about available IPs
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* 1. IP register to HWPM driver
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