Commit Graph

5 Commits

Author SHA1 Message Date
Vedashree Vidwans
787831388d tegra: hwpm: fix bugs on ToT
- With latest changes, disable PMA triggers contained a bug related to
timeout checks. Reading register value in while loop was removed
accidentally.
Replace HWPM_TIMEOUT macro with do-while loop to check condition.
- Correct func enum used to release router.
- Correct MSS MCF IP and instance address stride.

Jira THWPM-41

Change-Id: I28b4b223c33992599332de39471fd80215e0c98b
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2713365
Reviewed-by: Vasuki Shankar <vasukis@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-05-18 22:56:50 -07:00
Vedashree Vidwans
25f0737897 tegra: hwpm: combine common functionality
- Many HWPM functions are performed on all apertures of all instances of
all IPs. Define below resource utility functions to perform a task on
all IPs, instances and apertures:
  - tegra_hwpm_func_all_IPs
  - tegra_hwpm_func_single_ip
  - tegra_hwpm_func_all_instance
  - tegra_hwpm_func_single_instance
  - tegra_hwpm_func_all_perfmuxes
  - tegra_hwpm_func_all_perfmons
  - tegra_hwpm_func_single_aperture
- Modify below functions to use above mentioned utility functions:
  - get allowlist size
  - combine allowlist
  - reserve resources
  - bind resources
  - release resources

This will make code more legible and maintainable.

This patch also defines new function that validates all HAL
initializations for the chip.

Jira THWPM-41

Change-Id: Icaeba4d94187b97022c0a6626584e7d61ab6d0e4
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2705524
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Vasuki Shankar <vasukis@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-05-17 08:42:51 -07:00
Vedashree Vidwans
edb9e2c245 tegra: hwpm: fix cert-c errors
Fix coding standard cert-c violations because of unsafe calculations.
Introduce safe subtract, add, multiply and cast APIs and use throughout
the hwpm driver.

Bug 3512545

Change-Id: If374629ac75b48a8bc08b1b7a9a41ea5ef0526b1
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2677160
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Vasuki Shankar <vasukis@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Prateek Patel <prpatel@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-03-15 17:32:48 -07:00
Vedashree Vidwans
7f5bfd3176 tegra: hwpm: resolve coverity defects
Resolve coverity violations:
- Correct invalid arguments in debug prints
- Modify if statement to compare similar data types
- Update tegra_hwpm_map_stream_buffer() return statements.

Bug 3461002

Change-Id: Ic299a594bc371bac4a96a035f31961a586486083
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2675433
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Vasuki Shankar <vasukis@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-03-01 00:10:40 -08:00
Vedashree Vidwans
92be6f7a00 tegra: hwpm: restructure HWPM driver
- Update HWPM driver to add HAL layer. This will allow support for multiple chips.
- Add below data structure hierarchy for HWPM driver
HWPM driver structure -> chip info struct -> ip info array -> perfmux/perfmon info array
NOTE: To make commit message more legible, using "aperture" instead of "perfmux and/or perfmon"
- Chip info structure contains
  - Array of IP info
  - HAL function pointers
- IP info structure contains IP specific info
  - Number of instances
  - Number of apertures per instance
  - Aperture ranges, strides, static info array
  - Aperture dynamic arrays
- Aperture info structure contains
  - Hw index
  - Physical address info
  - MMIO address info
- Add separate IP info files
- Create separate files that include logic for allowlist, memory buffer, resources, ip, regops to make functions more legible.
- Move probe, ioctl and io functions to os/linux path.
- Add fn, info, register and verbose debug log levels to controls debug messages
  - add debugfs node to update dbg_mask
- Correct MGBE perfmux base address

Jira THWPM-41

Change-Id: I8ffdaa657789e2a187cbb98502d0359bb57f9c54
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2651377
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-02-09 09:46:25 -08:00