Below listed functions are defined and used in the same source file,
hence update the functions to be static.
- tegra_hwpm_element_disable
- tegra_hwpm_element_reserve
- tegra_hwpm_element_release
Bug 3528414
Change-Id: Ib9aa44001fb5fac1e339b3264a4d750af09b9a01
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/2847009
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Upstream Linux kernel commit ff62b8e6588f ("driver core: make struct
class.devnode() take a const *") updated the 'devnode' function pointer
under the class structure to take a const device struct. This breaks
building the Tegra HWPM driver with Linux v6.2. Make the necessary
changes to the HWPM driver to fix the build breakage.
Bug 3936429
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Change-Id: I54b7bcefbd5a2e6e88c13b3714ea012cc2a73615
(cherry picked from commit de9dd40f6a4dc35e6ee9e6140cac148171bcd6e1)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/2847008
Tested-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Kernel version beyond 5.10 introduces dma_buf_map structure (called
iosys_map in later versions). Kernel virtual address corresponding to a
dma_buf is stored in the dma_buf_map structure.
- This patch updates memory management function to use correct mem bytes
buffer kernel virtual address stored in the corresponding dma_buf_map
structure.
- Use dma_buf_map structure pointer to unmap kernel virtual address.
- During release, poll mem bytes buffer with finite timeout value.
- Add description for use of dma_set_mask_and_coherent.
Bug 3893741
Change-Id: I42ace2fe70b36d7d5d1a4c5fee21786826f24a07
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
(cherry picked from commit ce852be6b39ef39affccdee41ad436fc70bf86b5)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/2847007
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
- HWPM driver requires to know if an IP is available for performance
measurements. The ideal way is for IP driver registration with HWPM
driver. This way IP driver can share required power management and
register access function pointers.
- For IPs that do not have registration mechanism implemented, a
workaround to set an IP enabled is implemented in the HWPM driver.
- In the recent releases, MSS channel, PVA and DLA IPs are the only PORs
for production builds. Currently, this is acheived using the combination
of minimal build and force enable flags.
- However, this implementation limits the number of enabled IPs on TOT
to only minimal expected ones.
- This patch modifies the force enable IP logic implementation to make
force enable and minimal IP flag definition more clear.
- CONFIG_T234_HWPM_ALLOW_FORCE_ENABLE should be used to purposely enable
IPs that do not have registration mechanism implemented. This flag is
used for POR or non-POR IPs. Ideally, all IPs should implement HWPM
registration and force enable flag should not be required.
- CONFIG_TEGRA_HWPM_MINIMAL_IP_ENABLE should be used to implement logic
for POR IPs. In other words, if CONFIG_TEGRA_HWPM_MINIMAL_IP_ENABLE is
not defined, non-POR IPs should be included in the builds. This patch
sets MINIMAL IP config only for external non-safety builds.
- Fix include t234_perfmon_device_index.h error in t234_mss_mcf.c file.
- Add missing device index for PVA perfmon C0.
Jira THWPM-41
Change-Id: I20651eac14b6d42e5bf3cc5164d1f64ec208dc04
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/2818735
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Property support-soc-tools was added mainly to provide user's control to
enable/disable HWPM feature. Since, the same functionality can be
achieved using "status" in device node, support-soc-tools property is
redundant. Hence, this property is removed from HWPM device node.
Update HWPM driver probe to not depend on support-soc-tools property.
JIRA THWPM-48
Change-Id: Ieaa5c77e6c62a59e938832f886c5a82031139ac6
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/2797449
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Add Device_index tag to read IP perfmon register address
index from ACPI or DTSI tables. Device_index will be
used to retrieve resource information from acpi tables
or device trees. This will replace current logic to
procure resource details using device names.
JIRA THWPM-71
Change-Id: I964546f2262dd77ec0acfb58f49d044c870deae6
Signed-off-by: vasukis <vasukis@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/2797448
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Tested-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Currently, dt_index aperture spec actually holds the element index of
the aperture within the IP instance. Hence, replace dt_index with
element_index to better indicate its purpose.
JIRA THWPM-71
Change-Id: Ic805da3281c60991e7966a80f442d84a2cfcf7cc
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/2797447
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
- Make clock reset functions into HALs. This way we can control
clock-reset logic for any chip. Set clock-reset HAL pointers to
appropriate functions.
- Remove clock-reset function wrappers as these will not be required and
corresponding HAL pointers will be used.
- As clock reset init is defined as a HAL, modify probe logic to
initialize chip info before invoking any HALs.
- Move common/primary HAL validation logic to common code and implement
new HAL to validate chip specific HALs. This way we can ensure that HAL
pointers are set as expected.
- Keep only one definition for t234_hwpm_init_chip_info as t234 should
always be initialized and hence only single definition should be
available.
- Expected return value of 0 indicates success and any other value
(mostly negative in current logic) indicates error, compare function
returns with 0 to print error in tegra_hwpm_release().
- Since a build can support both ACPI and device tree, update
init_chip_info() to retrieve chip information from ACPI and device tree
in case of failure.
Jira THWPM-41
Bug 3583624
Change-Id: I03fefae0b3b0c8ce46d175d39e4fdbb45e2bb22f
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2789668
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Vasuki Shankar <vasukis@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/2797445
- Zeroing of PMA trigger registers is unnecessary. Remove corresponding
logic from HWPM teardown function.
- During device open, add a check for PMA/RTR status. This will ensure
that PMA/RTR are ready to start new profiling session. Device open will
fail if RTR and PMA enginestatus is not ready(idle).
- SOC HWPM driver disables and releases all reserved IPs before teardown
steps. Update teardown logic to zero out IP allowlist registers during
teardown.
Jira THWPM-41
Bug 3714516
Change-Id: Iede5a5ed9860e2a73c8e4a04aeedfc061458c793
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2776229
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/2797444
HWPM files are copied from the previous source in linux-nvidia repo
withgit history. Create folders and move files to obtain expected folder
structure.
Bug 3787076
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
- Currently, kernel OOT doesn't support chip id info functions.
Introduce hwpm_soc_chip_info structure that holds soc info required by
the driver.
- Add function to initialize the chip info. Rename previous
tegra_hwpm_init_chip_info to tegra_hwpm_get_chip_info to avoid confusion
of the functionality.
- Implement tegra_hwpm_init_chip_info to initialize chip info structure
when OOT kernel is used. The implementation supports both ACPI and
device tree.
- Separate all chip info functions implementations for OOT kernel and
previous kernels. This cleans up the file and makes code more legible.
- Currently, tegra_hwpm_read_support_soc_tools_prop is only implemented
if device trees are accessible by the driver. Hence add condition to
execute the function only if ACPI is not supported.
- Add ACPI device table reference in the driver.
- Rename tegra_hwpm_next1_init_chip_info to
tegra_hwpm_next1_init_chip_ip_structures and similarly for all future
chips.
Bug 3768922
Jira THWPM-50
Change-Id: Id3f2c6952d7c9ec0343cda8dcf2dc7b936054ca7
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2783683
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Vasuki Shankar <vasukis@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
- add next2 init chip info logic
- add next2 device id
- Update logic of chip info functions to support next2 chip. Modify the
functions to use formal "if defined()" macro instead of "ifdef".
- Execute support-soc-tools property only on silicon platform
- Separate OOT module_init symbol from postcore_init call on previos
kernel.
Jira THWPM-64
Change-Id: I408c99ff84507a685db6195cb71364d939931d53
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2757457
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
OOT definition of dma_buf_vmap() is changed to accept 2 arguments. The
second argumentt is used to return the dma mapping of the user buffer.
However, this output pointer is expected to point to an allocated
sma_buf_map structure. Add dma_buf_map structure as a member of struct
tegra_hwpm_mem_mgmt.
Bug 3768922
Change-Id: Ie776b7b7d0e364e6391212b9df87acbb4c43f1fa
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2778946
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Allowlist, get IP/resource info and perfmux disable HALs defined in t234
specific files do not require any chip specific details.
Move such functions to common files. This way common functions can be
reused by future chips, reducing maintainability of these functions.
Rename linux specific get_resource_info and get_floorsweep_info
functions to avoid multiple definitions.
Jira THPM-41
Change-Id: I0fc9eaf5b5d2591fa740939e1a43fe6911b5a378
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2780702
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Fix bugs for accessing uninitialized mem_mgmt and alist_map structures.
- Not initializing memory management functionality in HWPM is a valid
situation. Currently, tegra_hwpm_clear_mem_pipeline dereferences the
mem_mgmt pointer without validation, which can lead to failures. Check
if mem_mgmt struct pointer is valid before dereferencing.
- Alist_map structure is only required if user requests allowlist size
or list of allowlist registers. Currently, tegra_hwpm_sw_setup
dereferences alist_map pointer to set full_alist_size to 0. Add
alist_map allocation function and set full_alist_size to 0.
- Add PMA and CMD_ROUTER as valid cases for
tegra_hwpm_translate_soc_hwpm_resource() translation.
- Move logic to record IP function pointers to separate function. This
way changes to IP ops registration will be in single location.
Jira THWPM-41
Change-Id: I2c221bb13b6875b76a6fabee4c224d77ac72a6fc
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2770418
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Vasuki Shankar <vasukis@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
- Some of the APIs are not available on stable kernel. Use kstable
specific APIs with LINUX_KERNEL macro condition.
- Temporarily comment functions that are not available on Kstable.
- Next chip headers are renamed to accommodate more than one next chip.
Update next chip includes in init.c and driver.c files.
- Rename TEGRA_SOC_HWPM_IP_INACTIVE to TEGRA_HWPM_IP_INACTIVE to follow
other macro/enum naming convention.
- Use is_resource_active() HAL instead of chip specific function.
- Create clock reset functions that will allow us to handle change in
APIs on kstable.
Jira THWPM-41
Change-Id: I55f58fa51cf9ae96ee9a9565942e68b3b2bb76ee
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2764840
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
- Declare and initialize timeout and mem_bytes_kernel_u32 variables.
- alist_map NULL pointer check is done after alist_map structure
references. Modify update_allowlist ioctl and release alist_map
functions to check alist_map NULL pointer before it's use.
- Checking if unsigned _IOC_NR(cmd) is less than zero has no effect.
Remove this check.
- Correct printf format specifier for mem_bytes_addr.
Bug 3461002
Change-Id: I79a97942e667c173d112bcaafb14ddcb8dd7d47f
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2765676
Reviewed-by: Vasuki Shankar <vasukis@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Currently, HWPM parent structure contains linux specific device
variables. In an effort to make HWPM driver OS agnostic, create Linux
specific wrapper HWPM structure tegra_hwpm_os_linux. Move linux specific
variables from tegra_soc_hwpm structure to tegra_hwpm_os_linux
structure.
Jira THWPM-60
Change-Id: I189cde92c5b83b327ccb467c72dee5756f16481d
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2729700
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
- To make HWPM driver OS agnostic, redefine UAPI IP and resource enums
in HWPM header file. The redefined enums will be used internally in
driver logic.
- Rename force enable IP flag to include chip name. This will allow IPs
to be force enabled corresponding to the chip.
Jira THWPM-60
Change-Id: Ibe7ce6666b0e009e5183d591591f393037818052
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2747680
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Currently, linux specific SOC functions below are used in HWPM driver.
- find type of platform/config
- read fuse registers
- read device info
In order to make HWPM OS agnostic, add wrappers for SOC functions and/or
move code to os folder.
Jira THWPM-59
Change-Id: I8a7e824f3cffe7ae5c7e977b4b6690eb180958e4
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2743372
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Stream and allowlist buffers are allocated by the user as dma buffers
and mapped in virtual address space by the driver. The DMA and mapping
functions are linux specific. Hence create memory management and
allowlist linux structures. Add these linux memory structure pointers in
the tegra_hwpm parent structure.
Jira THWPM-60
Change-Id: I2526f2bab835df4c5a922b0b375c22a6247aad30
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2729664
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
To make HWPM driver OS agnostic, remove linux specific includes from
common and chip specific files.
- Move IP register list related logic to os linux folder.
- tegra_hwpm_get_floorsweep_info() and tegra_hwpm_get_resource_info()
refer to linux specific UAPI structures. Relocate these functions to os
folder.
- Use tegra_hwpm_ip_ops structure in HWPM driver internal logic. Move
or rewrite functions using tegra_soc_hwpm_ip_ops.
Jira THWPM-59
Change-Id: I1dd1e088d59fdc44923d2b6502bb0cf350ce57a6
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2729471
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Perfmux/perfmon reserve and release functions use linux APIs to
map/unmap mmio apertures. In an effort to make HWPM driver OS agnostic,
add wrappers to reserve and release apertures.
Jira THWPM-59
Change-Id: I2e8e820ae0b7c46f5656e8dfd2cf7ef370f168cc
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2738157
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Vasuki Shankar <vasukis@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit
Floorsweep info ioctl shares flattened IP element mask. LSB of flattened
mask is expected to correspond to IP instance 0 element index mask.
Currently, HWPM driver incorrectly shifts instance 0 floorsweep mask to
higher bits.
Fix the floorsweep info calculation logic to compute floorsweep mask
correctly.
Use is_ip_active and is_resource_active hals instead of chip specific
functions.
Bug 3737440
Change-Id: I01c1b430cf7fdc2159198770f8b34056dda5ccca
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2754282
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Vasuki Shankar <vasukis@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit
The device sampler test doesn't consume all PMA records and initiates
device close. This results in PMA engine status to be set to quiesce
state and tegra_hwpm_release() returning with error.
In such case, HWPM driver should close device completely and return any
resultant error.
Closing HWPM device completely ensures that sw state is reset and ready
for next session. And HWPM reset assert during device close resets HWPM
hardware.
Bug 3714516
Change-Id: I9d800bfb7a38f82a295f45a674d14808975a863e
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2744657
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Vasuki Shankar <vasukis@nvidia.com>
Reviewed-by: Adeel Raza <araza@nvidia.com>
HWPM driver verifies available IP instance elements and updates
corresponding element floorsweep mask in the IP structures. Availability
of the elements is done by reading one perfmux register corresponding to
the element. Since PMA and RTR perfmuxes belong to the HWPM device,
these apertures need to be MMIO mapped to be accessed. Since PMA/RTR
perfmuxes are MMIO mapped at reservation, the availabilty verification
fails to read perfmux registers. This triggers incorrect updates for PMA
element fs mask.
PMA/RTR have pre-defined/pre-initialized element_fs_masks. Hence,
verifying element availabilty for PMA/RTR should be skipped. This change
fixes the issue of PMA marked as invalid.
Bug 3682605
Change-Id: Ib78fde73a1321095315b735b987fe8e2a9aaf474
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2743130
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Vasuki Shankar <vasukis@nvidia.com>
Reviewed-by: Adeel Raza <araza@nvidia.com>
GVS: Gerrit_Virtual_Submit
There are different clock gating types. Currently, t234 HWPM only
supports SLCG, however it is possible that future chips will include
more CG features.
Rename disable_slcg() and enable_slcg() HALs to disable_cg() and
enable_cg() respectively.
Setting CG features to enabled mode is a PROD value. Hence, call
enable_cg() from init_prod_values().
To make sure that the CG features are disabled during profiling session,
rearrange init_prod_value() function call before disable_cg().
Bug 3682605
Change-Id: I3426603de14a14bce37880a8c47833ae3203665e
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2734039
(cherry picked from commit eb5cacc67a551714d453465d4ef070971718375a)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2737531
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
IPs supported for performance management register themselves with
required funtion pointers. The HWPM driver processes the request and
marks the given IP instance valid.
To mark elements of the registered IP instance valid, HWPM reads one of
the allowlist registers. Register read is essential to confirm
availability of the element. Register reads for floorswept elements
should return with error.
Currently, HWPM driver marks all elements of an IP instance as available
at registration time. The process to update element mask considering
floorswept elements is performed during IP reservation.
Users querying floorsweeping info before reservation ioctls would
receive incorrect fs_info masks.
To fix this issue, move updating of IP instance element fs_info at
device open. If device is already opened, update element mask during
registration.
- Implement TEGRA_HWPM_UPDATE_IP_INST_MASK case to update element fs
mask for given IP.
Bug 3685203
Bug 3584061
Change-Id: If992204e6f7debf24b36a94f2b752b5077333cda
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2734732
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit
Fix following violations reported by sparse tool
- warning: symbol 'tegra_hwpm_debugfs_*' was not declared. Should it
be static?
Add missing header in tegra_hwpm_debugfs.c file to fix this issue
- warning: no newline at end of file
Add new end line in tegra_hwpm_alist_utils.c to fix this issue.
- warning: symbol 't234_chip_info' was not declared. Should it be
static?
Modify t234_chip_info structure to be static to fix this issue.
- warning: symbol '*_perfmon_element_static_array' was not declared.
Should it be static?
- warning: symbol '*_perfmux_element_static_array' was not declared.
Should it be static?
- warning: symbol '*_inst_static_array' was not declared. Should it
be static?
Modify each *_perfmon_element_static_array,
*_perfmux_element_static_array and *_inst_static_array in all IPs to be
static to fix this issue.
Bug 3528414
Change-Id: I58e7a1c6e14988d7315fb8d160aa7f89a2eb4cf5
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2725821
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
