Commit Graph

16 Commits

Author SHA1 Message Date
vasukis
b27a32e7f0 tegra: hwpm: Modify OS common code for QNX
Modify the OS common code to be used by HWPM QNX
resource manager.

JIRA THWPM-44

Change-Id: Ibade56d3d94ce4d7e014e199963e2ddf568e7d3a
Signed-off-by: vasukis <vasukis@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/2858465
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Vivek Bangera <vbangera@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2023-03-08 06:20:00 -08:00
Vedashree Vidwans
8b861518c4 tegra: hwpm: update licenses for all files
Modify OS agnostic files in common, hal and include folder to use MIT
license. This will allow the files to be shared between different OSes.
Modify OS specific files in os/linux and uapi folders to add SPDX
identifier for GPLv2.

Jira THWPM-69

Change-Id: I4fef142354a46fc23b67616204ccf0712a99caec
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/2797453
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2023-02-08 03:16:24 -08:00
Vedashree Vidwans
e115e1da2f tegra: hwpm: update aperture mmio details
HWPM components (PMA, RTR, perfmon) have MMIO address space and a
corresponding virtual address region. It is possible that both MMIO and
virtual addresses are same for an aperture.
MMIO address of an aperture is used in device node to enable the
aperture and further to map HWPM component in the driver.
Virtual addresses are used by the applications to execute regops on HWPM
apertures. Virtual addresses are also used to fake aperture address
space in simulation.
This patch updates
- HWPM aperture structures to include MMIO address.
- aperture ioremap function to use MMIO address values.
- fake register allocation to use virtual address values.

Jira THWPM-41

Change-Id: I05acb68dcb278722cd333e1187b2355d1d739e93
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
(cherry picked from commit 1c0e8107b4cddad7532c10dddc22bb30cef2540b)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/2853213
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2023-02-08 03:16:20 -08:00
vasukis
1bbda26d7d tegra: hwpm: Add C2C IP support
Add C2C enum in HWPM IP/Resource lists for internal and userspace
perusal. Update translate enum function accordingly.

Jira THWPM-72
Bug 3910198

Change-Id: I1b0ad91345bdf302b3f9b4b7e171bb3f4cc7b2b5
Signed-off-by: vasukis <vasukis@nvidia.com>
(cherry picked from commit 721aef448cf00878764f87dfc48241fb055c49b2)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/2853212
Tested-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2023-02-08 03:16:15 -08:00
Vedashree Vidwans
dd4f96e5c9 tegra: hwpm: fix kernel crash on TOT
Currently on TOT, stream buffer map functions results in kernel crash.
The kernel crash is an effect of incorrect conditions in the mapping
function. Fix the code logic to use correct kernel version conditions to
use appropriate DMA buffer structures.

Bug 3893741

Change-Id: I3888ec01fdb2025f6d9c3a22296ca9d1abbcadb0
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
(cherry picked from commit 5a3476cfb6574eb5ace29801a4f428ce9d694ce9)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/2853211
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2023-02-08 03:16:11 -08:00
Vedashree Vidwans
d782c9ee5b tegra: hwpm: fix sparse errors
Below listed functions are defined and used in the same source file,
hence update the functions to be static.
- tegra_hwpm_element_disable
- tegra_hwpm_element_reserve
- tegra_hwpm_element_release

Bug 3528414

Change-Id: Ib9aa44001fb5fac1e339b3264a4d750af09b9a01
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/2847009
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
2023-02-08 03:16:06 -08:00
Jon Hunter
5bd6255239 tegra: hwpm: Fix build for Linux v6.2
Upstream Linux kernel commit ff62b8e6588f ("driver core: make struct
class.devnode() take a const *") updated the 'devnode' function pointer
under the class structure to take a const device struct. This breaks
building the Tegra HWPM driver with Linux v6.2. Make the necessary
changes to the HWPM driver to fix the build breakage.

Bug 3936429

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Change-Id: I54b7bcefbd5a2e6e88c13b3714ea012cc2a73615
(cherry picked from commit de9dd40f6a4dc35e6ee9e6140cac148171bcd6e1)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/2847008
Tested-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2023-02-08 03:16:02 -08:00
Vedashree Vidwans
f010cf5956 tegra: hwpm: update dma vmap for kernel > 5.10
Kernel version beyond 5.10 introduces dma_buf_map structure (called
iosys_map in later versions). Kernel virtual address corresponding to a
dma_buf is stored in the dma_buf_map structure.
- This patch updates memory management function to use correct mem bytes
buffer kernel virtual address stored in the corresponding dma_buf_map
structure.
- Use dma_buf_map structure pointer to unmap kernel virtual address.
- During release, poll mem bytes buffer with finite timeout value.
- Add description for use of dma_set_mask_and_coherent.

Bug 3893741

Change-Id: I42ace2fe70b36d7d5d1a4c5fee21786826f24a07
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
(cherry picked from commit ce852be6b39ef39affccdee41ad436fc70bf86b5)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/2847007
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2023-02-08 03:15:58 -08:00
Vedashree Vidwans
7a89f70da6 tegra: hwpm: t234: decouple force IP, minimal cfg
- HWPM driver requires to know if an IP is available for performance
measurements. The ideal way is for IP driver registration with HWPM
driver. This way IP driver can share required power management and
register access function pointers.
- For IPs that do not have registration mechanism implemented, a
workaround to set an IP enabled is implemented in the HWPM driver.
- In the recent releases, MSS channel, PVA and DLA IPs are the only PORs
for production builds. Currently, this is acheived using the combination
of minimal build and force enable flags.
- However, this implementation limits the number of enabled IPs on TOT
to only minimal expected ones.
- This patch modifies the force enable IP logic implementation to make
force enable and minimal IP flag definition more clear.
- CONFIG_T234_HWPM_ALLOW_FORCE_ENABLE should be used to purposely enable
IPs that do not have registration mechanism implemented. This flag is
used for POR or non-POR IPs. Ideally, all IPs should implement HWPM
registration and force enable flag should not be required.
- CONFIG_TEGRA_HWPM_MINIMAL_IP_ENABLE should be used to implement logic
for POR IPs. In other words, if CONFIG_TEGRA_HWPM_MINIMAL_IP_ENABLE is
not defined, non-POR IPs should be included in the builds. This patch
sets MINIMAL IP config only for external non-safety builds.

- Fix include t234_perfmon_device_index.h error in t234_mss_mcf.c file.
- Add missing device index for PVA perfmon C0.

Jira THWPM-41

Change-Id: I20651eac14b6d42e5bf3cc5164d1f64ec208dc04
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/2818735
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2023-02-08 03:15:53 -08:00
Vedashree Vidwans
b7d94cea88 tegra: hwpm: remove support-soc-tools dependency
Property support-soc-tools was added mainly to provide user's control to
enable/disable HWPM feature. Since, the same functionality can be
achieved using "status" in device node, support-soc-tools property is
redundant. Hence, this property is removed from HWPM device node.
Update HWPM driver probe to not depend on support-soc-tools property.

JIRA THWPM-48

Change-Id: Ieaa5c77e6c62a59e938832f886c5a82031139ac6
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/2797449
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
2022-12-11 14:50:19 -08:00
vasukis
c7ea8476fc tegra: hwpm: add aperture device node index
Add Device_index tag to read IP perfmon register address
index from ACPI or DTSI tables. Device_index will be
used to retrieve resource information from acpi tables
or device trees. This will replace current logic to
procure resource details using device names.

JIRA THWPM-71

Change-Id: I964546f2262dd77ec0acfb58f49d044c870deae6
Signed-off-by: vasukis <vasukis@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/2797448
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Tested-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
2022-12-11 14:50:14 -08:00
Vedashree Vidwans
da9a29418a tegra: hwpm: replace dt_index with element_index
Currently, dt_index aperture spec actually holds the element index of
the aperture within the IP instance. Hence, replace dt_index with
element_index to better indicate its purpose.

JIRA THWPM-71

Change-Id: Ic805da3281c60991e7966a80f442d84a2cfcf7cc
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/2797447
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
2022-12-11 14:50:10 -08:00
vasukis
afe35d034f tegra: hwpm: t234: Rename FORCE_ENABLE macro
The FORCE_ENABLE config flag is chip specific and
should include chip id. Hence update the force enable
config flag from CONFIG_HWPM_ALLOW_FORCE_ENABLE to
CONFIG_T234_HWPM_ALLOW_FORCE_ENABLE

Bug 3807813

Change-Id: I9d6626444eba5d3c56d8a28c9bfbaf7534617440
Signed-off-by: vasukis <vasukis@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2789722
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-by: Sundeep Nagra <snagra@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/2797446
Tested-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
2022-12-11 14:50:05 -08:00
Vedashree Vidwans
5166c3ab71 tegra: hwpm: add clk-rst HALs, update HAL validation
- Make clock reset functions into HALs. This way we can control
clock-reset logic for any chip. Set clock-reset HAL pointers to
appropriate functions.
- Remove clock-reset function wrappers as these will not be required and
corresponding HAL pointers will be used.
- As clock reset init is defined as a HAL, modify probe logic to
initialize chip info before invoking any HALs.
- Move common/primary HAL validation logic to common code and implement
new HAL to validate chip specific HALs. This way we can ensure that HAL
pointers are set as expected.
- Keep only one definition for t234_hwpm_init_chip_info as t234 should
always be initialized and hence only single definition should be
available.
- Expected return value of 0 indicates success and any other value
(mostly negative in current logic) indicates error, compare function
returns with 0 to print error in tegra_hwpm_release().
- Since a build can support both ACPI and device tree, update
init_chip_info() to retrieve chip information from ACPI and device tree
in case of failure.

Jira THWPM-41
Bug 3583624

Change-Id: I03fefae0b3b0c8ce46d175d39e4fdbb45e2bb22f
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2789668
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Vasuki Shankar <vasukis@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/2797445
2022-12-11 14:50:01 -08:00
Vedashree Vidwans
913f1b0697 tegra: hwpm: add checks for PMA quiesce state
- Zeroing of PMA trigger registers is unnecessary. Remove corresponding
logic from HWPM teardown function.
- During device open, add a check for PMA/RTR status. This will ensure
that PMA/RTR are ready to start new profiling session. Device open will
fail if RTR and PMA enginestatus is not ready(idle).
- SOC HWPM driver disables and releases all reserved IPs before teardown
steps. Update teardown logic to zero out IP allowlist registers during
teardown.

Jira THWPM-41
Bug 3714516

Change-Id: Iede5a5ed9860e2a73c8e4a04aeedfc061458c793
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2776229
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/2797444
2022-12-11 14:49:56 -08:00
Vedashree Vidwans
7c1ae11f78 tegra: hwpm: move files to appropriate path
HWPM files are copied from the previous source in linux-nvidia repo
withgit history. Create folders and move files to obtain expected folder
structure.

Bug 3787076

Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
2022-10-05 16:05:20 -07:00