Commit Graph

9 Commits

Author SHA1 Message Date
vasukis
bb4b1def61 tegra: hwpm: t264: Merge t264-hwpm files to hwpm
Merge the T264 private source code to hwpm common code.
This is done after T264 source code can be made public.

Bug 4856428
Bug 4943517

Signed-off-by: vasukis <vasukis@nvidia.com>
Change-Id: Ie830c5465f32f49978cb465d68785ab3dbaee984
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/3219865
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2024-11-06 01:56:13 -08:00
Vedashree Vidwans
5705145f59 tegra: hwpm: th500: correct config flag name
Recently, TH500 HWPM config flag was renamed to CONFIG_TEGRA_HWPM_TH500.
Correct the config flag name in init.c and acpi.h files.

Jira THWPM-112

Change-Id: I9fcc40cd2529c0e5e6894bda95f6d8248e8b61cd
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/3167472
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Vasuki Shankar <vasukis@nvidia.com>
2024-07-13 08:56:49 -07:00
Vedashree Vidwans
da3bda1364 tegra: hwpm: improve common function readability
- HALs get_rtr_int_idx and get_ip_max_idx return the chip specific
router index and number of IPs. This information is static for a chip
and doesn't require any input. Hence, update the HAL definition to not
require hwpm pointer as an argument. Update definition and references
for these HALs.
- Add new HAL to get PMA and RTR structure pointers. Implement and
update other chip specific functions to use new HAL.
- Add new timer macro to check a condition and timeout after given
retries. Update necessary code to use new timer macro.
- Correct validate_emc_config function to compute correct available mss
channel mask based on fuse value.
- Update tegra_hwpm_readl and tegra_hwpm_writel macros to assert error
value. This way error checks are added at one spot and not sprinkled all
over the driver code.
- Update get_mem_bytes_put_ptr() and membuf_overflow_status() to return
error as function return and accept arguments to return mem_head pointer
and overflow status respectively. Add overflow status macros to use
throughout driver. Update HAL definition and references accordingly.
- conftest is only compiled for OOT config atm. Add OOT config check to
include conftest header.

Jira THWPM-109

Change-Id: I77d150e860fa344a1604d241e27718150fdb8647
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/2982555
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: Vishal Aslot <vaslot@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2023-10-05 04:30:46 -07:00
Vishal Aslot
c630042921 tegra: hwpm: th500: Merge hwpm-th500 files in hwpm
This patch carefully merges approved TH500 files from kernel/hwpm-next
into this public repo.

Bug 4266701

Signed-off-by: Vishal Aslot <vaslot@nvidia.com>
Change-Id: Ia869b75e1652c214e32c53f0edb3d4bf709d72f4
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/2972033
Reviewed-by: Vasuki Shankar <vasukis@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2023-09-21 21:16:39 -07:00
vasukis
bbe13a4fa2 tegra: hwpm: Add support for next3 chip
- This patch adds the support for next3 chip in the hwpm kernel repo.
- Add NULL check for fake registers before read/write operations.
- On simulation platform, HWPM allocates memory to simulate perfmux and
perfmon address spaces. Update IP instance mask logic to assume perfmux
is available.

Jira THWPM-87
Jira THWPM-88

Change-Id: I6cdc882025d29268452c18b91873f4570f0d3462
Signed-off-by: vasukis <vasukis@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/2924799
Reviewed-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-by: Adeel Raza <araza@nvidia.com>
Tested-by: Vedashree Vidwans <vvidwans@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2023-08-25 11:15:27 -07:00
Vedashree Vidwans
8b861518c4 tegra: hwpm: update licenses for all files
Modify OS agnostic files in common, hal and include folder to use MIT
license. This will allow the files to be shared between different OSes.
Modify OS specific files in os/linux and uapi folders to add SPDX
identifier for GPLv2.

Jira THWPM-69

Change-Id: I4fef142354a46fc23b67616204ccf0712a99caec
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/2797453
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2023-02-08 03:16:24 -08:00
Vedashree Vidwans
5166c3ab71 tegra: hwpm: add clk-rst HALs, update HAL validation
- Make clock reset functions into HALs. This way we can control
clock-reset logic for any chip. Set clock-reset HAL pointers to
appropriate functions.
- Remove clock-reset function wrappers as these will not be required and
corresponding HAL pointers will be used.
- As clock reset init is defined as a HAL, modify probe logic to
initialize chip info before invoking any HALs.
- Move common/primary HAL validation logic to common code and implement
new HAL to validate chip specific HALs. This way we can ensure that HAL
pointers are set as expected.
- Keep only one definition for t234_hwpm_init_chip_info as t234 should
always be initialized and hence only single definition should be
available.
- Expected return value of 0 indicates success and any other value
(mostly negative in current logic) indicates error, compare function
returns with 0 to print error in tegra_hwpm_release().
- Since a build can support both ACPI and device tree, update
init_chip_info() to retrieve chip information from ACPI and device tree
in case of failure.

Jira THWPM-41
Bug 3583624

Change-Id: I03fefae0b3b0c8ce46d175d39e4fdbb45e2bb22f
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2789668
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Vasuki Shankar <vasukis@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/2797445
2022-12-11 14:50:01 -08:00
Vedashree Vidwans
913f1b0697 tegra: hwpm: add checks for PMA quiesce state
- Zeroing of PMA trigger registers is unnecessary. Remove corresponding
logic from HWPM teardown function.
- During device open, add a check for PMA/RTR status. This will ensure
that PMA/RTR are ready to start new profiling session. Device open will
fail if RTR and PMA enginestatus is not ready(idle).
- SOC HWPM driver disables and releases all reserved IPs before teardown
steps. Update teardown logic to zero out IP allowlist registers during
teardown.

Jira THWPM-41
Bug 3714516

Change-Id: Iede5a5ed9860e2a73c8e4a04aeedfc061458c793
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2776229
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/2797444
2022-12-11 14:49:56 -08:00
Vedashree Vidwans
7c1ae11f78 tegra: hwpm: move files to appropriate path
HWPM files are copied from the previous source in linux-nvidia repo
withgit history. Create folders and move files to obtain expected folder
structure.

Bug 3787076

Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
2022-10-05 16:05:20 -07:00