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da3bda1364
- HALs get_rtr_int_idx and get_ip_max_idx return the chip specific router index and number of IPs. This information is static for a chip and doesn't require any input. Hence, update the HAL definition to not require hwpm pointer as an argument. Update definition and references for these HALs. - Add new HAL to get PMA and RTR structure pointers. Implement and update other chip specific functions to use new HAL. - Add new timer macro to check a condition and timeout after given retries. Update necessary code to use new timer macro. - Correct validate_emc_config function to compute correct available mss channel mask based on fuse value. - Update tegra_hwpm_readl and tegra_hwpm_writel macros to assert error value. This way error checks are added at one spot and not sprinkled all over the driver code. - Update get_mem_bytes_put_ptr() and membuf_overflow_status() to return error as function return and accept arguments to return mem_head pointer and overflow status respectively. Add overflow status macros to use throughout driver. Update HAL definition and references accordingly. - conftest is only compiled for OOT config atm. Add OOT config check to include conftest header. Jira THWPM-109 Change-Id: I77d150e860fa344a1604d241e27718150fdb8647 Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/2982555 Reviewed-by: Adeel Raza <araza@nvidia.com> Reviewed-by: Vishal Aslot <vaslot@nvidia.com> GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
105 lines
3.8 KiB
C
105 lines
3.8 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef TEGRA_HWPM_LOG_H
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#define TEGRA_HWPM_LOG_H
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#ifdef __KERNEL__
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#include <linux/bits.h>
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#include <os/linux/log.h>
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#else
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#include <os/qnx/log.h>
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#endif
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#define TEGRA_SOC_HWPM_MODULE_NAME "tegra-soc-hwpm"
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enum tegra_soc_hwpm_log_type {
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TEGRA_HWPM_ERROR, /* Error prints */
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TEGRA_HWPM_DEBUG, /* Debug prints */
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};
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#define TEGRA_HWPM_DEFAULT_DBG_MASK (0)
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/* Primary info prints */
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#define hwpm_info BIT(0)
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/* Trace function execution */
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#define hwpm_fn BIT(1)
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/* Log register accesses */
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#define hwpm_register BIT(2)
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/* General verbose prints */
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#define hwpm_verbose BIT(3)
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/* Driver init specific verbose prints */
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#define hwpm_dbg_driver_init BIT(4)
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/* IP register specific verbose prints */
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#define hwpm_dbg_ip_register BIT(5)
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/* Device info specific verbose prints */
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#define hwpm_dbg_device_info BIT(6)
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/* Floorsweep info specific verbose prints */
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#define hwpm_dbg_floorsweep_info BIT(7)
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/* Resource info specific verbose prints */
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#define hwpm_dbg_resource_info BIT(8)
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/* Reserve resource specific verbose prints */
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#define hwpm_dbg_reserve_resource BIT(9)
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/* Release resource specific verbose prints */
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#define hwpm_dbg_release_resource BIT(10)
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/* Alloc PMA stream specific verbose prints */
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#define hwpm_dbg_alloc_pma_stream BIT(11)
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/* Bind operation specific verbose prints */
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#define hwpm_dbg_bind BIT(12)
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/* Allowlist specific verbose prints */
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#define hwpm_dbg_allowlist BIT(13)
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/* Regops specific verbose prints */
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#define hwpm_dbg_regops BIT(14)
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/* Get Put pointer specific verbose prints */
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#define hwpm_dbg_update_get_put BIT(15)
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/* Driver release specific verbose prints */
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#define hwpm_dbg_driver_release BIT(16)
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/* Kmem debug prints */
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#define hwpm_dbg_kmem BIT(17)
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#ifdef __KERNEL__
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#define tegra_hwpm_err(hwpm, fmt, arg...) \
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tegra_hwpm_err_impl(hwpm, __func__, __LINE__, fmt, ##arg)
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#define tegra_hwpm_dbg(hwpm, dbg_mask, fmt, arg...) \
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tegra_hwpm_dbg_impl(hwpm, dbg_mask, __func__, __LINE__, fmt, ##arg)
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#define tegra_hwpm_fn(hwpm, fmt, arg...) \
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tegra_hwpm_dbg_impl(hwpm, hwpm_fn, __func__, __LINE__, fmt, ##arg)
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#else
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#define tegra_hwpm_err(hwpm, fmt, arg...) \
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tegra_hwpm_err_impl(hwpm, fmt, ##arg)
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#define tegra_hwpm_dbg(hwpm, dbg_mask, fmt, arg...) \
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tegra_hwpm_dbg_impl(hwpm, dbg_mask, fmt, ##arg)
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#define tegra_hwpm_fn(hwpm, fmt, arg...) \
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tegra_hwpm_dbg_impl(hwpm, hwpm_fn, fmt, ##arg)
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#endif
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#define hwpm_assert_print(hwpm, cond, bail_out_code, fmt, arg...) \
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do { \
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if (!(cond)) { \
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tegra_hwpm_err(hwpm, fmt, ##arg); \
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bail_out_code; \
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} \
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} while (0)
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#endif /* TEGRA_HWPM_LOG_H */
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