mirror of
git://nv-tegra.nvidia.com/linux-hwpm.git
synced 2025-12-24 10:13:00 +03:00
4ecc672c3e
- Create tegra_hwpm_element_enable() instead of directly using perfmon_enable() HAL. This will allow us to expand tegra_hwpm_element_enable in future. - Update log messages in ip structure init code and floorsweep info function. - It is possible that IP instances and elements to have 0 start range address. So, modify check for available elements to use range end instead. - Use tegra_hwpm_fake_readl() and tegra_hwpm_fake_writel() macros instead of fake_readl() and fake_write() functions. That way we have similar implementation of IO functions and macros can be used across OSes. - Check that reserve perfmon function is invoked only for HWPM components. This check will be useful for expansion in types of components in the future. - Clean up and rearrange tegra_hwpm_regops_readl_impl() and tegra_hwpm_regops_writel_impl() to have designated code corresponding to the element type. - Currently, device open and release functions are incorrectly using clock enable/disable functions instead of using HALs. Correct open and close functions to use lock HALs. - Currently, tegra_hwpm_update_mem_bytes() doesn't validate mem_mgmt structure allocation before accessing mem_bytes_kernel pointer. This can lead to kernel crash. Update tegra_hwpm_update_mem_bytes() to return error if mem_mgmt structure s not allocated. Jira THWPM-74 Change-Id: Ia40bd51187e5ea08572dbee81e577dacf5fb66b6 Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com> (cherry picked from commit 411f07484d68dfde0d350a5c67f2748e876b11b8) Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/2888553 Reviewed-by: Adeel Raza <araza@nvidia.com> GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
90 lines
3.1 KiB
C
90 lines
3.1 KiB
C
/* SPDX-License-Identifier: MIT */
|
|
/*
|
|
* Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
|
*
|
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
|
* copy of this software and associated documentation files (the "Software"),
|
|
* to deal in the Software without restriction, including without limitation
|
|
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
|
* and/or sell copies of the Software, and to permit persons to whom the
|
|
* Software is furnished to do so, subject to the following conditions:
|
|
*
|
|
* The above copyright notice and this permission notice shall be included in
|
|
* all copies or substantial portions of the Software.
|
|
*
|
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
|
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
|
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
|
* DEALINGS IN THE SOFTWARE.
|
|
*/
|
|
|
|
#ifndef TEGRA_HWPM_IO_H
|
|
#define TEGRA_HWPM_IO_H
|
|
|
|
/**
|
|
* Sets a particular field value in input data.
|
|
*
|
|
* Uses mask to clear specific bit positions in curr_val. field_val
|
|
* is used to set the bits in curr_val to be returned.
|
|
* Note: Function does not perform any validation of input parameters.
|
|
*
|
|
* curr_val [in] Current input data value.
|
|
*
|
|
* mask [in] Mask of the bits to be updated.
|
|
*
|
|
* field_val [in] Value to change the mask bits to.
|
|
*
|
|
* Returns updated value.
|
|
*/
|
|
static inline u32 set_field(u32 curr_val, u32 mask, u32 field_val)
|
|
{
|
|
return ((curr_val & ~mask) | field_val);
|
|
}
|
|
|
|
/**
|
|
* Retrieve value of specific bits from input data.
|
|
* Note: Function does not perform any validation of input parameters.
|
|
*
|
|
* input_data [in] Data to retrieve value from.
|
|
*
|
|
* mask [in] Mask of the bits to get value from.
|
|
*
|
|
* Return value from input_data corresponding to mask bits.
|
|
*/
|
|
static inline u32 get_field(u32 input_data, u32 mask)
|
|
{
|
|
return (input_data & mask);
|
|
}
|
|
|
|
#ifdef __KERNEL__
|
|
#include <os/linux/io_utils.h>
|
|
#else
|
|
#include <os/qnx/io_utils.h>
|
|
#endif
|
|
|
|
#define tegra_hwpm_read_sticky_bits(hwpm, reg_base, reg_offset, val) \
|
|
tegra_hwpm_read_sticky_bits_impl(hwpm, reg_base, reg_offset, val)
|
|
|
|
#define tegra_hwpm_fake_readl(hwpm, aperture, addr, val) \
|
|
tegra_hwpm_fake_readl_impl(hwpm, aperture, addr, val)
|
|
|
|
#define tegra_hwpm_fake_writel(hwpm, aperture, addr, val) \
|
|
tegra_hwpm_fake_writel_impl(hwpm, aperture, addr, val)
|
|
|
|
#define tegra_hwpm_readl(hwpm, aperture, addr, val) \
|
|
tegra_hwpm_readl_impl(hwpm, aperture, addr, val)
|
|
|
|
#define tegra_hwpm_writel(hwpm, aperture, addr, val) \
|
|
tegra_hwpm_writel_impl(hwpm, aperture, addr, val)
|
|
|
|
#define tegra_hwpm_regops_readl(hwpm, ip_inst, aperture, addr, val) \
|
|
tegra_hwpm_regops_readl_impl(hwpm, ip_inst, aperture, addr, val)
|
|
|
|
#define tegra_hwpm_regops_writel(hwpm, ip_inst, aperture, addr, val) \
|
|
tegra_hwpm_regops_writel_impl(hwpm, ip_inst, aperture, addr, val)
|
|
|
|
#endif /* TEGRA_HWPM_IO_H */
|