mirror of
git://nv-tegra.nvidia.com/linux-hwpm.git
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5166c3ab71
- Make clock reset functions into HALs. This way we can control clock-reset logic for any chip. Set clock-reset HAL pointers to appropriate functions. - Remove clock-reset function wrappers as these will not be required and corresponding HAL pointers will be used. - As clock reset init is defined as a HAL, modify probe logic to initialize chip info before invoking any HALs. - Move common/primary HAL validation logic to common code and implement new HAL to validate chip specific HALs. This way we can ensure that HAL pointers are set as expected. - Keep only one definition for t234_hwpm_init_chip_info as t234 should always be initialized and hence only single definition should be available. - Expected return value of 0 indicates success and any other value (mostly negative in current logic) indicates error, compare function returns with 0 to print error in tegra_hwpm_release(). - Since a build can support both ACPI and device tree, update init_chip_info() to retrieve chip information from ACPI and device tree in case of failure. Jira THWPM-41 Bug 3583624 Change-Id: I03fefae0b3b0c8ce46d175d39e4fdbb45e2bb22f Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2789668 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com> Reviewed-by: Vasuki Shankar <vasukis@nvidia.com> Reviewed-by: Seema Khowala <seemaj@nvidia.com> GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/2797445
89 lines
3.6 KiB
C
89 lines
3.6 KiB
C
/*
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* Copyright (c) 2021-2022, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#ifndef TEGRA_HWPM_COMMON_H
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#define TEGRA_HWPM_COMMON_H
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#include <tegra_hwpm_types.h>
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enum tegra_hwpm_funcs;
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enum hwpm_aperture_type;
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enum tegra_hwpm_element_type;
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struct tegra_hwpm_func_args;
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struct tegra_hwpm_ip_ops;
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struct tegra_soc_hwpm;
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struct hwpm_ip;
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struct hwpm_ip_inst;
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struct hwpm_ip_aperture;
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int tegra_hwpm_init_sw_components(struct tegra_soc_hwpm *hwpm,
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u32 chip_id, u32 chip_id_rev);
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int tegra_hwpm_func_all_ip(struct tegra_soc_hwpm *hwpm,
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struct tegra_hwpm_func_args *func_args,
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enum tegra_hwpm_funcs iia_func);
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int tegra_hwpm_func_single_ip(struct tegra_soc_hwpm *hwpm,
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struct tegra_hwpm_func_args *func_args,
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enum tegra_hwpm_funcs iia_func, u32 ip_idx);
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bool tegra_hwpm_aperture_for_address(struct tegra_soc_hwpm *hwpm,
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enum tegra_hwpm_funcs iia_func,
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u64 find_addr, u32 *ip_idx, u32 *inst_idx, u32 *element_idx,
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enum tegra_hwpm_element_type *element_type);
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int tegra_hwpm_perfmux_disable(struct tegra_soc_hwpm *hwpm,
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struct hwpm_ip_aperture *perfmux);
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int tegra_hwpm_reserve_rtr(struct tegra_soc_hwpm *hwpm);
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int tegra_hwpm_release_rtr(struct tegra_soc_hwpm *hwpm);
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int tegra_hwpm_reserve_resource(struct tegra_soc_hwpm *hwpm, u32 resource);
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int tegra_hwpm_release_resources(struct tegra_soc_hwpm *hwpm);
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int tegra_hwpm_bind_resources(struct tegra_soc_hwpm *hwpm);
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int tegra_hwpm_element_reserve(struct tegra_soc_hwpm *hwpm,
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struct hwpm_ip_inst *ip_inst, struct hwpm_ip_aperture *perfmon);
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int tegra_hwpm_element_release(struct tegra_soc_hwpm *hwpm,
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struct hwpm_ip_aperture *perfmon);
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int tegra_hwpm_set_fs_info_ip_ops(struct tegra_soc_hwpm *hwpm,
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struct tegra_hwpm_ip_ops *ip_ops,
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u64 base_address, u32 ip_idx, bool available);
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int tegra_hwpm_get_fs_info(struct tegra_soc_hwpm *hwpm,
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u32 ip_enum, u64 *fs_mask, u8 *ip_status);
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int tegra_hwpm_get_resource_info(struct tegra_soc_hwpm *hwpm,
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u32 resource_enum, u8 *status);
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int tegra_hwpm_finalize_chip_info(struct tegra_soc_hwpm *hwpm);
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int tegra_hwpm_ip_handle_power_mgmt(struct tegra_soc_hwpm *hwpm,
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struct hwpm_ip_inst *ip_inst, bool disable);
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int tegra_hwpm_alloc_alist_map(struct tegra_soc_hwpm *hwpm);
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int tegra_hwpm_get_allowlist_size(struct tegra_soc_hwpm *hwpm);
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int tegra_hwpm_combine_alist(struct tegra_soc_hwpm *hwpm, u64 *alist);
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size_t tegra_hwpm_get_alist_buf_size(struct tegra_soc_hwpm *hwpm);
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int tegra_hwpm_zero_alist_regs(struct tegra_soc_hwpm *hwpm,
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struct hwpm_ip_inst *ip_inst, struct hwpm_ip_aperture *aperture);
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int tegra_hwpm_copy_alist(struct tegra_soc_hwpm *hwpm,
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struct hwpm_ip_aperture *aperture, u64 *full_alist,
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u64 *full_alist_idx);
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bool tegra_hwpm_check_alist(struct tegra_soc_hwpm *hwpm,
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struct hwpm_ip_aperture *aperture, u64 phys_addr);
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bool tegra_hwpm_validate_primary_hals(struct tegra_soc_hwpm *hwpm);
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int tegra_hwpm_setup_hw(struct tegra_soc_hwpm *hwpm);
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int tegra_hwpm_setup_sw(struct tegra_soc_hwpm *hwpm);
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int tegra_hwpm_disable_triggers(struct tegra_soc_hwpm *hwpm);
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int tegra_hwpm_check_status(struct tegra_soc_hwpm *hwpm);
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int tegra_hwpm_release_hw(struct tegra_soc_hwpm *hwpm);
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void tegra_hwpm_release_sw_setup(struct tegra_soc_hwpm *hwpm);
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#endif /* TEGRA_HWPM_COMMON_H */
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