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HWPM driver verifies available IP instance elements and updates corresponding element floorsweep mask in the IP structures. Availability of the elements is done by reading one perfmux register corresponding to the element. Since PMA and RTR perfmuxes belong to the HWPM device, these apertures need to be MMIO mapped to be accessed. Since PMA/RTR perfmuxes are MMIO mapped at reservation, the availabilty verification fails to read perfmux registers. This triggers incorrect updates for PMA element fs mask. PMA/RTR have pre-defined/pre-initialized element_fs_masks. Hence, verifying element availabilty for PMA/RTR should be skipped. This change fixes the issue of PMA marked as invalid. Bug 3682605 Change-Id: Ib78fde73a1321095315b735b987fe8e2a9aaf474 Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2743130 Reviewed-by: svcacv <svcacv@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com> Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com> Reviewed-by: Vasuki Shankar <vasukis@nvidia.com> Reviewed-by: Adeel Raza <araza@nvidia.com> GVS: Gerrit_Virtual_Submit