mirror of
git://nv-tegra.nvidia.com/linux-hwpm.git
synced 2025-12-23 09:46:59 +03:00
26bd5451c2
- Modify the OS common code to be used by HWPM resource manager in QNX. - Add dev_name and fd fields in IP files - Typecast variables to unsigned long long where ever they are printed with %llx. Jira THWPM-54 Change-Id: Ie3696f5dab03dddf30ae6939525ef8f999260d5d Signed-off-by: vasukis <vasukis@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/2901186 Reviewed-by: Vedashree Vidwans <vvidwans@nvidia.com> Reviewed-by: Seema Khowala <seemaj@nvidia.com> GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
96 lines
4.1 KiB
C
96 lines
4.1 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef TEGRA_HWPM_COMMON_H
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#define TEGRA_HWPM_COMMON_H
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#include <tegra_hwpm_types.h>
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enum tegra_hwpm_funcs;
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enum hwpm_aperture_type;
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enum tegra_hwpm_element_type;
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struct tegra_hwpm_func_args;
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struct tegra_hwpm_ip_ops;
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struct tegra_soc_hwpm;
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struct hwpm_ip;
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struct hwpm_ip_inst;
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struct hwpm_ip_aperture;
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int tegra_hwpm_init_sw_components(struct tegra_soc_hwpm *hwpm,
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u32 chip_id, u32 chip_id_rev);
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int tegra_hwpm_func_all_ip(struct tegra_soc_hwpm *hwpm,
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struct tegra_hwpm_func_args *func_args,
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enum tegra_hwpm_funcs iia_func);
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int tegra_hwpm_func_single_ip(struct tegra_soc_hwpm *hwpm,
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struct tegra_hwpm_func_args *func_args,
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enum tegra_hwpm_funcs iia_func, u32 ip_idx);
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bool tegra_hwpm_aperture_for_address(struct tegra_soc_hwpm *hwpm,
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enum tegra_hwpm_funcs iia_func,
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u64 find_addr, u32 *ip_idx, u32 *inst_idx, u32 *element_idx,
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enum tegra_hwpm_element_type *element_type);
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int tegra_hwpm_perfmux_disable(struct tegra_soc_hwpm *hwpm,
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struct hwpm_ip_aperture *perfmux);
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int tegra_hwpm_reserve_rtr(struct tegra_soc_hwpm *hwpm);
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int tegra_hwpm_release_rtr(struct tegra_soc_hwpm *hwpm);
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int tegra_hwpm_reserve_resource(struct tegra_soc_hwpm *hwpm, u32 resource);
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int tegra_hwpm_release_resources(struct tegra_soc_hwpm *hwpm);
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int tegra_hwpm_bind_resources(struct tegra_soc_hwpm *hwpm);
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int tegra_hwpm_set_fs_info_ip_ops(struct tegra_soc_hwpm *hwpm,
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struct tegra_hwpm_ip_ops *ip_ops,
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u64 base_address, u32 ip_idx, bool available);
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int tegra_hwpm_get_fs_info(struct tegra_soc_hwpm *hwpm,
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u32 ip_enum, u64 *fs_mask, u8 *ip_status);
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int tegra_hwpm_get_resource_info(struct tegra_soc_hwpm *hwpm,
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u32 resource_enum, u8 *status);
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int tegra_hwpm_finalize_chip_info(struct tegra_soc_hwpm *hwpm);
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int tegra_hwpm_ip_handle_power_mgmt(struct tegra_soc_hwpm *hwpm,
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struct hwpm_ip_inst *ip_inst, bool disable);
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int tegra_hwpm_alloc_alist_map(struct tegra_soc_hwpm *hwpm);
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int tegra_hwpm_get_allowlist_size(struct tegra_soc_hwpm *hwpm);
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int tegra_hwpm_combine_alist(struct tegra_soc_hwpm *hwpm, u64 *alist);
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size_t tegra_hwpm_get_alist_buf_size(struct tegra_soc_hwpm *hwpm);
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int tegra_hwpm_zero_alist_regs(struct tegra_soc_hwpm *hwpm,
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struct hwpm_ip_inst *ip_inst, struct hwpm_ip_aperture *aperture);
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int tegra_hwpm_copy_alist(struct tegra_soc_hwpm *hwpm,
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struct hwpm_ip_aperture *aperture, u64 *full_alist,
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u64 *full_alist_idx);
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bool tegra_hwpm_check_alist(struct tegra_soc_hwpm *hwpm,
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struct hwpm_ip_aperture *aperture, u64 phys_addr);
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bool tegra_hwpm_validate_primary_hals(struct tegra_soc_hwpm *hwpm);
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int tegra_hwpm_setup_hw(struct tegra_soc_hwpm *hwpm);
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int tegra_hwpm_setup_sw(struct tegra_soc_hwpm *hwpm);
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int tegra_hwpm_disable_triggers(struct tegra_soc_hwpm *hwpm);
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int tegra_hwpm_check_status(struct tegra_soc_hwpm *hwpm);
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int tegra_hwpm_release_hw(struct tegra_soc_hwpm *hwpm);
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void tegra_hwpm_release_sw_setup(struct tegra_soc_hwpm *hwpm);
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int tegra_hwpm_update_ip_inst_fs_mask(struct tegra_soc_hwpm *hwpm,
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u32 ip_idx, u32 a_type, u32 inst_idx, bool available);
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#endif /* TEGRA_HWPM_COMMON_H */
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