mirror of
git://nv-tegra.nvidia.com/linux-hwpm.git
synced 2025-12-25 02:34:23 +03:00
Introduced macros to define HWPM aperture types perfmon, perfmux and
broadcast.
Added new enum to define element type.
IP perfmux and IP broadcast are handled in similar way. Whereas, HWPM
perfmux should use HWPM perfmon functions.
Updated hwpm structures are as below
Parent HWPM structure
-> Active chip structure
-> Array of IPs
-> HALs
IP structure
-> Array of instances
-> Array of instance info with respect to perfmon, perfmux, broadcast
-> Instance mask : indicates available instances
-> reserved status
Instance structure
-> Array of element info with respect to perfmon, perfmux, broadcast
-> Array of corresponding element structures
-> Element mask : indicates available elements in the instance
Element structure
-> Aperture address details
-> DT node / MMIO details
Update all functions to use new HWPM structures.
Update hwpm_probe to include force IP enable step.
Jira THWPM-41
Change-Id: I9461063d2136b34e841322c4ddd77a20486424c6
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2706489
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Vasuki Shankar <vasukis@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit
87 lines
3.4 KiB
C
87 lines
3.4 KiB
C
/*
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* Copyright (c) 2021-2022, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#ifndef TEGRA_HWPM_COMMON_H
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#define TEGRA_HWPM_COMMON_H
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enum tegra_hwpm_funcs;
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enum hwpm_aperture_type;
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enum tegra_hwpm_element_type;
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struct tegra_hwpm_func_args;
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struct tegra_soc_hwpm;
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struct tegra_soc_hwpm_exec_reg_ops;
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struct tegra_soc_hwpm_ip_floorsweep_info;
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struct tegra_soc_hwpm_alloc_pma_stream;
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struct tegra_soc_hwpm_update_get_put;
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struct hwpm_ip;
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struct tegra_soc_hwpm_ip_ops;
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struct hwpm_ip_inst;
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struct hwpm_ip_aperture;
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int tegra_hwpm_init_sw_components(struct tegra_soc_hwpm *hwpm);
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void tegra_hwpm_release_sw_components(struct tegra_soc_hwpm *hwpm);
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int tegra_hwpm_func_all_ip(struct tegra_soc_hwpm *hwpm,
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struct tegra_hwpm_func_args *func_args,
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enum tegra_hwpm_funcs iia_func);
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int tegra_hwpm_func_single_ip(struct tegra_soc_hwpm *hwpm,
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struct tegra_hwpm_func_args *func_args,
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enum tegra_hwpm_funcs iia_func, u32 ip_idx);
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bool tegra_hwpm_aperture_for_address(struct tegra_soc_hwpm *hwpm,
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enum tegra_hwpm_funcs iia_func,
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u64 find_addr, u32 *ip_idx, u32 *inst_idx, u32 *element_idx,
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enum tegra_hwpm_element_type *element_type);
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int tegra_hwpm_reserve_resource(struct tegra_soc_hwpm *hwpm, u32 resource);
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int tegra_hwpm_release_resources(struct tegra_soc_hwpm *hwpm);
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int tegra_hwpm_bind_resources(struct tegra_soc_hwpm *hwpm);
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int tegra_hwpm_reserve_rtr(struct tegra_soc_hwpm *hwpm);
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int tegra_hwpm_release_rtr(struct tegra_soc_hwpm *hwpm);
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int tegra_hwpm_element_reserve(struct tegra_soc_hwpm *hwpm,
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struct hwpm_ip_inst *ip_inst, struct hwpm_ip_aperture *perfmon);
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int tegra_hwpm_element_release(struct tegra_soc_hwpm *hwpm,
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struct hwpm_ip_aperture *perfmon);
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int tegra_hwpm_set_fs_info_ip_ops(struct tegra_soc_hwpm *hwpm,
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struct tegra_soc_hwpm_ip_ops *hwpm_ip_ops,
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u64 base_address, u32 ip_idx, bool available);
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int tegra_hwpm_finalize_chip_info(struct tegra_soc_hwpm *hwpm);
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int tegra_hwpm_ip_handle_power_mgmt(struct tegra_soc_hwpm *hwpm,
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struct hwpm_ip_inst *ip_inst, bool disable);
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int tegra_hwpm_get_allowlist_size(struct tegra_soc_hwpm *hwpm);
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int tegra_hwpm_update_allowlist(struct tegra_soc_hwpm *hwpm,
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void *ioctl_struct);
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int tegra_hwpm_exec_regops(struct tegra_soc_hwpm *hwpm,
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struct tegra_soc_hwpm_exec_reg_ops *exec_reg_ops);
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int tegra_hwpm_setup_hw(struct tegra_soc_hwpm *hwpm);
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int tegra_hwpm_setup_sw(struct tegra_soc_hwpm *hwpm);
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int tegra_hwpm_disable_triggers(struct tegra_soc_hwpm *hwpm);
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int tegra_hwpm_release_hw(struct tegra_soc_hwpm *hwpm);
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void tegra_hwpm_release_sw_setup(struct tegra_soc_hwpm *hwpm);
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int tegra_hwpm_get_floorsweep_info(struct tegra_soc_hwpm *hwpm,
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struct tegra_soc_hwpm_ip_floorsweep_info *fs_info);
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int tegra_hwpm_map_stream_buffer(struct tegra_soc_hwpm *hwpm,
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struct tegra_soc_hwpm_alloc_pma_stream *alloc_pma_stream);
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int tegra_hwpm_clear_mem_pipeline(struct tegra_soc_hwpm *hwpm);
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int tegra_hwpm_update_mem_bytes(struct tegra_soc_hwpm *hwpm,
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struct tegra_soc_hwpm_update_get_put *update_get_put);
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#endif /* TEGRA_HWPM_COMMON_H */
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