Files
linux-hwpm/drivers/tegra/hwpm/include/tegra_hwpm_log.h
Vishal Aslot cdbd6e7a24 tegra: hwpm: th500: fixes and reorg of IPs
This patch fixes issues found during testing
and guidance provided by devtools. The following
is changed in this patch:

1. mcf_iobhx and mcf_ocu are merged into a single mcf_soc IP.
2a. c2c is changed from 2 instances to 1.
2b. Remove C2CS0/1 which are the broadcast apertures.
    Also remove the allowlist offset specific to broadcast
    aperture.
3. mss_hub is changed from 1 instance to 8.
4. mss_channel is changed from 1 instance to 32.
5. mc0 perfmux is added to mcf_clink.
6. mcf_core is changed from 1 instance to 8.
7. License headers updated where necessary.
8. c2c allowlist updated to have just the offsets common
   to all links.
9. Added a verbose comment explaining the design of
   th500_hwpm_force_enable_ips()
10. Added back validate_current_config module parameter
    as many systems still don't support fuses.
11. If all F's are read back for a regop in ip_readl(),
    return -ENODEV.

There is a corresponding patch to update the python scripts
that generated many of the C and header files.

Bug 4287384

Change-Id: I8e14b0165dfa1abb9f5e04de577a41f0eb278246
Signed-off-by: Vishal Aslot <vaslot@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/3134365
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Eric Lu <ericlu@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
2024-09-02 21:52:45 -07:00

117 lines
4.4 KiB
C

/* SPDX-License-Identifier: MIT */
/*
* SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#ifndef TEGRA_HWPM_LOG_H
#define TEGRA_HWPM_LOG_H
#ifdef __KERNEL__
#include <linux/bits.h>
#include <os/linux/log.h>
#else
#include <os/qnx/log.h>
#endif
#define TEGRA_SOC_HWPM_MODULE_NAME "tegra-soc-hwpm"
enum tegra_soc_hwpm_log_type {
TEGRA_HWPM_ERROR, /* Error prints */
TEGRA_HWPM_DEBUG, /* Debug prints */
};
#define TEGRA_HWPM_DEFAULT_DBG_MASK (0)
/* Primary info prints */
#define hwpm_info BIT(0)
/* Trace function execution */
#define hwpm_fn BIT(1)
/* Log register accesses */
#define hwpm_register BIT(2)
/* General verbose prints */
#define hwpm_verbose BIT(3)
/* Driver init specific verbose prints */
#define hwpm_dbg_driver_init BIT(4)
/* IP register specific verbose prints */
#define hwpm_dbg_ip_register BIT(5)
/* Device info specific verbose prints */
#define hwpm_dbg_device_info BIT(6)
/* Floorsweep info specific verbose prints */
#define hwpm_dbg_floorsweep_info BIT(7)
/* Resource info specific verbose prints */
#define hwpm_dbg_resource_info BIT(8)
/* Reserve resource specific verbose prints */
#define hwpm_dbg_reserve_resource BIT(9)
/* Release resource specific verbose prints */
#define hwpm_dbg_release_resource BIT(10)
/* Alloc PMA stream specific verbose prints */
#define hwpm_dbg_alloc_pma_stream BIT(11)
/* Bind operation specific verbose prints */
#define hwpm_dbg_bind BIT(12)
/* Allowlist specific verbose prints */
#define hwpm_dbg_allowlist BIT(13)
/* Regops specific verbose prints */
#define hwpm_dbg_regops BIT(14)
/* Get Put pointer specific verbose prints */
#define hwpm_dbg_update_get_put BIT(15)
/* Driver release specific verbose prints */
#define hwpm_dbg_driver_release BIT(16)
/* Kmem debug prints */
#define hwpm_dbg_kmem BIT(17)
/* Active debug prints */
#define hwpm_dbg_active BIT(18)
/* All debug bits */
#define hwpm_dbg_all_bits \
(hwpm_info | hwpm_fn | hwpm_register | hwpm_verbose | \
hwpm_dbg_driver_init | hwpm_dbg_ip_register | hwpm_dbg_device_info | \
hwpm_dbg_floorsweep_info | hwpm_dbg_resource_info | \
hwpm_dbg_reserve_resource | hwpm_dbg_release_resource | \
hwpm_dbg_alloc_pma_stream | hwpm_dbg_bind | hwpm_dbg_allowlist | \
hwpm_dbg_regops | hwpm_dbg_update_get_put | hwpm_dbg_driver_release | \
hwpm_dbg_kmem | hwpm_dbg_active)
#ifdef __KERNEL__
#define tegra_hwpm_err(hwpm, fmt, arg...) \
tegra_hwpm_err_impl(hwpm, __func__, __LINE__, fmt, ##arg)
#define tegra_hwpm_dbg(hwpm, dbg_mask, fmt, arg...) \
tegra_hwpm_dbg_impl(hwpm, dbg_mask, __func__, __LINE__, fmt, ##arg)
#define tegra_hwpm_fn(hwpm, fmt, arg...) \
tegra_hwpm_dbg_impl(hwpm, hwpm_fn, __func__, __LINE__, fmt, ##arg)
#else
#define tegra_hwpm_err(hwpm, fmt, arg...) \
tegra_hwpm_err_impl(hwpm, fmt, ##arg)
#define tegra_hwpm_dbg(hwpm, dbg_mask, fmt, arg...) \
tegra_hwpm_dbg_impl(hwpm, dbg_mask, fmt, ##arg)
#define tegra_hwpm_fn(hwpm, fmt, arg...) \
tegra_hwpm_dbg_impl(hwpm, hwpm_fn, fmt, ##arg)
#endif
#define hwpm_assert_print(hwpm, cond, bail_out_code, fmt, arg...) \
do { \
if (!(cond)) { \
tegra_hwpm_err(hwpm, fmt, ##arg); \
bail_out_code; \
} \
} while (0)
#endif /* TEGRA_HWPM_LOG_H */