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da3bda1364
- HALs get_rtr_int_idx and get_ip_max_idx return the chip specific router index and number of IPs. This information is static for a chip and doesn't require any input. Hence, update the HAL definition to not require hwpm pointer as an argument. Update definition and references for these HALs. - Add new HAL to get PMA and RTR structure pointers. Implement and update other chip specific functions to use new HAL. - Add new timer macro to check a condition and timeout after given retries. Update necessary code to use new timer macro. - Correct validate_emc_config function to compute correct available mss channel mask based on fuse value. - Update tegra_hwpm_readl and tegra_hwpm_writel macros to assert error value. This way error checks are added at one spot and not sprinkled all over the driver code. - Update get_mem_bytes_put_ptr() and membuf_overflow_status() to return error as function return and accept arguments to return mem_head pointer and overflow status respectively. Add overflow status macros to use throughout driver. Update HAL definition and references accordingly. - conftest is only compiled for OOT config atm. Add OOT config check to include conftest header. Jira THWPM-109 Change-Id: I77d150e860fa344a1604d241e27718150fdb8647 Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/2982555 Reviewed-by: Adeel Raza <araza@nvidia.com> Reviewed-by: Vishal Aslot <vaslot@nvidia.com> GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
137 lines
3.7 KiB
C
137 lines
3.7 KiB
C
// SPDX-License-Identifier: MIT
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/*
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* SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <tegra_hwpm_log.h>
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#include <tegra_hwpm.h>
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#include <tegra_hwpm_common.h>
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#include <tegra_hwpm_static_analysis.h>
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int tegra_hwpm_perfmux_disable(struct tegra_soc_hwpm *hwpm,
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struct hwpm_ip_aperture *perfmux)
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{
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tegra_hwpm_fn(hwpm, " ");
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return 0;
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}
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int tegra_hwpm_reserve_rtr(struct tegra_soc_hwpm *hwpm)
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{
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int err = 0;
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struct tegra_soc_hwpm_chip *active_chip = hwpm->active_chip;
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tegra_hwpm_fn(hwpm, " ");
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err = tegra_hwpm_func_single_ip(hwpm, NULL,
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TEGRA_HWPM_RESERVE_GIVEN_RESOURCE,
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active_chip->get_rtr_int_idx());
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if (err != 0) {
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tegra_hwpm_err(hwpm, "failed to reserve IP %d",
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active_chip->get_rtr_int_idx());
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return err;
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}
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return err;
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}
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int tegra_hwpm_release_rtr(struct tegra_soc_hwpm *hwpm)
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{
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int err = 0;
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struct tegra_soc_hwpm_chip *active_chip = hwpm->active_chip;
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tegra_hwpm_fn(hwpm, " ");
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err = tegra_hwpm_func_single_ip(hwpm, NULL,
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TEGRA_HWPM_RELEASE_ROUTER,
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active_chip->get_rtr_int_idx());
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if (err != 0) {
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tegra_hwpm_err(hwpm, "failed to release IP %d",
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active_chip->get_rtr_int_idx());
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return err;
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}
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return err;
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}
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int tegra_hwpm_reserve_resource(struct tegra_soc_hwpm *hwpm, u32 resource)
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{
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struct tegra_soc_hwpm_chip *active_chip = hwpm->active_chip;
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u32 ip_idx = TEGRA_HWPM_IP_INACTIVE;
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int err = 0;
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tegra_hwpm_fn(hwpm, " ");
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tegra_hwpm_dbg(hwpm, hwpm_info,
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"User requesting to reserve resource %d", resource);
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/* Translate resource to ip_idx */
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if (!active_chip->is_resource_active(hwpm, resource, &ip_idx)) {
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tegra_hwpm_err(hwpm, "Requested resource %d is unavailable",
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resource);
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return -EINVAL;
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}
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err = tegra_hwpm_func_single_ip(hwpm, NULL,
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TEGRA_HWPM_RESERVE_GIVEN_RESOURCE, ip_idx);
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if (err != 0) {
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tegra_hwpm_err(hwpm, "failed to reserve IP %d", ip_idx);
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return err;
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}
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return 0;
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}
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int tegra_hwpm_bind_resources(struct tegra_soc_hwpm *hwpm)
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{
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int err = 0;
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tegra_hwpm_fn(hwpm, " ");
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err = tegra_hwpm_func_all_ip(hwpm, NULL, TEGRA_HWPM_BIND_RESOURCES);
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if (err != 0) {
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tegra_hwpm_err(hwpm, "failed to bind resources");
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return err;
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}
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return err;
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}
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int tegra_hwpm_release_resources(struct tegra_soc_hwpm *hwpm)
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{
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int ret = 0;
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tegra_hwpm_fn(hwpm, " ");
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ret = tegra_hwpm_func_all_ip(hwpm, NULL, TEGRA_HWPM_UNBIND_RESOURCES);
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if (ret != 0) {
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tegra_hwpm_err(hwpm, "failed to release resources");
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return ret;
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}
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ret = tegra_hwpm_func_all_ip(hwpm, NULL, TEGRA_HWPM_RELEASE_RESOURCES);
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if (ret != 0) {
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tegra_hwpm_err(hwpm, "failed to release resources");
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return ret;
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}
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return 0;
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}
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