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425b5f92ae
Add IOCTL infra for Cross trigger programming in HWPM Driver. Cross Triggering involves the access to secure register, which cannot be issued by user space application. Hence, implement cross trigger functionality in HWPM kernel driver. Bug 4571175 Signed-off-by: vasukis <vasukis@nvidia.com> Change-Id: Ia46227c4678d3ee282ebae8c58e116feaf4e59cb Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/3147289 Reviewed-by: Seema Khowala <seemaj@nvidia.com> GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
33 lines
1.3 KiB
C
33 lines
1.3 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* SPDX-FileCopyrightText: Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef TEGRA_HWPM_OS_LINUX_REGOPS_UTILS_H
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#define TEGRA_HWPM_OS_LINUX_REGOPS_UTILS_H
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struct tegra_soc_hwpm;
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struct tegra_soc_hwpm_exec_reg_ops;
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struct tegra_soc_hwpm_exec_credit_program;
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struct tegra_soc_hwpm_setup_trigger;
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int tegra_hwpm_exec_regops(struct tegra_soc_hwpm *hwpm,
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struct tegra_soc_hwpm_exec_reg_ops *exec_reg_ops);
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int tegra_hwpm_credit_program(struct tegra_soc_hwpm *hwpm,
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struct tegra_soc_hwpm_exec_credit_program *credit_prog);
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int tegra_hwpm_setup_trigger(struct tegra_soc_hwpm *hwpm,
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struct tegra_soc_hwpm_setup_trigger *setup_trigger);
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#endif /* TEGRA_HWPM_OS_LINUX_REGOPS_UTILS_H */
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