/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Copyright (c) 2016-2023, NVIDIA Corporation.  All rights reserved.
 */

#ifndef PVA_ERRORS_H
#define PVA_ERRORS_H

#include <pva-types.h>
/*
 * PVA Error codes that will be read from PVA_CCQ_STATUS3
 */
typedef uint16_t pva_errors_t;

/*
 * General and interface errors
 */
#define PVA_ERR_NO_ERROR 0x0U
#define PVA_ERR_BAD_CMD 0x1U
#define PVA_ERR_BAD_STATUS_ID 0x2U
#define PVA_ERR_BAD_QUEUE_ID 0x3U
#define PVA_ERR_BAD_PVE_ID 0x4U
#define PVA_ERR_BUFF_TOO_SMALL 0x5U
#define PVA_ERR_FEATURE_NOT_SUPPORTED 0x6U
#define PVA_ERR_QUEUE_NOT_SUSPENDED 0x7U
#define PVA_ERR_QUEUE_SUSPENDED 0x8U
#define PVA_ERR_BAD_ADDRESS 0x9U
#define PVA_ERR_BAD_THRESHOLD_ID 0xaU
#define PVA_ERR_BAD_ATTR_ID 0xbU
#define PVA_ERR_BAD_VMEM_ID 0xcU
#define PVA_ERR_BAD_TIME_VALUE 0xdU
#define PVA_ERR_BAD_SCHEDULER_ID 0xeU
#define PVA_ERR_BAD_SCHEDULER_ATTR 0xfU
#define PVA_ERR_BAD_STATUS_REG 0x10U
#define PVA_ERR_BAD_REGION_ID 0x11U
#define PVA_ERR_BAD_RESET_ID 0x12U
#define PVA_ERR_BAD_STAT_ID 0x13U
#define PVA_ERR_BAD_INSTANCE 0x14U
#define PVA_ERR_BAD_TASK 0x15U
#define PVA_ERR_BAD_TASK_ACTION_LIST 0x16U
#define PVA_ERR_BAD_TASK_STATE 0x17U
#define PVA_ERR_TASK_STATUS_MISMATCH 0x18U
#define PVA_ERR_BAD_TASK_OFFSET 0x19U
#define PVA_ERR_BAD_PARAMETERS 0x1aU
#define PVA_ERR_VALUE_MISMATCH 0x1bU
#define PVA_ERR_NO_VPU_HEADER 0x1cU
#define PVA_ERR_BAD_SURFACE_ARRAY 0x1dU
#define PVA_ERR_UNKNOWN_VPU_OP 0x1eU
#define PVA_ERR_BAD_VPU_OP_VER 0x1fU
#define PVA_ERR_UNKNOWN_R5_APP 0x20U
#define PVA_ERR_NO_R5_DATA 0x21U
#define PVA_ERR_NO_R5_HEADER 0x22U
#define PVA_ERR_PVE_TIMEOUT 0x23U
#define PVA_ERR_VPU_RESET 0x24U
#define PVA_ERR_VPU_ERROR_HALT 0x25U
#define PVA_ERR_VPU_ILLEGAL_INSTR 0x26U
#define PVA_ERR_VPU_DIVIDE_BY_0 0x27U
#define PVA_ERR_VPU_BAD_STATE 0x28U
#define PVA_ERR_VPU_DEBUG 0x29U
#define PVA_ERR_VPU_EXIT_ERROR 0x2aU
#define PVA_ERR_PPE_EXIT_ERROR 0x2bU
#define PVA_ERR_PVE_ABORT 0x2dU
#define PVA_ERR_BAD_OVERLAY_SEG 0x2eU
#define PVA_ERR_BAD_SEG_START 0x2fU
#define PVA_ERR_SEGMENTS_OVERLAP 0x30U
#define PVA_ERR_NO_VPU_DATA 0x31U
#define PVA_ERR_VPU_FP_NAN 0x32U
#define PVA_ERR_PPE_ILLEGAL_INSTR 0x33U
#define PVA_ERR_PPE_DIVIDE_BY_0 0x34U
#define PVA_ERR_PPE_FP_NAN 0x35U
#define PVA_ERR_PPE_ILLEGAL_DEBUG 0x36U
#define PVA_ERR_PPE_ILLEGAL_INSTR_ALIGN 0x37U
#define PVA_ERR_BAD_CACHED_DRAM_SEG 0x3aU
#define PVA_ERR_BAD_UNCACHED_DRAM_SEG 0x3bU
#define PVA_ERR_BAD_DRAM_IOVA 0x3cU
#define PVA_ERR_REG_MISMATCH 0x3dU
#define PVA_ERR_UNSUPPORTED_TNSR_TYPE 0x3eU
#define PVA_ERR_AISR_QUEUE_EMPTY 0x3fU
#define PVA_ERR_AISR_QUEUE_FULL 0x40U
#define PVA_ERR_BAD_L2SRAM_PARAMS 0x41U
#define PVA_ERR_BAD_TASK_PARAMS 0x42U

/*
 * DMA errors
 */
#define PVA_ERR_DMA_NO_BPP 0x200U
#define PVA_ERR_DMA_INVALID_WIDTH 0x201U
#define PVA_ERR_DMA_DATA_TOO_LARGE 0x202U
#define PVA_ERR_DMA_BPP_MISMATCH 0x203U
#define PVA_ERR_DMA_TRANSFER_TYPE_INVALID 0x204U
#define PVA_ERR_DMA_TILE_SIZE_MISMATCH 0x205U
#define PVA_ERR_DMA_SIZE_MISMATCH 0x206U
#define PVA_ERR_DMA_CHANNEL_TRANSFER 0x207U
#define PVA_ERR_BAD_DMA_DESC_ID 0x208U
#define PVA_ERR_BAD_DMA_CHANNEL_ID 0x209U
#define PVA_ERR_DMA_TOO_MANY_BUFFERS 0x20aU
#define PVA_ERR_DMA_TIMEOUT 0x20bU
#define PVA_ERR_DMA_INSUFFICIENT_SPACE 0x20cU
#define PVA_ERR_DMA_BAD_BLOCK_HEIGHT 0x20dU
#define PVA_ERR_DMA_BAD_LAYOUT 0x20eU
#define PVA_ERR_DMA_BAD_MEMORY 0x20fU
#define PVA_ERR_DMA_UNALIGNED_ADDR 0x210U
#define PVA_ERR_DMA_PRIV_ACCESS 0x211U
#define PVA_ERR_DMA_BAD_CALLBACK 0x212U
#define PVA_ERR_DMA_CALLBACK_REGISTERED 0x213U
#define PVA_ERR_DMA_CHAN_NOT_IN_USE 0x214U
#define PVA_ERR_DMA_INVALID_VDESC_FLAGS 0x215U
#define PVA_ERR_DMA_HWSEQ_BAD_PROGRAM 0x216U
#define PVA_ERR_DMA_HWSEQ_PROGRAM_TOO_LONG 0x217U
#define PVA_ERR_DMA_HWSEQ_FIELD_OVERFLOW 0x218U
#define PVA_ERR_DMA_HWSEQ_BAD_INDEX 0x219U
#define PVA_ERR_DMA_INVALID_CONFIG 0x220U
#define PVA_ERR_DMA_ERROR 0x221U
/*
 * MISR errors
 */
#define PVA_ERR_MISR_NOT_RUN 0x280U
#define PVA_ERR_MISR_NOT_DONE 0x281U
#define PVA_ERR_MISR_TIMEOUT 0x282U
#define PVA_ERR_MISR_ADDR 0x283U
#define PVA_ERR_MISR_DATA 0x284U
#define PVA_ERR_MISR_ADDR_DATA 0x285U

/*
 * VPU Errors
 */
#define PVA_ERR_VPU_DMA_TIMEOUT 0x300U
#define PVA_ERR_VPU_PARAMETER_MISMATCH 0x301U
#define PVA_ERR_VPU_BAD_VALUE 0x302U
#define PVA_ERR_VPU_DLUT_CFG 0x303U
#define PVA_ERR_VPU_DLUT_MISS 0x304U
#define PVA_ERR_VPU_CP_ACCESS 0x305U

/*
 * Fast reset errors
 */

#define PVA_ERR_FAST_RESET_R5_DMA_TIMEOUT 0x400U
#define PVA_ERR_FAST_RESET_TIMEOUT_VPU 0x401U
#define PVA_ERR_FAST_RESET_TIMEOUT_ICACHE1 0x402U
#define PVA_ERR_FAST_RESET_TIMEOUT_CH0 0x403U
#define PVA_ERR_FAST_RESET_TIMEOUT_CH1 0x404U
#define PVA_ERR_FAST_RESET_TIMEOUT_CH2 0x405U
#define PVA_ERR_FAST_RESET_TIMEOUT_CH3 0x406U
#define PVA_ERR_FAST_RESET_TIMEOUT_CH4 0x407U
#define PVA_ERR_FAST_RESET_TIMEOUT_CH5 0x408U
#define PVA_ERR_FAST_RESET_TIMEOUT_CH6 0x409U
#define PVA_ERR_FAST_RESET_TIMEOUT_CH7 0x410U
#define PVA_ERR_FAST_RESET_TIMEOUT_CH8 0x411U
#define PVA_ERR_FAST_RESET_TIMEOUT_CH9 0x412U
#define PVA_ERR_FAST_RESET_TIMEOUT_CH10 0x413U
#define PVA_ERR_FAST_RESET_TIMEOUT_CH11 0x414U
#define PVA_ERR_FAST_RESET_TIMEOUT_CH12 0x415U
#define PVA_ERR_FAST_RESET_TIMEOUT_CH13 0x416U
#define PVA_ERR_FAST_RESET_TIMEOUT_CH14 0x417U
#define PVA_ERR_FAST_RESET_TIMEOUT_CH15 0x418U
#define PVA_ERR_FAST_RESET_TIMEOUT_ICACHE2 0x419U

/*
 * R5 Application Errors
 */
#define PVA_ERR_R5_APP_ARGS 0x800U
#define PVA_ERR_R5_APP_COPY_NULL 0x801U
#define PVA_ERR_BAD_QUEUE_HANDLE 0x802U
#define PVA_ERR_QUEUE_EMPTY 0x803U
#define PVA_ERR_SYS_QUEUE_ERROR 0x804U
#define PVA_ERR_APP_WAKE_BREAK 0x805U
#define PVA_ERR_TASK_QUEUE_FULL 0x806U
#define PVA_ERR_APP_BAD_CALLBACK 0x807U
#define PVA_ERR_TASK_QUEUE_EMPTY 0x808U
#define PVA_ERR_VPU_RUNNING 0x809U
#define PVA_ERR_VPU_NOT_STARTED 0x80aU
#define PVA_ERR_VPU_BAD_CALLBACK 0x80bU
#define PVA_ERR_APP_ABORT 0x80cU
#define PVA_ERR_APP_ASSERT 0x80dU
#define PVA_ERR_APP_BAD_CONTEXT 0x80eU
#define PVA_ERR_INSUFFICIENT_MEMORY 0x80fU
#define PVA_ERR_INSUFFICIENT_FAST_MEMORY 0x810U
#define PVA_ERR_PARAMETER_MISMATCH 0x811U
#define PVA_ERR_ALLOC_FAILED 0x812U
#define PVA_ERR_FREE_FAILED 0x813U
#define PVA_ERR_SMMU_NOT_WORKING 0x814U

/*
 * Informational errors
 */
#define PVA_ERR_NO_PARM_ARRAY 0x995U
#define PVA_ERR_NOT_FOUND 0x996U
#define PVA_ERR_NO_TASK 0x997U
#define PVA_ERR_MINIMUM_LENGTH 0x998U
#define PVA_ERR_LENGTH_PROVIDED 0x999U
#define PVA_ERR_TRY_AGAIN 0x99AU

/* Never used */
#define PVA_ERR_MAX_ERR 0xFFFFU

#endif /* _PVA_ERRORS_H_ */
