fsicom: add fsicom multi core support

- smmu and hsp support added for fsicom multi core
  feature in fsicom kernel driver
- probe, suspend and resume will be called for smmu_inst
  0 only as it will have single dev node for comm.
- mailbox 2,5 and 1,4 is used for TX and RX comm. respectively
  with FSI

Jira SS-5744

Change-Id: I859d5945853195ba76996a8c36ca19efd9c4409f
Signed-off-by: pshaw <pshaw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2952268
Reviewed-by: Praveen James <pjames@nvidia.com>
Reviewed-by: Sumeet Gupta <sumeetg@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>

include/uapi/linux/tegra-fsicom.h

@@ -8,7 +8,10 @@
 
 #include <linux/ioctl.h>
 
+#define MAX_FSI_CORE 2
+
 struct rw_data {
+	uint8_t coreid;
 	uint32_t handle;
 	uint64_t pa;
 	uint64_t iova;
@@ -19,6 +22,7 @@ struct rw_data {
 
 /*Data type for sending the offset,IOVA and channel Id details to FSI */
 struct iova_data {
+	uint8_t coreid;
 	uint32_t offset;
 	uint32_t iova;
 	uint32_t chid;