From 029ade906d96888201c0de9395f52ff940beccec Mon Sep 17 00:00:00 2001 From: Jon Hunter Date: Wed, 15 Nov 2023 09:24:58 +0000 Subject: [PATCH] arm64: Remove Tegra194 device-tree Tegra194 is no longer supported and all testing has now been disabled, so remove the Tegra194 device-tree. Bug 4047365 Change-Id: Id6b65f6761652785e04cc850fd4b4ef6ed8cc20e Signed-off-by: Jon Hunter Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3017348 (cherry picked from commit e7020ca405fc419827ab517aee28643b4da70a7c) Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3029977 Reviewed-by: Brad Griffis GVS: Gerrit_Virtual_Submit --- arch/arm64/boot/dts/Makefile | 41 ----- arch/arm64/boot/dts/nvidia/Makefile | 9 - .../boot/dts/nvidia/tegra194-carveouts.dts | 29 ---- .../arm64/boot/dts/nvidia/tegra194-jetson.dts | 157 ------------------ ...tegra194-p3509-0000+p3668-0001-overlay.dts | 9 - 5 files changed, 245 deletions(-) delete mode 100644 arch/arm64/boot/dts/Makefile delete mode 100644 arch/arm64/boot/dts/nvidia/Makefile delete mode 100644 arch/arm64/boot/dts/nvidia/tegra194-carveouts.dts delete mode 100644 arch/arm64/boot/dts/nvidia/tegra194-jetson.dts delete mode 100644 arch/arm64/boot/dts/nvidia/tegra194-p3509-0000+p3668-0001-overlay.dts diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile deleted file mode 100644 index 14852a5d..00000000 --- a/arch/arm64/boot/dts/Makefile +++ /dev/null @@ -1,41 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -# Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. - -objtree = $(srctree) - -# Redefine the fixdep command -cmd_and_fixdep = \ - $(cmd); \ - $(objtree)/scripts/basic/fixdep $(depfile) $@ '$(make-cmd)' > $(dot-target).cmd;\ - rm -f $(depfile) - -include $(oottree)/scripts/Makefile.lib - -oot-dtstree = $(oottree)/arch/arm64/boot/dts/nvidia - -DTB_LIST := $(dtb-y) -DTBO_LIST := $(dtbo-y) -dtb-y := -dts_makefile=$(foreach d,$(wildcard $1*), $(call dts_makefile,$(d)/,$(2)) $(if $(findstring Makefile,$(d)),$(d))) -dts_mfiles = $(call dts_makefile, $(oot-dtstree), Makefile) - -ifneq ($(dts_mfiles),) -dts-include := -include $(dts_mfiles) -dtb-y := $(addprefix nvidia/,$(dtb-y)) -dtbo-y := $(addprefix nvidia/,$(dtbo-y)) -endif - -DTC_INCLUDE := $(oottree)/include - -DTB_LIST += $(dtb-y) -DTBO_LIST += $(dtbo-y) -DTB_OBJS := $(addprefix $(obj)/,$(DTB_LIST)) -DTBO_OBJS := $(addprefix $(obj)/,$(DTBO_LIST)) - -dtbs: $(DTB_OBJS) $(DTBO_OBJS) FORCE - -dtbsclean: - find $(oot-dtstree) -name *.dtb | xargs rm -rf - find $(oot-dtstree) -name *.dtbo | xargs rm -rf - find $(oot-dtstree) -name *.tmp | xargs rm -rf diff --git a/arch/arm64/boot/dts/nvidia/Makefile b/arch/arm64/boot/dts/nvidia/Makefile deleted file mode 100644 index 1f01f110..00000000 --- a/arch/arm64/boot/dts/nvidia/Makefile +++ /dev/null @@ -1,9 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -# Copyright (c) 2022-2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved. - -DTC_FLAGS += -@ - -# DT overlays -dtbo-y += tegra194-carveouts.dtbo -dtbo-y += tegra194-jetson.dtbo -dtbo-y += tegra194-p3509-0000+p3668-0001-overlay.dtbo diff --git a/arch/arm64/boot/dts/nvidia/tegra194-carveouts.dts b/arch/arm64/boot/dts/nvidia/tegra194-carveouts.dts deleted file mode 100644 index 3eff5de1..00000000 --- a/arch/arm64/boot/dts/nvidia/tegra194-carveouts.dts +++ /dev/null @@ -1,29 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 - -/dts-v1/; -/plugin/; - -/ { - fragment@0 { - target-path = "/"; - __overlay__ { - - reserved-memory { - #address-cells = <2>; - #size-cells = <2>; - ranges; - - vpr: vpr-carveout { - compatible = "nvidia,vpr-carveout"; - status = "okay"; - }; - }; - - tegra-carveouts { - compatible = "nvidia,carveouts-t19x"; - memory-region = <&vpr>; - status = "okay"; - }; - }; - }; -}; diff --git a/arch/arm64/boot/dts/nvidia/tegra194-jetson.dts b/arch/arm64/boot/dts/nvidia/tegra194-jetson.dts deleted file mode 100644 index 7b6a47ce..00000000 --- a/arch/arm64/boot/dts/nvidia/tegra194-jetson.dts +++ /dev/null @@ -1,157 +0,0 @@ -/* - * Copyright (c) 2022, NVIDIA CORPORATION & AFFILIATES. - * - * SPDX-License-Identifier: GPL-2.0 - */ - -/dts-v1/; -/plugin/; - -#include -#include -#include -#include -#include -#include - -/ { - overlay-name = "Tegra194 Jetson Overlay"; - compatible = "nvidia,tegra194"; - - fragment@0 { - target-path = "/bus@0/host1x@13e00000"; - __overlay__ { - #address-cells = <2>; - #size-cells = <2>; - - interrupt-parent = <&gic>; - - ranges = <0x0 0x14800000 0x0 0x14800000 0x0 0x02800000>, - <0x0 0x24f00000 0x0 0x24f00000 0x0 0x00100000>; - - nvdla0@15880000 { - compatible = "nvidia,tegra194-nvdla"; - reg = <0x0 0x15880000 0x0 0x00040000>; - interrupts = ; - clocks = <&bpmp TEGRA194_CLK_DLA0_CORE>, - <&bpmp TEGRA194_CLK_DLA0_FALCON>; - clock-names = "nvdla", "nvdla_flcn"; - resets = <&bpmp TEGRA194_RESET_DLA0>; - reset-names = "nvdla"; - - power-domains = <&bpmp TEGRA194_POWER_DOMAIN_DLAA>; - interconnects = <&mc TEGRA194_MEMORY_CLIENT_DLA0RDA &emc>, - <&mc TEGRA194_MEMORY_CLIENT_DLA0FALRDB &emc>, - <&mc TEGRA194_MEMORY_CLIENT_DLA0WRA &emc>, - <&mc TEGRA194_MEMORY_CLIENT_DLA0FALWRB &emc>; - interconnect-names = "dma-mem", "read-1", "write", "write-1"; - iommus = <&smmu TEGRA194_SID_NVDLA0>; - dma-coherent; - }; - - nvdla1@158c0000 { - compatible = "nvidia,tegra194-nvdla"; - reg = <0x0 0x158c0000 0x0 0x00040000>; - interrupts = ; - clocks = <&bpmp TEGRA194_CLK_DLA1_CORE>, - <&bpmp TEGRA194_CLK_DLA1_FALCON>; - clock-names = "nvdla", "nvdla_flcn"; - resets = <&bpmp TEGRA194_RESET_DLA1>; - reset-names = "nvdla"; - - power-domains = <&bpmp TEGRA194_POWER_DOMAIN_DLAB>; - interconnects = <&mc TEGRA194_MEMORY_CLIENT_DLA1RDA &emc>, - <&mc TEGRA194_MEMORY_CLIENT_DLA1FALRDB &emc>, - <&mc TEGRA194_MEMORY_CLIENT_DLA1WRA &emc>, - <&mc TEGRA194_MEMORY_CLIENT_DLA1FALWRB &emc>; - interconnect-names = "dma-mem", "read-1", "write", "write-1"; - iommus = <&smmu TEGRA194_SID_NVDLA1>; - dma-coherent; - }; - - pva0@16000000 { - compatible = "nvidia,tegra194-pva"; - power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PVAA>; - reg = <0x0 0x16000000 0x0 0x00800000>, - <0x0 0x24f00000 0x0 0x00080000>; - interrupts = ; - - resets = <&bpmp TEGRA194_RESET_PVA0_ALL>; - reset-names = "nvpva"; - - clocks = <&bpmp TEGRA194_CLK_NAFLL_PVA_VPS>, - <&bpmp TEGRA194_CLK_NAFLL_PVA_CORE>, - <&bpmp TEGRA194_CLK_PVA0_AXI>, - <&bpmp TEGRA194_CLK_PVA0_VPS0>, - <&bpmp TEGRA194_CLK_PVA0_VPS1>; - clock-names = "nafll_pva_vps", "nafll_pva_core", "axi", "vps0", "vps1"; - - interconnects = <&mc TEGRA194_MEMORY_CLIENT_PVA0RDA &emc>, - <&mc TEGRA194_MEMORY_CLIENT_PVA0RDB &emc>, - <&mc TEGRA194_MEMORY_CLIENT_PVA0RDC &emc>, - <&mc TEGRA194_MEMORY_CLIENT_PVA0WRA &emc>, - <&mc TEGRA194_MEMORY_CLIENT_PVA0WRB &emc>, - <&mc TEGRA194_MEMORY_CLIENT_PVA0WRC &emc>; - interconnect-names = "dma-mem", "read-b", "read-c", "write-a", "write-b", "write-c"; - - - iommus = <&smmu TEGRA194_SID_PVA0>; - dma-coherent; - }; - - pva1@16800000 { - compatible = "nvidia,tegra194-pva"; - power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PVAB>; - reg = <0x0 0x16800000 0x0 0x00800000>, - <0x0 0x24f80000 0x0 0x00080000>; - interrupts = ; - - resets = <&bpmp TEGRA194_RESET_PVA1_ALL>; - reset-names = "nvpva"; - - clocks = <&bpmp TEGRA194_CLK_PVA1_AXI>, - <&bpmp TEGRA194_CLK_PVA1_VPS0>, - <&bpmp TEGRA194_CLK_PVA1_VPS1>; - clock-names = "axi", "vps0", "vps1"; - - interconnects = <&mc TEGRA194_MEMORY_CLIENT_PVA1RDA &emc>, - <&mc TEGRA194_MEMORY_CLIENT_PVA1RDB &emc>, - <&mc TEGRA194_MEMORY_CLIENT_PVA1RDC &emc>, - <&mc TEGRA194_MEMORY_CLIENT_PVA1WRA &emc>, - <&mc TEGRA194_MEMORY_CLIENT_PVA1WRB &emc>, - <&mc TEGRA194_MEMORY_CLIENT_PVA1WRC &emc>; - interconnect-names = "dma-mem", "read-b", "read-c", "write-a", "write-b", "write-c"; - - iommus = <&smmu TEGRA194_SID_PVA1>; - dma-coherent; - }; - }; - }; - - fragment@1 { - target-path = "/"; - __overlay__ { - #address-cells = <2>; - #size-cells = <2>; - - cvnas@14000000 { - compatible = "nvidia,tegra194-cvnas"; - reg = <0x0 0x14000000 0x0 0x20000>, /* CV0_REG0_BASE */ - <0x0 0x14020000 0x0 0x10000>, /* CV0_SRAM_BASE */ - <0x0 0x0b240000 0x0 0x10000>; /* HSM_BASE */ - interrupt-parent = <&gic>; - interrupts = , - ; - clocks = <&bpmp TEGRA194_CLK_CVNAS>; - assigned-clocks = <&bpmp TEGRA194_CLK_CVNAS>; - assigned-clock-rates = <1356800000>; - resets = <&bpmp TEGRA194_RESET_CVNAS>, - <&bpmp TEGRA194_RESET_CVNAS_FCM>; - reset-names = "rst", "rst_fcm"; - power-domains = <&bpmp TEGRA194_POWER_DOMAIN_CV>; - cvsramslice = <4 0x1000>; - cvsram-reg = <0x0 0x50000000 0x0 0x400000>; - }; - }; - }; -}; diff --git a/arch/arm64/boot/dts/nvidia/tegra194-p3509-0000+p3668-0001-overlay.dts b/arch/arm64/boot/dts/nvidia/tegra194-p3509-0000+p3668-0001-overlay.dts deleted file mode 100644 index 5b5cc503..00000000 --- a/arch/arm64/boot/dts/nvidia/tegra194-p3509-0000+p3668-0001-overlay.dts +++ /dev/null @@ -1,9 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 - -/dts-v1/; -/plugin/; - -/ { - overlay-name = "Add p3509-0000+p3668-0001 Overlay Support"; - compatible = "nvidia,tegra194"; -};