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drm/tegra: Merge upstream changes
Merge upstream changes from linux-next, including merged version of new UAPI. Change-Id: I4f591d39e51ac6ab6877a0bd428adf166eca3c55 Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2653095 Tested-by: Jonathan Hunter <jonathanh@nvidia.com> Reviewed-by: Jonathan Hunter <jonathanh@nvidia.com> Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com> GVS: Gerrit_Virtual_Submit
This commit is contained in:
Mikko Perttunen
committed by
Laxman Dewangan
Laxman Dewangan
parent
a6ff2bcf9e
commit
02b028d02a
@@ -10,7 +10,7 @@
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extern "C" {
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#endif
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/* TegraDRM legacy UAPI. Only enabled with STAGING */
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/* Tegra DRM legacy UAPI. Only enabled with STAGING */
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#define DRM_TEGRA_GEM_CREATE_TILED (1 << 0)
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#define DRM_TEGRA_GEM_CREATE_BOTTOM_UP (1 << 1)
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@@ -627,8 +627,8 @@ struct drm_tegra_gem_get_flags {
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__u32 flags;
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};
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#define DRM_TEGRA_GEM_CREATE_LEGACY 0x00
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#define DRM_TEGRA_GEM_MMAP_LEGACY 0x01
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#define DRM_TEGRA_GEM_CREATE 0x00
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#define DRM_TEGRA_GEM_MMAP 0x01
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#define DRM_TEGRA_SYNCPT_READ 0x02
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#define DRM_TEGRA_SYNCPT_INCR 0x03
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#define DRM_TEGRA_SYNCPT_WAIT 0x04
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@@ -642,8 +642,8 @@ struct drm_tegra_gem_get_flags {
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#define DRM_TEGRA_GEM_SET_FLAGS 0x0c
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#define DRM_TEGRA_GEM_GET_FLAGS 0x0d
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#define DRM_IOCTL_TEGRA_GEM_CREATE_LEGACY DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_CREATE_LEGACY, struct drm_tegra_gem_create)
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#define DRM_IOCTL_TEGRA_GEM_MMAP_LEGACY DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_MMAP_LEGACY, struct drm_tegra_gem_mmap)
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#define DRM_IOCTL_TEGRA_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_CREATE, struct drm_tegra_gem_create)
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#define DRM_IOCTL_TEGRA_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_MMAP, struct drm_tegra_gem_mmap)
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#define DRM_IOCTL_TEGRA_SYNCPT_READ DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_SYNCPT_READ, struct drm_tegra_syncpt_read)
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#define DRM_IOCTL_TEGRA_SYNCPT_INCR DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_SYNCPT_INCR, struct drm_tegra_syncpt_incr)
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#define DRM_IOCTL_TEGRA_SYNCPT_WAIT DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_SYNCPT_WAIT, struct drm_tegra_syncpt_wait)
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@@ -657,7 +657,15 @@ struct drm_tegra_gem_get_flags {
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#define DRM_IOCTL_TEGRA_GEM_SET_FLAGS DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_SET_FLAGS, struct drm_tegra_gem_set_flags)
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#define DRM_IOCTL_TEGRA_GEM_GET_FLAGS DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_GET_FLAGS, struct drm_tegra_gem_get_flags)
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/* New TegraDRM UAPI */
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/* New Tegra DRM UAPI */
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/*
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* Reported by the driver in the `capabilities` field.
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*
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* DRM_TEGRA_CHANNEL_CAP_CACHE_COHERENT: If set, the engine is cache coherent
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* with regard to the system memory.
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*/
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#define DRM_TEGRA_CHANNEL_CAP_CACHE_COHERENT (1 << 0)
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struct drm_tegra_channel_open {
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/**
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@@ -676,39 +684,57 @@ struct drm_tegra_channel_open {
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__u32 flags;
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/**
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* @channel_ctx: [out]
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* @context: [out]
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*
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* Opaque identifier corresponding to the opened channel.
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*/
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__u32 channel_ctx;
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__u32 context;
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/**
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* @hardware_version: [out]
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* @version: [out]
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*
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* Version of the engine hardware. This can be used by userspace
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* to determine how the engine needs to be programmed.
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*/
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__u32 hardware_version;
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__u32 version;
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/**
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* @capabilities: [out]
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*
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* Flags describing the hardware capabilities.
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*/
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__u32 capabilities;
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__u32 padding;
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};
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struct drm_tegra_channel_close {
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/**
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* @channel_ctx: [in]
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* @context: [in]
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*
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* Identifier of the channel to close.
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*/
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__u32 channel_ctx;
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__u32 context;
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__u32 padding;
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};
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#define DRM_TEGRA_CHANNEL_MAP_READWRITE (1<<0)
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/*
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* Mapping flags that can be used to influence how the mapping is created.
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*
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* DRM_TEGRA_CHANNEL_MAP_READ: create mapping that allows HW read access
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* DRM_TEGRA_CHANNEL_MAP_WRITE: create mapping that allows HW write access
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*/
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#define DRM_TEGRA_CHANNEL_MAP_READ (1 << 0)
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#define DRM_TEGRA_CHANNEL_MAP_WRITE (1 << 1)
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#define DRM_TEGRA_CHANNEL_MAP_READ_WRITE (DRM_TEGRA_CHANNEL_MAP_READ | \
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DRM_TEGRA_CHANNEL_MAP_WRITE)
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struct drm_tegra_channel_map {
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/**
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* @channel_ctx: [in]
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* @context: [in]
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*
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* Identifier of the channel to which make memory available for.
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*/
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__u32 channel_ctx;
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__u32 context;
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/**
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* @handle: [in]
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@@ -725,47 +751,46 @@ struct drm_tegra_channel_map {
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__u32 flags;
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/**
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* @mapping_id: [out]
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* @mapping: [out]
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*
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* Identifier corresponding to the mapping, to be used for
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* relocations or unmapping later.
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*/
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__u32 mapping_id;
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__u32 mapping;
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};
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struct drm_tegra_channel_unmap {
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/**
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* @channel_ctx: [in]
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* @context: [in]
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*
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* Channel identifier of the channel to unmap memory from.
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*/
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__u32 channel_ctx;
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__u32 context;
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/**
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* @mapping_id: [in]
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* @mapping: [in]
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*
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* Mapping identifier of the memory mapping to unmap.
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*/
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__u32 mapping_id;
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__u32 mapping;
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};
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/* Submission */
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/**
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* Specify that bit 39 of the patched-in address should be set to
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* trigger layout swizzling between Tegra and non-Tegra Blocklinear
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* layout on systems that store surfaces in system memory in non-Tegra
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* Blocklinear layout.
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* Specify that bit 39 of the patched-in address should be set to switch
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* swizzling between Tegra and non-Tegra sector layout on systems that store
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* surfaces in system memory in non-Tegra sector layout.
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*/
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#define DRM_TEGRA_SUBMIT_BUF_RELOC_BLOCKLINEAR (1<<0)
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#define DRM_TEGRA_SUBMIT_RELOC_SECTOR_LAYOUT (1 << 0)
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struct drm_tegra_submit_buf {
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/**
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* @mapping_id: [in]
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* @mapping: [in]
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*
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* Identifier of the mapping to use in the submission.
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*/
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__u32 mapping_id;
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__u32 mapping;
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/**
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* @flags: [in]
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@@ -775,10 +800,7 @@ struct drm_tegra_submit_buf {
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__u32 flags;
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/**
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* Information for relocation patching. Relocation patching will
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* be done if the MAP IOCTL that created `mapping_id` did not
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* return an IOVA. If an IOVA was returned, the application is
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* responsible for patching the address into the gather.
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* Information for relocation patching.
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*/
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struct {
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/**
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@@ -807,44 +829,6 @@ struct drm_tegra_submit_buf {
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} reloc;
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};
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struct drm_tegra_submit_syncpt_incr {
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/**
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* @syncpt_fd: [in]
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*
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* Syncpoint file descriptor of the syncpoint that the job will
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* increment.
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*/
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__s32 syncpt_fd;
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/**
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* @flags: [in]
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*
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* Flags.
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*/
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__u32 flags;
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/**
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* @num_incrs: [in]
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*
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* Number of times the job will increment this syncpoint.
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*/
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__u32 num_incrs;
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/**
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* @fence_value: [out]
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*
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* Value the syncpoint will have once the job has completed all
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* its specified syncpoint increments.
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*
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* Note that the kernel may increment the syncpoint before or after
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* the job. These increments are not reflected in this field.
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*
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* If the job hangs or times out, not all of the increments may
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* get executed.
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*/
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__u32 fence_value;
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};
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/**
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* Execute `words` words of Host1x opcodes specified in the `gather_data_ptr`
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* buffer. Each GATHER_UPTR command uses successive words from the buffer.
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@@ -855,6 +839,11 @@ struct drm_tegra_submit_syncpt_incr {
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* commands.
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*/
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#define DRM_TEGRA_SUBMIT_CMD_WAIT_SYNCPT 1
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/**
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* Wait for a syncpoint to reach a value before continuing with further
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* commands. The threshold is calculated relative to the start of the job.
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*/
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#define DRM_TEGRA_SUBMIT_CMD_WAIT_SYNCPT_RELATIVE 2
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struct drm_tegra_submit_cmd_gather_uptr {
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__u32 words;
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@@ -863,7 +852,7 @@ struct drm_tegra_submit_cmd_gather_uptr {
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struct drm_tegra_submit_cmd_wait_syncpt {
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__u32 id;
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__u32 threshold;
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__u32 value;
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__u32 reserved[2];
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};
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@@ -890,13 +879,50 @@ struct drm_tegra_submit_cmd {
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};
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};
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struct drm_tegra_submit_syncpt {
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/**
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* @id: [in]
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*
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* ID of the syncpoint that the job will increment.
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*/
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__u32 id;
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/**
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* @flags: [in]
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*
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* Flags.
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*/
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__u32 flags;
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/**
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* @increments: [in]
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*
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* Number of times the job will increment this syncpoint.
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*/
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__u32 increments;
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/**
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* @value: [out]
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*
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* Value the syncpoint will have once the job has completed all
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* its specified syncpoint increments.
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*
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* Note that the kernel may increment the syncpoint before or after
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* the job. These increments are not reflected in this field.
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*
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* If the job hangs or times out, not all of the increments may
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* get executed.
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*/
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__u32 value;
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};
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struct drm_tegra_channel_submit {
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/**
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* @channel_ctx: [in]
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* @context: [in]
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*
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* Identifier of the channel to submit this job to.
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*/
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__u32 channel_ctx;
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__u32 context;
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/**
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* @num_bufs: [in]
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@@ -941,22 +967,91 @@ struct drm_tegra_channel_submit {
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*/
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__u64 gather_data_ptr;
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/**
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* @syncobj_in: [in]
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*
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* Handle for DRM syncobj that will be waited before submission.
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* Ignored if zero.
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*/
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__u32 syncobj_in;
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/**
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* @syncobj_out: [in]
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*
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* Handle for DRM syncobj that will have its fence replaced with
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* the job's completion fence. Ignored if zero.
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*/
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__u32 syncobj_out;
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/**
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* @syncpt_incr: [in,out]
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*
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* Information about the syncpoint the job will increment.
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*/
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struct drm_tegra_submit_syncpt_incr syncpt_incr;
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struct drm_tegra_submit_syncpt syncpt;
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};
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#define DRM_IOCTL_TEGRA_CHANNEL_OPEN DRM_IOWR(DRM_COMMAND_BASE + 0x10, struct drm_tegra_channel_open)
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#define DRM_IOCTL_TEGRA_CHANNEL_CLOSE DRM_IOWR(DRM_COMMAND_BASE + 0x11, struct drm_tegra_channel_close)
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#define DRM_IOCTL_TEGRA_CHANNEL_MAP DRM_IOWR(DRM_COMMAND_BASE + 0x12, struct drm_tegra_channel_map)
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#define DRM_IOCTL_TEGRA_CHANNEL_UNMAP DRM_IOWR(DRM_COMMAND_BASE + 0x13, struct drm_tegra_channel_unmap)
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#define DRM_IOCTL_TEGRA_CHANNEL_SUBMIT DRM_IOWR(DRM_COMMAND_BASE + 0x14, struct drm_tegra_channel_submit)
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struct drm_tegra_syncpoint_allocate {
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/**
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* @id: [out]
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*
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* ID of allocated syncpoint.
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*/
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__u32 id;
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__u32 padding;
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};
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#define DRM_IOCTL_TEGRA_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + 0x15, struct drm_tegra_gem_create)
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#define DRM_IOCTL_TEGRA_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + 0x16, struct drm_tegra_gem_mmap)
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struct drm_tegra_syncpoint_free {
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/**
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* @id: [in]
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*
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* ID of syncpoint to free.
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*/
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__u32 id;
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__u32 padding;
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};
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struct drm_tegra_syncpoint_wait {
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/**
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* @timeout: [in]
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*
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* Absolute timestamp at which the wait will time out.
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*/
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__s64 timeout_ns;
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/**
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* @id: [in]
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*
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* ID of syncpoint to wait on.
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*/
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__u32 id;
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/**
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* @threshold: [in]
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*
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* Threshold to wait for.
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*/
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__u32 threshold;
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/**
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* @value: [out]
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*
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* Value of the syncpoint upon wait completion.
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*/
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__u32 value;
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__u32 padding;
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};
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#define DRM_IOCTL_TEGRA_CHANNEL_OPEN DRM_IOWR(DRM_COMMAND_BASE + 0x10, struct drm_tegra_channel_open)
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#define DRM_IOCTL_TEGRA_CHANNEL_CLOSE DRM_IOWR(DRM_COMMAND_BASE + 0x11, struct drm_tegra_channel_close)
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#define DRM_IOCTL_TEGRA_CHANNEL_MAP DRM_IOWR(DRM_COMMAND_BASE + 0x12, struct drm_tegra_channel_map)
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#define DRM_IOCTL_TEGRA_CHANNEL_UNMAP DRM_IOWR(DRM_COMMAND_BASE + 0x13, struct drm_tegra_channel_unmap)
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#define DRM_IOCTL_TEGRA_CHANNEL_SUBMIT DRM_IOWR(DRM_COMMAND_BASE + 0x14, struct drm_tegra_channel_submit)
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#define DRM_IOCTL_TEGRA_SYNCPOINT_ALLOCATE DRM_IOWR(DRM_COMMAND_BASE + 0x20, struct drm_tegra_syncpoint_allocate)
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#define DRM_IOCTL_TEGRA_SYNCPOINT_FREE DRM_IOWR(DRM_COMMAND_BASE + 0x21, struct drm_tegra_syncpoint_free)
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#define DRM_IOCTL_TEGRA_SYNCPOINT_WAIT DRM_IOWR(DRM_COMMAND_BASE + 0x22, struct drm_tegra_syncpoint_wait)
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#if defined(__cplusplus)
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}
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