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misc: cec: Add sysfs node to set logical addr
Sysfs node takes string of decimal representation of logical address Logical address must be in bit-map form, e.g., "0x10" for address 4 Bug 1395893 Change-Id: I899fe80e1ebcc9957ac6efe3c4f6d07873b2a8db Signed-off-by: Ankita Garg <ankitag@nvidia.com> Signed-off-by: Xia Yang <xiay@nvidia.com> Reviewed-on: http://git-master/r/303968 (cherry picked from commit ff2b08c0dc1d6ff3c1d7cac012cdccfa17c6399c) Signed-off-by: Xia Yang <xiay@nvidia.com> Reviewed-on: http://git-master/r/346043 Reviewed-on: http://git-master/r/1164142 (cherry picked from commit 706ba72c2cb9f05450a10110d70f2462b52046d2)
This commit is contained in:
@@ -39,6 +39,14 @@
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#include "tegra_cec.h"
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#include "tegra_cec.h"
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static ssize_t cec_logical_addr_store(struct device *dev,
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struct device_attribute *attr, const char *buf, size_t count);
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static ssize_t cec_logical_addr_show(struct device *dev,
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struct device_attribute *attr, char *buf);
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static DEVICE_ATTR(cec_logical_addr_config, S_IWUSR | S_IRUGO,
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cec_logical_addr_show, cec_logical_addr_store);
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int tegra_cec_open(struct inode *inode, struct file *file)
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int tegra_cec_open(struct inode *inode, struct file *file)
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{
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{
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@@ -194,7 +202,8 @@ static void tegra_cec_init(struct tegra_cec *cec)
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writel(0x00, cec->cec_base + TEGRA_CEC_SW_CONTROL);
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writel(0x00, cec->cec_base + TEGRA_CEC_SW_CONTROL);
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writel(((TEGRA_CEC_LOGICAL_ADDR<<TEGRA_CEC_HW_CONTROL_RX_LOGICAL_ADDRS_MASK)&
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writel((
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(cec->logical_addr << TEGRA_CEC_HW_CONTROL_RX_LOGICAL_ADDRS_MASK) &
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(~TEGRA_CEC_HW_CONTROL_RX_SNOOP) &
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(~TEGRA_CEC_HW_CONTROL_RX_SNOOP) &
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(~TEGRA_CEC_HW_CONTROL_RX_NAK_MODE) &
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(~TEGRA_CEC_HW_CONTROL_RX_NAK_MODE) &
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(~TEGRA_CEC_HW_CONTROL_TX_NAK_MODE) &
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(~TEGRA_CEC_HW_CONTROL_TX_NAK_MODE) &
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@@ -257,6 +266,46 @@ static void tegra_cec_init_worker(struct work_struct *work)
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tegra_cec_init(cec);
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tegra_cec_init(cec);
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}
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}
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static ssize_t cec_logical_addr_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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struct tegra_cec *cec = dev_get_drvdata(dev);
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if (buf)
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return sprintf(buf, "0x%x\n", (u32)cec->logical_addr);
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return 1;
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}
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static ssize_t cec_logical_addr_store(struct device *dev,
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struct device_attribute *attr, const char *buf, size_t count)
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{
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ssize_t ret;
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u32 state;
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u16 addr;
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struct tegra_cec *cec;
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if (!buf || !count)
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return -EINVAL;
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cec = dev_get_drvdata(dev);
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if (!atomic_read(&cec->init_done))
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return -EAGAIN;
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ret = kstrtou16(buf, 0, &addr);
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if (ret)
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return ret;
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dev_info(dev, "tegra_cec: set logical address: %x\n", (u32)addr);
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cec->logical_addr = addr;
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state = readl(cec->cec_base + TEGRA_CEC_HW_CONTROL);
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state &= ~TEGRA_CEC_HWCTRL_RX_LADDR_MASK;
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state |= TEGRA_CEC_HWCTRL_RX_LADDR(cec->logical_addr);
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writel(state, cec->cec_base + TEGRA_CEC_HW_CONTROL);
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return count;
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}
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static int tegra_cec_probe(struct platform_device *pdev)
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static int tegra_cec_probe(struct platform_device *pdev)
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{
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{
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struct tegra_cec *cec;
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struct tegra_cec *cec;
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@@ -302,6 +351,7 @@ static int tegra_cec_probe(struct platform_device *pdev)
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}
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}
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atomic_set(&cec->init_done, 0);
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atomic_set(&cec->init_done, 0);
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cec->logical_addr = TEGRA_CEC_LOGICAL_ADDR;
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cec->clk = clk_get(&pdev->dev, "cec");
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cec->clk = clk_get(&pdev->dev, "cec");
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@@ -348,6 +398,14 @@ static int tegra_cec_probe(struct platform_device *pdev)
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goto cec_error;
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goto cec_error;
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}
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}
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ret = sysfs_create_file(
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&pdev->dev.kobj, &dev_attr_cec_logical_addr_config.attr);
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dev_info(&pdev->dev, "cec_add_sysfs ret=%d\n", ret);
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if (ret != 0) {
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dev_err(&pdev->dev, "Failed to add sysfs: %d\n", ret);
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goto cec_error;
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}
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dev_notice(&pdev->dev, "probed\n");
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dev_notice(&pdev->dev, "probed\n");
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return 0;
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return 0;
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@@ -32,7 +32,8 @@ struct tegra_cec {
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unsigned int rx_wake;
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unsigned int rx_wake;
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unsigned int tx_wake;
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unsigned int tx_wake;
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unsigned short rx_buffer;
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unsigned short rx_buffer;
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atomic_t init_done;
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atomic_t init_done;
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u16 logical_addr;
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struct work_struct work;
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struct work_struct work;
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};
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};
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static int tegra_cec_remove(struct platform_device *pdev);
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static int tegra_cec_remove(struct platform_device *pdev);
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@@ -55,6 +56,8 @@ static int tegra_cec_remove(struct platform_device *pdev);
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#define TEGRA_CEC_HW_DEBUG_TX 0X03C
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#define TEGRA_CEC_HW_DEBUG_TX 0X03C
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#define TEGRA_CEC_LOGICAL_ADDR 0x10
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#define TEGRA_CEC_LOGICAL_ADDR 0x10
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#define TEGRA_CEC_HWCTRL_RX_LADDR_MASK 0xFFFF
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#define TEGRA_CEC_HWCTRL_RX_LADDR(x) (x<<0)
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#define TEGRA_CEC_HW_CONTROL_RX_LOGICAL_ADDRS_MASK 0
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#define TEGRA_CEC_HW_CONTROL_RX_LOGICAL_ADDRS_MASK 0
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#define TEGRA_CEC_HW_CONTROL_RX_SNOOP (1<<15)
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#define TEGRA_CEC_HW_CONTROL_RX_SNOOP (1<<15)
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