diff --git a/drivers/block/tegra_virt_storage/tegra_hv_vblk.c b/drivers/block/tegra_virt_storage/tegra_hv_vblk.c
index 75476ee1..7a6ecf79 100644
--- a/drivers/block/tegra_virt_storage/tegra_hv_vblk.c
+++ b/drivers/block/tegra_virt_storage/tegra_hv_vblk.c
@@ -989,7 +989,7 @@ vblk_phys_base_show(struct device *dev, struct device_attribute *attr,
 	struct gendisk *disk = dev_to_disk(dev);
 	struct vblk_dev *vblk = disk->private_data;
 
-	return snprintf(buf, 16, "0x%x\n", vblk->config.phys_base);
+	return snprintf(buf, 16, "0x%llx\n", vblk->config.phys_base);
 }
 
 static ssize_t
diff --git a/drivers/mtd/devices/tegra_hv_mtd.c b/drivers/mtd/devices/tegra_hv_mtd.c
index 7afbf682..b221b8f2 100644
--- a/drivers/mtd/devices/tegra_hv_mtd.c
+++ b/drivers/mtd/devices/tegra_hv_mtd.c
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0-only
 /*
- * SPDX-FileCopyrightText: Copyright (c) 2023-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright (c) 2023-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
  */
 
 #include <nvidia/conftest.h>
@@ -468,7 +468,7 @@ static ssize_t vmtd_phys_base_show(struct device *dev,
 {
 	struct vmtd_dev *vmtddev = dev_get_drvdata(dev);
 
-	return snprintf(buf, 16, "0x%x\n", vmtddev->config.phys_base);
+	return snprintf(buf, 16, "0x%llx\n", vmtddev->config.phys_base);
 }
 static DEVICE_ATTR(phys_base, 0444, vmtd_phys_base_show, NULL);
 
diff --git a/include/tegra_virt_storage_spec.h b/include/tegra_virt_storage_spec.h
index 1efdd6ed..d49288a5 100644
--- a/include/tegra_virt_storage_spec.h
+++ b/include/tegra_virt_storage_spec.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 /*
- * Copyright (c) 2022-2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * Copyright (c) 2022-2025, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
  */
 
 #ifndef _TEGRA_VIRT_STORAGE_SPEC_H_
@@ -270,7 +270,7 @@ struct vs_config_info {
 		struct vs_mtd_dev_config mtd_config;
 	};
 	uint32_t phys_dev;
-	uint32_t phys_base;
+	uint64_t phys_base;
 	uint32_t storage_type;
 	uint32_t priority;
 	uint8_t speed_mode[SPEED_MODE_MAX_LEN];