host1x_emu: HR Timer Syncpoint Fence Polling

1. This change enable HR Timer Syncpoint polling and
disable the thread based fence polling.

2. Default timer interval is 200usec. The timer value
is taken from DT. If the timer interval in DT is less
then 50usec, default timer interval is taken.

Jira HOSTX-5527

Change-Id: I6644f1362f28a8901e4e384f1290be9807c30036
Signed-off-by: amitabhd <amitabhd@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3268636
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Raghavendra Vishnu Kumar <rvk@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Santosh BS <santoshb@nvidia.com>

drivers/gpu/host1x-emu/Makefile

@@ -9,6 +9,9 @@ endif
 #Enable Tasklet based fence scanning in SyncpointIncr
 #ccflags-y += -DHOST1X_EMU_SYNC_INC_TASKLET
 
+# Enable HRTimer based fence scanning
+ccflags-y += -DHOST1X_EMU_HRTIMER_FENCE_SCAN
+
 ifeq ($(NV_BUILD_CONFIGURATION_EXPOSING_T26X), 1)
 LINUXINCLUDE += -I$(srctree.nvidia-oot)/drivers/gpu/host1x-emu/include
 # Enable for verification in VDK. Below allow Emulated Syncpoint driver

drivers/gpu/host1x-emu/dev.c

@@ -1,7 +1,5 @@
-/*
+// SPDX-License-Identifier: GPL-2.0-only
- * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+// SPDX-FileCopyrightText: Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
- * SPDX-License-Identifier: GPL-2.0-only
- */
 #include <nvidia/conftest.h>
 #include <linux/clk.h>
 #include <linux/delay.h>
@@ -93,6 +91,19 @@ static int host1x_get_assigned_resources(struct host1x *host)
         host->polling_intrval = HOST1X_POOL_MSEC_PERIOD;
     }
 
+#ifdef HOST1X_EMU_HRTIMER_FENCE_SCAN
+	err = of_property_read_u32_array(np, "nvidia,hr-polling-interval", vals, 1);
+	if (err == 0) {
+		host->hr_polling_intrval = vals[0];
+		if (host->hr_polling_intrval < 50)
+			host->hr_polling_intrval = HRTIMER_TIMEOUT_NSEC;
+	} else {
+		host->hr_polling_intrval = HRTIMER_TIMEOUT_NSEC;
+	}
+	pr_info("Host1x-EMU: HRTimer Resolution :%unsec\n", MONOTONIC_RES_NSEC);
+	pr_info("Host1x-EMU: HRTimer Polling Interval :%unsec\n", host->hr_polling_intrval);
+#endif
+
 #ifdef HOST1X_EMU_HYPERVISOR
     err = of_property_read_u32_array(np, "nvidia,syncpoints-mem", vals, 4);
     if (err == 0) {

drivers/gpu/host1x-emu/dev.h

@@ -1,7 +1,5 @@
-/*
+// SPDX-License-Identifier: GPL-2.0-only
- * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+// SPDX-FileCopyrightText: Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
- * SPDX-License-Identifier: GPL-2.0-only
- */
 #ifndef HOST1X_DEV_H
 #define HOST1X_DEV_H
 
@@ -59,6 +57,9 @@ struct host1x {
     unsigned int syncpt_base;
     unsigned int syncpt_count;
     unsigned int polling_intrval;
+#ifdef HOST1X_EMU_HRTIMER_FENCE_SCAN
+	unsigned int hr_polling_intrval;
+#endif
 #ifdef HOST1X_EMU_HYPERVISOR
     void __iomem *syncpt_va_apt;   /* syncpoint apperture mapped in kernel space */
 #else

drivers/gpu/host1x-emu/poll.c

@@ -4,6 +4,48 @@
 #include "fence.h"
 #include "poll.h"
 
+#ifdef HOST1X_EMU_HRTIMER_FENCE_SCAN
+
+struct host1x  *hr_timer_host;
+static struct hrtimer emu_hr_timer;
+
+//Timer Callback function. This will be called when timer expires
+static enum hrtimer_restart timer_callback(struct hrtimer *timer)
+{
+	int id;
+	unsigned long irqflags;
+	struct host1x_syncpt      *sp;
+	struct host1x_syncpt      *tmp_spt;
+	struct host1x             *host = hr_timer_host;
+	ktime_t ts = ktime_get();
+
+	for (id = 0; id < host->num_pools + 1; ++id) {
+		struct host1x_syncpt_pool *pool = &host->pools[id];
+
+		list_for_each_entry_safe(sp, tmp_spt, &pool->syncpt_list.list, list) {
+			struct host1x_syncpt_fence *fence, *tmp;
+			unsigned int value;
+
+			value = host1x_syncpt_load(sp);
+
+			spin_lock_irqsave(&sp->fences.lock, irqflags);
+			list_for_each_entry_safe(fence, tmp, &sp->fences.list, list) {
+				if (((value - fence->threshold) & 0x80000000U) != 0U) {
+					/* Fence is not yet expired, we are done */
+					break;
+				}
+
+				list_del_init(&fence->list);
+				host1x_fence_signal(fence, ts);
+			}
+			spin_unlock_irqrestore(&sp->fences.lock, irqflags);
+		}
+	}
+	hrtimer_forward_now(timer, ktime_set(HRTIMER_TIMEOUT_SEC, host->hr_polling_intrval));
+	return HRTIMER_RESTART;
+}
+#endif
+
 static void host1x_poll_add_fence_to_list(struct host1x_fence_list *list,
 					  struct host1x_syncpt_fence *fence)
 {
@@ -126,6 +168,15 @@ void host1x_poll_irq_check_syncpt_fence(struct host1x_syncpt  *sp)
 void host1x_poll_start(struct host1x *host)
 {
 	int id;
+#ifdef HOST1X_EMU_HRTIMER_FENCE_SCAN
+	ktime_t ktime;
+
+	hr_timer_host = host;
+	ktime = ktime_set(HRTIMER_TIMEOUT_SEC, host->hr_polling_intrval);
+	hrtimer_init(&emu_hr_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
+	emu_hr_timer.function = &timer_callback;
+	hrtimer_start(&emu_hr_timer, ktime, HRTIMER_MODE_REL);
+#endif
 
 	/*Loop till "host->num_pools + 1" to include Ro-Pool*/
 	for (id = 0; id < host->num_pools + 1; ++id) {
@@ -139,6 +190,10 @@ void host1x_poll_stop(struct host1x *host)
 {
 	int id;
 
+#ifdef HOST1X_EMU_HRTIMER_FENCE_SCAN
+    hrtimer_cancel(&emu_hr_timer);
+#endif
+
 	/*Loop till "host->num_pools + 1" to include Ro-Pool*/
 	for (id = 0; id < host->num_pools + 1; ++id) {
 		struct host1x_syncpt_pool *syncpt_pool = &host->pools[id];

drivers/gpu/host1x-emu/poll.h

@@ -7,6 +7,11 @@
 #include <linux/kernel.h>
 #include <linux/timekeeping.h>
 
+#ifdef HOST1X_EMU_HRTIMER_FENCE_SCAN
+#define HRTIMER_TIMEOUT_NSEC		200000U     /*200usec*/
+#define HRTIMER_TIMEOUT_SEC         0U          /*0sec*/
+#endif /*HOST1X_EMU_HRTIMER_FENCE_SCAN*/
+
 struct host1x;
 struct host1x_syncpt;
 struct host1x_syncpt_fence;