PCI: edma_test: Enhance edma stop test

Enable all channels in async mode and stop channel 2 to verify edma stop
feature. This stops the dma engine when channels 0, 1 and 2 are in middle
of processing descriptors and stops channel 3 before submitting the
descriptors.

Bug 4620420

Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
Change-Id: Iadff763e299437ef8b7b575c0177968681adb15a
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3133675
(cherry picked from commit 88187c18bf6fe4d64cb9d2964664479492afce5c)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3133507
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
This commit is contained in:
Manikanta Maddireddy
2024-05-08 16:04:42 +05:30
committed by mobile promotions
parent 86cd71d0be
commit 120be4313a

View File

@@ -2,7 +2,7 @@
/*
* PCIe DMA EPF Library for Tegra PCIe
*
* Copyright (C) 2022-2023 NVIDIA Corporation. All rights reserved.
* Copyright (C) 2022-2024 NVIDIA Corporation. All rights reserved.
*/
#ifndef TEGRA_PCIE_EDMA_TEST_COMMON_H
@@ -195,8 +195,8 @@ static int edmalib_common_test(struct edmalib_common *edma)
if (EDMA_ABORT_TEST_EN || EDMA_STOP_TEST_EN) {
edma->edma_ch &= ~0xFF;
/* only channel 0, 2 is ASYNC, where chan 0 async gets aborted */
edma->edma_ch |= 0xF5;
/* All channels in ASYNC, where chan 2 async gets aborted */
edma->edma_ch |= 0xFF;
}
/* FIXME This is causing crash for remote dma when BAR MMIO virt address is used. */
@@ -457,7 +457,7 @@ static int edmalib_common_test(struct edmalib_common *edma)
dev_dbg(edma->fdev, "%s: LL EDMA LIB %d, SZ: %u B CH: %d iter %d\n",
__func__, xfer_type, edma->dma_size, ch, i);
}
if (i == 0) {
if (i == 2) {
if (EDMA_ABORT_TEST_EN) {
msleep(edma->stress_count);
/* TODO support abort test case for T264 */