ASoC: tegra: Make AUD_MCLK an optional clock

Currently AUD_MCLK is controlled by kernel driver and it remains active
as long as an audio use case is running. This is the case most platforms
or audio codecs require. But some external codecs, depending on specific
platform, may want AUD_MCLK clock to be running always and do not require
a runtime control. Since kernel is common, we need a provision in DT to
differentiate both of the above requirements.

This can be achieved by making AUD_MCLK clock an optional property.
Platforms which don't require kernel control can simply exclude AUD_MCLK
clock entry. Respective call in kernel will not have any effect.

Note: We are using upstream utils driver now and update the references
wherever applicable. The changes need not be considered for upstream
because there is plan to use audio-graph-card based driver for Tegra210
and later, which already treats AUD_MCLK clock as optional. Thus no
explicit AUD_MCLK management is necessary. Also it is recommended that
codec driver should take the control of AUD_MCLK. Hence current change
is needed till mentioned transition happens.

Bug 200694208

Change-Id: I87e496515e02db4ded6209a336f6cfbaec034fa1
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2474868
(manually cherry picked from commit 8b2965341c1611b5984ff412f1d5001673396476)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-5.10/+/2518783
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Viswanath L <viswanathl@nvidia.com>
Reviewed-by: Mohan Kumar D <mkumard@nvidia.com>
Reviewed-by: Sharad Gupta <sharadg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Sameer Pujar
2021-02-03 12:23:00 +05:30
parent c69eaecfd0
commit 12f7c17644

View File

@@ -3,7 +3,7 @@
* tegra_asoc_utils.c - Harmony machine ASoC driver
*
* Author: Stephen Warren <swarren@nvidia.com>
* Copyright (C) 2010,2012 - NVIDIA, Inc.
* Copyright (c) 2010-2021 NVIDIA CORPORATION. All rights reserved.
*/
#include <linux/clk.h>
@@ -296,8 +296,8 @@ int tegra_asoc_utils_init(struct tegra_asoc_utils_data *data,
return PTR_ERR(data->clk_pll_a_out0);
}
/* FIXME: data->clk_cdev1 = devm_clk_get(dev, "mclk"); */
data->clk_cdev1 = devm_clk_get(dev, "extern1");
/* FIXME: data->clk_cdev1 = devm_clk_get_optional(dev, "mclk"); */
data->clk_cdev1 = devm_clk_get_optional(dev, "extern1");
if (IS_ERR(data->clk_cdev1)) {
dev_err(data->dev, "Can't retrieve clk cdev1\n");
return PTR_ERR(data->clk_cdev1);
@@ -323,7 +323,7 @@ int tegra_asoc_utils_init(struct tegra_asoc_utils_data *data,
"Configuring clocks for a legacy device-tree\n");
dev_warn(data->dev,
"Please update DT to use assigned-clock-parents\n");
clk_extern1 = devm_clk_get(dev, "extern1");
clk_extern1 = devm_clk_get_optional(dev, "extern1");
if (IS_ERR(clk_extern1)) {
dev_err(data->dev, "Can't retrieve clk extern1\n");
return PTR_ERR(clk_extern1);