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git://nv-tegra.nvidia.com/linux-nv-oot.git
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video: tegra: nvmap: Update carveout name
Compression carveout is not correct carveout name as it will be used by gpu even for non-compression usecases. Hence rename it to gpu carveout. Bug 3956637 Change-Id: I802b91d58d9ca120e34655c21f56c0da8c8cf677 Signed-off-by: Ketan Patil <ketanp@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2955536 Reviewed-by: Pritesh Raithatha <praithatha@nvidia.com>
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1c2599bcba
@@ -717,7 +717,7 @@ static void alloc_handle(struct nvmap_client *client,
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void *cpu_addr;
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if (h->pgalloc.pages &&
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h->heap_type == NVMAP_HEAP_CARVEOUT_COMPRESSION) {
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h->heap_type == NVMAP_HEAP_CARVEOUT_GPU) {
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unsigned long page_count;
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u32 granule_size = 0;
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int i;
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@@ -150,11 +150,11 @@ static phys_addr_t nvmap_alloc_mem(struct nvmap_heap *h, size_t len,
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err = nvmap_dma_alloc_attrs(dev, len, &pa,
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GFP_KERNEL, DMA_ATTR_ALLOC_EXACT_SIZE);
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/*
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* In case of Compression carveout, try to allocate the entire granule in physically
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* In case of Gpu carveout, try to allocate the entire granule in physically
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* contiguous manner. If it returns error, then try to allocate the memory in
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* granules of specified granule size.
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*/
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if (h->is_compression_co && IS_ERR(err)) {
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if (h->is_gpu_co && IS_ERR(err)) {
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err = nvmap_dma_alloc_attrs(dev, len, &pa,
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GFP_KERNEL, DMA_ATTR_ALLOC_EXACT_SIZE |
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DMA_ATTR_ALLOC_SINGLE_PAGES);
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@@ -222,7 +222,7 @@ static void nvmap_free_mem(struct nvmap_heap *h, phys_addr_t base,
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(void *)(uintptr_t)base,
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(dma_addr_t)base, DMA_ATTR_ALLOC_EXACT_SIZE);
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#else
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if (h->is_compression_co && handle->pgalloc.pages) {
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if (h->is_gpu_co && handle->pgalloc.pages) {
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/* In case of pages, we need to pass pointer to array of pages */
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nvmap_dma_free_attrs(dev, len,
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(void *)handle->pgalloc.pages,
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@@ -482,7 +482,7 @@ struct nvmap_heap *nvmap_heap_create(struct device *parent,
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DMA_MEMORY_NOMAP);
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#else
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err = nvmap_dma_declare_coherent_memory(h->dma_dev, 0, base, len,
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DMA_MEMORY_NOMAP, co->is_compression_co, co->granule_size);
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DMA_MEMORY_NOMAP, co->is_gpu_co, co->granule_size);
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#endif
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#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 14, 0)
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if (!err) {
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@@ -505,7 +505,7 @@ struct nvmap_heap *nvmap_heap_create(struct device *parent,
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h->base = base;
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h->can_alloc = !!co->can_alloc;
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h->is_ivm = co->is_ivm;
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h->is_compression_co = co->is_compression_co;
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h->is_gpu_co = co->is_gpu_co;
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h->granule_size = co->granule_size;
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h->len = len;
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h->free_size = len;
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@@ -639,7 +639,7 @@ int nvmap_flush_heap_block(struct nvmap_client *client,
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struct list_block *b = container_of(block, struct list_block, block);
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/*
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* For Compression carveout with physically discontiguous granules,
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* For Gpu carveout with physically discontiguous granules,
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* iterate over granules and do cache maint for it.
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*/
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page_count = h->size >> PAGE_SHIFT;
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@@ -31,7 +31,7 @@ struct nvmap_heap {
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struct device *cma_dev;
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struct device *dma_dev;
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bool is_ivm;
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bool is_compression_co;
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bool is_gpu_co;
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u32 granule_size;
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bool can_alloc; /* Used only if is_ivm == true */
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unsigned int peer; /* Used only if is_ivm == true */
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@@ -136,8 +136,8 @@ static struct nvmap_platform_carveout nvmap_carveouts[] = {
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.size = 0,
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},
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[4] = {
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.name = "compression",
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.usage_mask = NVMAP_HEAP_CARVEOUT_COMPRESSION,
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.name = "gpu",
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.usage_mask = NVMAP_HEAP_CARVEOUT_GPU,
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.base = 0,
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.size = 0,
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},
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@@ -367,7 +367,7 @@ static void *__nvmap_dma_alloc_from_coherent(struct device *dev,
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int do_memset = 0;
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int *bitmap_nos = NULL;
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const char *device_name;
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bool is_compression = false;
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bool is_gpu = false;
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u32 granule_size = 0;
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device_name = dev_name(dev);
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@@ -376,16 +376,16 @@ static void *__nvmap_dma_alloc_from_coherent(struct device *dev,
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return NULL;
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}
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if (!strncmp(device_name, "compression", 11)) {
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if (!strncmp(device_name, "gpu", 3)) {
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struct nvmap_platform_carveout *co;
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is_compression = true;
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co = nvmap_get_carveout_pdata("compression");
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is_gpu = true;
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co = nvmap_get_carveout_pdata("gpu");
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granule_size = co->granule_size;
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}
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if (is_compression) {
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/* Calculation for Compression carveout should consider granule size */
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if (is_gpu) {
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/* Calculation for Gpu carveout should consider granule size */
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count = size >> PAGE_SHIFT_GRANULE(granule_size);
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} else {
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if (dma_get_attr(DMA_ATTR_ALLOC_EXACT_SIZE, attrs)) {
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@@ -411,7 +411,7 @@ static void *__nvmap_dma_alloc_from_coherent(struct device *dev,
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dma_get_attr(DMA_ATTR_ALLOC_SINGLE_PAGES, attrs)) {
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alloc_size = 1;
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/* pages contain the array of pages of kernel PAGE_SIZE */
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if (!is_compression)
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if (!is_gpu)
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pages = nvmap_kvzalloc_pages(count);
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else
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pages = nvmap_kvzalloc_pages(count * PAGES_PER_GRANULE(granule_size));
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@@ -426,15 +426,15 @@ static void *__nvmap_dma_alloc_from_coherent(struct device *dev,
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spin_lock_irqsave(&mem->spinlock, flags);
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if (!is_compression && unlikely(size > ((u64)mem->size << PAGE_SHIFT)))
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if (!is_gpu && unlikely(size > ((u64)mem->size << PAGE_SHIFT)))
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goto err;
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else if (is_compression &&
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else if (is_gpu &&
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unlikely(size > ((u64)mem->size << PAGE_SHIFT_GRANULE(granule_size))))
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goto err;
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if (((mem->flags & DMA_MEMORY_NOMAP) &&
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dma_get_attr(DMA_ATTR_ALLOC_SINGLE_PAGES, attrs)) ||
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is_compression) {
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is_gpu) {
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align = 0;
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} else {
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if (order > DMA_BUF_ALIGNMENT)
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@@ -455,7 +455,7 @@ static void *__nvmap_dma_alloc_from_coherent(struct device *dev,
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count -= alloc_size;
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if (pages) {
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if (!is_compression)
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if (!is_gpu)
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pages[i++] = pfn_to_page(mem->pfn_base + pageno);
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else {
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/* Handle granules */
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@@ -472,7 +472,7 @@ static void *__nvmap_dma_alloc_from_coherent(struct device *dev,
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/*
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* Memory was found in the coherent area.
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*/
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if (!is_compression)
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if (!is_gpu)
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*dma_handle = mem->device_base + (first_pageno << PAGE_SHIFT);
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else
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*dma_handle = mem->device_base + (first_pageno << PAGE_SHIFT_GRANULE(granule_size));
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@@ -526,7 +526,7 @@ void nvmap_dma_free_attrs(struct device *dev, size_t size, void *cpu_addr,
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unsigned long flags;
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unsigned int pageno, page_shift_val;
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struct dma_coherent_mem_replica *mem;
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bool is_compression = false;
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bool is_gpu = false;
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const char *device_name;
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u32 granule_size = 0;
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@@ -539,11 +539,11 @@ void nvmap_dma_free_attrs(struct device *dev, size_t size, void *cpu_addr,
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return;
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}
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if (!strncmp(device_name, "compression", 11)) {
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if (!strncmp(device_name, "gpu", 3)) {
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struct nvmap_platform_carveout *co;
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is_compression = true;
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co = nvmap_get_carveout_pdata("compression");
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is_gpu = true;
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co = nvmap_get_carveout_pdata("gpu");
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granule_size = co->granule_size;
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}
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@@ -554,7 +554,7 @@ void nvmap_dma_free_attrs(struct device *dev, size_t size, void *cpu_addr,
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int i;
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spin_lock_irqsave(&mem->spinlock, flags);
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if (!is_compression) {
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if (!is_gpu) {
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for (i = 0; i < (size >> PAGE_SHIFT); i++) {
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pageno = page_to_pfn(pages[i]) - mem->pfn_base;
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if (WARN_ONCE(pageno > mem->size,
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@@ -582,7 +582,7 @@ void nvmap_dma_free_attrs(struct device *dev, size_t size, void *cpu_addr,
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else
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mem_addr = mem->virt_base;
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page_shift_val = is_compression ? PAGE_SHIFT_GRANULE(granule_size) : PAGE_SHIFT;
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page_shift_val = is_gpu ? PAGE_SHIFT_GRANULE(granule_size) : PAGE_SHIFT;
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if (mem && cpu_addr >= mem_addr &&
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cpu_addr - mem_addr < (u64)mem->size << page_shift_val) {
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unsigned int page = (cpu_addr - mem_addr) >> page_shift_val;
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@@ -590,7 +590,7 @@ void nvmap_dma_free_attrs(struct device *dev, size_t size, void *cpu_addr,
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unsigned int count;
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if (DMA_ATTR_ALLOC_EXACT_SIZE & attrs) {
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if (is_compression)
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if (is_gpu)
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count = ALIGN_GRANULE_SIZE(size, granule_size) >> page_shift_val;
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else
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count = PAGE_ALIGN(size) >> page_shift_val;
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@@ -682,7 +682,7 @@ static int nvmap_dma_assign_coherent_memory(struct device *dev,
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static int nvmap_dma_init_coherent_memory(
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phys_addr_t phys_addr, dma_addr_t device_addr, size_t size, int flags,
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struct dma_coherent_mem_replica **mem, bool is_compression, u32 granule_size)
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struct dma_coherent_mem_replica **mem, bool is_gpu, u32 granule_size)
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{
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struct dma_coherent_mem_replica *dma_mem = NULL;
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void *mem_base = NULL;
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@@ -693,7 +693,7 @@ static int nvmap_dma_init_coherent_memory(
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if (!size)
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return -EINVAL;
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if (is_compression)
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if (is_gpu)
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pages = size >> PAGE_SHIFT_GRANULE(granule_size);
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else
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pages = size >> PAGE_SHIFT;
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@@ -737,14 +737,14 @@ err_memunmap:
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}
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int nvmap_dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr,
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dma_addr_t device_addr, size_t size, int flags, bool is_compression,
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dma_addr_t device_addr, size_t size, int flags, bool is_gpu,
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u32 granule_size)
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{
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struct dma_coherent_mem_replica *mem;
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int ret;
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ret = nvmap_dma_init_coherent_memory(phys_addr, device_addr, size, flags, &mem,
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is_compression, granule_size);
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is_gpu, granule_size);
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if (ret)
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return ret;
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@@ -776,7 +776,7 @@ static int __init nvmap_co_device_init(struct reserved_mem *rmem,
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#else
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err = nvmap_dma_declare_coherent_memory(co->dma_dev, 0,
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co->base, co->size,
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DMA_MEMORY_NOMAP, co->is_compression_co,
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DMA_MEMORY_NOMAP, co->is_gpu_co,
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co->granule_size);
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#endif
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#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 14, 0)
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@@ -907,8 +907,8 @@ int __init nvmap_co_setup(struct reserved_mem *rmem, u32 granule_size)
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co->base = rmem->base;
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co->size = rmem->size;
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co->cma_dev = NULL;
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if (!strncmp(co->name, "compression", 11)) {
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co->is_compression_co = true;
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if (!strncmp(co->name, "gpu", 3)) {
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co->is_gpu_co = true;
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co->granule_size = granule_size;
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}
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@@ -943,8 +943,8 @@ int __init nvmap_init(struct platform_device *pdev)
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while (!of_phandle_iterator_next(&it) && it.node) {
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if (of_device_is_available(it.node) &&
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!of_device_is_compatible(it.node, "nvidia,ivm_carveout")) {
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/* Read granule size in case of compression carveout */
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if (of_device_is_compatible(it.node, "nvidia,compression_carveout")
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/* Read granule size in case of gpu carveout */
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if (of_device_is_compatible(it.node, "nvidia,gpu_carveout")
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&& of_property_read_u32(it.node, "granule-size", &granule_size)) {
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pr_err("granule-size property is missing\n");
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return -EINVAL;
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@@ -207,13 +207,13 @@ int nvmap_ioctl_alloc(struct file *filp, void __user *arg)
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return -EINVAL;
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/*
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* In case of Compression carveout, the handle size needs to be aligned to granule.
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* In case of Gpu carveout, the handle size needs to be aligned to granule.
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*/
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if (op.heap_mask & NVMAP_HEAP_CARVEOUT_COMPRESSION) {
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if (op.heap_mask & NVMAP_HEAP_CARVEOUT_GPU) {
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u32 granule_size = 0;
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for (i = 0; i < nvmap_dev->nr_carveouts; i++)
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if (nvmap_dev->heaps[i].heap_bit & NVMAP_HEAP_CARVEOUT_COMPRESSION)
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if (nvmap_dev->heaps[i].heap_bit & NVMAP_HEAP_CARVEOUT_GPU)
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granule_size = nvmap_dev->heaps[i].carveout->granule_size;
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handle->size = ALIGN_GRANULE_SIZE(handle->size, granule_size);
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page_sz = granule_size;
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@@ -1148,9 +1148,9 @@ int nvmap_ioctl_get_handle_parameters(struct file *filp, void __user *arg)
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/*
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* Check handle is allocated or not while setting contig.
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* If heap type is IOVMM, check if it has flag set for contiguous memory
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* allocation request. Otherwise, if handle belongs to any carveout except compression
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* allocation request. Otherwise, if handle belongs to any carveout except gpu
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* carveout then all allocations are contiguous, hence set contig flag to true.
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* In case of compression carveout, if allocation is page based then set contig flag to
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* In case of gpu carveout, if allocation is page based then set contig flag to
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* false otherwise true.
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*/
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if (handle->alloc &&
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@@ -1359,7 +1359,7 @@ int nvmap_ioctl_query_heap_params(struct file *filp, void __user *arg)
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heap = nvmap_dev->heaps[i].carveout;
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op.total = nvmap_query_heap_size(heap);
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op.free = heap->free_size;
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if (nvmap_dev->heaps[i].carveout->is_compression_co)
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if (nvmap_dev->heaps[i].carveout->is_gpu_co)
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op.granule_size = nvmap_dev->heaps[i].carveout->granule_size;
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break;
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}
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@@ -488,7 +488,7 @@ struct dma_coherent_mem_replica {
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};
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int nvmap_dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr,
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dma_addr_t device_addr, size_t size, int flags, bool is_compression,
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dma_addr_t device_addr, size_t size, int flags, bool is_gpu,
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u32 granule_size);
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#endif
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int nvmap_probe(struct platform_device *pdev);
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@@ -21,7 +21,7 @@
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#define NVMAP_HEAP_CARVEOUT_VPR (1ul<<28)
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#define NVMAP_HEAP_CARVEOUT_TSEC (1ul<<27)
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#define NVMAP_HEAP_CARVEOUT_VIDMEM (1ul<<26)
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#define NVMAP_HEAP_CARVEOUT_COMPRESSION (1ul << 3)
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#define NVMAP_HEAP_CARVEOUT_GPU (1ul << 3)
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#define NVMAP_HEAP_CARVEOUT_FSI (1ul<<2)
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#define NVMAP_HEAP_CARVEOUT_IVM (1ul<<1)
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#define NVMAP_HEAP_CARVEOUT_GENERIC (1ul<<0)
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@@ -94,8 +94,8 @@ struct nvmap_platform_carveout {
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bool no_cpu_access; /* carveout can't be accessed from cpu at all */
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bool init_done; /* FIXME: remove once all caveouts use reserved-memory */
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struct nvmap_pm_ops pm_ops;
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bool is_compression_co; /* Compression carveout is treated differently */
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u32 granule_size; /* Granule size for compression carveout */
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bool is_gpu_co; /* Gpu carveout is treated differently */
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u32 granule_size; /* Granule size for gpu carveout */
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};
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struct nvmap_platform_data {
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