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Remove tegra-epl driver

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tegra-epl driver is added in kernel-oot repo so that i2c, pcie and
other upstream drivers can use interface to report errors.

Bug 3847981

Change-Id: I9dfe5cd92eb9955a35753ce14a12dc4799258b70
Signed-off-by: Rahul Bedarkar <rabedarkar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2799410
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
Rahul Bedarkar
2022-10-28 07:59:26 +00:00
committed by mobile promotions
parent 7ca4e62987
commit 1f45d1e993
6 changed files with 34 additions and 546 deletions
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95
Documentation/devicetree/bindings/platform/tegra/tegra-epl.yaml
View File

@@ -1,95 +0,0 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/platform/tegra/tegra-epl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Device tree binding for NVIDIA Tegra EPL
maintainers:
- Rahul Bedarkar <rabedarkar@nvidia.com>
description: |
The tegra-epl driver provides interface for reporting software detected errors
to Functional Safety Island (FSI) via HSP mailbox or MISC EC registers.
properties:
compatible:
enum:
- nvidia,tegra234-epl-client
mboxes:
maxItems: 1
description: |
Specifies TX mailbox.
mbox-names:
maxItems: 1
description: |
Specifies the name for TX mailbox. It should be "epl-tx".
reg:
minItems: 11
maxItems: 11
description: |
Address and size pairs of MISC EC error and assert registers followed by
address and size of mission error status register.
client-misc-sw-generic-err0:
description: |
Device driver's name for reporting errors via MISCREG_MISC_EC_ERR0_SW_ERR_CODE_0.
client-misc-sw-generic-err1:
description: |
Device driver's name for reporting errors via MISCREG_MISC_EC_ERR1_SW_ERR_CODE_0.
client-misc-sw-generic-err2:
description: |
Device driver's name for reporting errors via MISCREG_MISC_EC_ERR2_SW_ERR_CODE_0.
client-misc-sw-generic-err3:
description: |
Device driver's name for reporting errors via MISCREG_MISC_EC_ERR3_SW_ERR_CODE_0.
client-misc-sw-generic-err4:
description: |
Device driver's name for reporting errors via MISCREG_MISC_EC_ERR4_SW_ERR_CODE_0.
required:
- compatible
- mboxes
- mbox-names
- reg
additionalProperties: false
examples:
- |
#include <dt-bindings/mailbox/tegra186-hsp.h>
#define TEGRA_HSP_MBOX_TYPE_SM_128BIT (1 << 8)
soc {
#address-cells = <1>;
#size-cells = <1>;
epl_client@110000 {
compatible = "nvidia,tegra234-epl-client";
mboxes =
<&hsp_top2 (TEGRA_HSP_MBOX_TYPE_SM | TEGRA_HSP_MBOX_TYPE_SM_128BIT) TEGRA_HSP_SM_RX(1)>;
mbox-names = "epl-tx";
reg = <0x00110000 0x4>,
<0x00110004 0x4>,
<0x00120000 0x4>,
<0x00120004 0x4>,
<0x00130000 0x4>,
<0x00130004 0x4>,
<0x00140000 0x4>,
<0x00140004 0x4>,
<0x00150000 0x4>,
<0x00150004 0x4>,
<0x024e0038 0x4>;
client-misc-sw-generic-err0 = "fsicom_client";
client-misc-sw-generic-err4 = "gk20e";
};
};
...

72
dkms.conf
View File

@@ -35,88 +35,84 @@ BUILT_MODULE_NAME[7]="tegra-cactmon"
BUILT_MODULE_LOCATION[7]="drivers/platform/tegra" BUILT_MODULE_LOCATION[7]="drivers/platform/tegra"
DEST_MODULE_LOCATION[7]="/extra" DEST_MODULE_LOCATION[7]="/extra"
BUILT_MODULE_NAME[8]="tegra-epl" BUILT_MODULE_NAME[8]="firmwares-class"
BUILT_MODULE_LOCATION[8]="drivers/platform/tegra" BUILT_MODULE_LOCATION[8]="drivers/platform/tegra"
DEST_MODULE_LOCATION[8]="/extra" DEST_MODULE_LOCATION[8]="/extra"
BUILT_MODULE_NAME[9]="firmwares-class" BUILT_MODULE_NAME[9]="tegra-fsicom"
BUILT_MODULE_LOCATION[9]="drivers/platform/tegra" BUILT_MODULE_LOCATION[9]="drivers/platform/tegra"
DEST_MODULE_LOCATION[9]="/extra" DEST_MODULE_LOCATION[9]="/extra"
BUILT_MODULE_NAME[10]="tegra-fsicom" BUILT_MODULE_NAME[10]="tegra-bootloader-debug"
BUILT_MODULE_LOCATION[10]="drivers/platform/tegra" BUILT_MODULE_LOCATION[10]="drivers/platform/tegra"
DEST_MODULE_LOCATION[10]="/extra" DEST_MODULE_LOCATION[10]="/extra"
BUILT_MODULE_NAME[11]="tegra-bootloader-debug" BUILT_MODULE_NAME[11]="host1x-fence"
BUILT_MODULE_LOCATION[11]="drivers/platform/tegra" BUILT_MODULE_LOCATION[11]="drivers/gpu/host1x-fence"
DEST_MODULE_LOCATION[11]="/extra" DEST_MODULE_LOCATION[11]="/extra"
BUILT_MODULE_NAME[12]="host1x-fence" BUILT_MODULE_NAME[12]="tegra_vnet"
BUILT_MODULE_LOCATION[12]="drivers/gpu/host1x-fence" BUILT_MODULE_LOCATION[12]="drivers/net/ethernet/nvidia/pcie"
DEST_MODULE_LOCATION[12]="/extra" DEST_MODULE_LOCATION[12]="/extra"
BUILT_MODULE_NAME[13]="tegra_vnet" BUILT_MODULE_NAME[13]="arm64-ras"
BUILT_MODULE_LOCATION[13]="drivers/net/ethernet/nvidia/pcie" BUILT_MODULE_LOCATION[13]="drivers/ras"
DEST_MODULE_LOCATION[13]="/extra" DEST_MODULE_LOCATION[13]="/extra"
BUILT_MODULE_NAME[14]="arm64-ras" BUILT_MODULE_NAME[14]="fuse-burn"
BUILT_MODULE_LOCATION[14]="drivers/ras" BUILT_MODULE_LOCATION[14]="drivers/soc/tegra/fuse"
DEST_MODULE_LOCATION[14]="/extra" DEST_MODULE_LOCATION[14]="/extra"
BUILT_MODULE_NAME[15]="fuse-burn" BUILT_MODULE_NAME[15]="kfuse"
BUILT_MODULE_LOCATION[15]="drivers/soc/tegra/fuse" BUILT_MODULE_LOCATION[15]="drivers/soc/tegra/fuse"
DEST_MODULE_LOCATION[15]="/extra" DEST_MODULE_LOCATION[15]="/extra"
BUILT_MODULE_NAME[16]="kfuse" BUILT_MODULE_NAME[16]="pci-epf-dma-test"
BUILT_MODULE_LOCATION[16]="drivers/soc/tegra/fuse" BUILT_MODULE_LOCATION[16]="drivers/pci/endpoint/functions"
DEST_MODULE_LOCATION[16]="/extra" DEST_MODULE_LOCATION[16]="/extra"
BUILT_MODULE_NAME[17]="pci-epf-dma-test" BUILT_MODULE_NAME[17]="tegra-pcie-edma"
BUILT_MODULE_LOCATION[17]="drivers/pci/endpoint/functions" BUILT_MODULE_LOCATION[17]="drivers/pci/controller"
DEST_MODULE_LOCATION[17]="/extra" DEST_MODULE_LOCATION[17]="/extra"
BUILT_MODULE_NAME[18]="tegra-pcie-edma" BUILT_MODULE_NAME[18]="pcie-tegra-vf"
BUILT_MODULE_LOCATION[18]="drivers/pci/controller" BUILT_MODULE_LOCATION[18]="drivers/pci/controller"
DEST_MODULE_LOCATION[18]="/extra" DEST_MODULE_LOCATION[18]="/extra"
BUILT_MODULE_NAME[19]="pcie-tegra-vf" BUILT_MODULE_NAME[19]="tegra-pcie-dma-test"
BUILT_MODULE_LOCATION[19]="drivers/pci/controller" BUILT_MODULE_LOCATION[19]="drivers/misc"
DEST_MODULE_LOCATION[19]="/extra" DEST_MODULE_LOCATION[19]="/extra"
BUILT_MODULE_NAME[20]="tegra-pcie-dma-test" BUILT_MODULE_NAME[20]="tegra-se-nvhost"
BUILT_MODULE_LOCATION[20]="drivers/misc" BUILT_MODULE_LOCATION[20]="drivers/crypto"
DEST_MODULE_LOCATION[20]="/extra" DEST_MODULE_LOCATION[20]="/extra"
BUILT_MODULE_NAME[21]="tegra-se-nvhost" BUILT_MODULE_NAME[21]="tegra-se-nvrng"
BUILT_MODULE_LOCATION[21]="drivers/crypto" BUILT_MODULE_LOCATION[21]="drivers/crypto"
DEST_MODULE_LOCATION[21]="/extra" DEST_MODULE_LOCATION[21]="/extra"
BUILT_MODULE_NAME[22]="tegra-se-nvrng" BUILT_MODULE_NAME[22]="nvidia-vrs-pseq"
BUILT_MODULE_LOCATION[22]="drivers/crypto" BUILT_MODULE_LOCATION[22]="drivers/mfd"
DEST_MODULE_LOCATION[22]="/extra" DEST_MODULE_LOCATION[22]="/extra"
BUILT_MODULE_NAME[23]="nvidia-vrs-pseq" BUILT_MODULE_NAME[23]="i2c-tegra-slave-byte"
BUILT_MODULE_LOCATION[23]="drivers/mfd" BUILT_MODULE_LOCATION[23]="drivers/i2c/busses"
DEST_MODULE_LOCATION[23]="/extra" DEST_MODULE_LOCATION[23]="/extra"
BUILT_MODULE_NAME[24]="i2c-tegra-slave-byte" BUILT_MODULE_NAME[24]="pinctrl-tegra194-pexclk-padctrl"
BUILT_MODULE_LOCATION[24]="drivers/i2c/busses" BUILT_MODULE_LOCATION[24]="drivers/pinctrl"
DEST_MODULE_LOCATION[24]="/extra" DEST_MODULE_LOCATION[24]="/extra"
BUILT_MODULE_NAME[25]="pinctrl-tegra194-pexclk-padctrl" BUILT_MODULE_NAME[25]="pinctrl-tegra234"
BUILT_MODULE_LOCATION[25]="drivers/pinctrl" BUILT_MODULE_LOCATION[25]="drivers/pinctrl/tegra"
DEST_MODULE_LOCATION[25]="/extra" DEST_MODULE_LOCATION[25]="/extra"
BUILT_MODULE_NAME[26]="pinctrl-tegra234" BUILT_MODULE_NAME[26]="pinctrl-tegra234-dpaux"
BUILT_MODULE_LOCATION[26]="drivers/pinctrl/tegra" BUILT_MODULE_LOCATION[26]="drivers/pinctrl"
DEST_MODULE_LOCATION[26]="/extra" DEST_MODULE_LOCATION[26]="/extra"
BUILT_MODULE_NAME[27]="pinctrl-tegra234-dpaux" BUILT_MODULE_NAME[27]="generic-pwm-tachometer"
BUILT_MODULE_LOCATION[27]="drivers/pinctrl" BUILT_MODULE_LOCATION[27]="drivers/hwmon"
DEST_MODULE_LOCATION[27]="/extra" DEST_MODULE_LOCATION[27]="/extra"
BUILT_MODULE_NAME[28]="generic-pwm-tachometer"
BUILT_MODULE_LOCATION[28]="drivers/hwmon"
DEST_MODULE_LOCATION[28]="/extra"
AUTO_INSTALL="yes" AUTO_INSTALL="yes"

1
drivers/platform/tegra/Makefile
View File

@@ -13,7 +13,6 @@ obj-m += tegra-bootloader-debug.o
tegra-cactmon-objs := cactmon.o tegra-cactmon-objs := cactmon.o
tegra-cactmon-objs += actmon_common.o tegra-cactmon-objs += actmon_common.o
obj-m += tegra-cactmon.o obj-m += tegra-cactmon.o
obj-m += tegra-epl.o
obj-m += tegra-fsicom.o obj-m += tegra-fsicom.o
obj-m += cvnas/ obj-m += cvnas/

315
drivers/platform/tegra/tegra-epl.c
View File

@@ -1,315 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
// Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved.
#include <linux/module.h>
#include <linux/fs.h>
#include <linux/types.h>
#include <linux/platform_device.h>
#include <linux/of_device.h>
#include <linux/dma-buf.h>
#include <linux/device.h>
#include <linux/kdev_t.h>
#include <linux/mailbox_client.h>
#include <linux/tegra-epl.h>
#include <linux/pm.h>
/* Timeout in milliseconds */
#define TIMEOUT 1000
/* 32bit data Length */
#define MAX_LEN 4
/* Macro indicating total number of Misc Sw generic errors in Misc EC */
#define NUM_SW_GENERIC_ERR 5U
/* Error index offset in mission status register */
#define ERROR_INDEX_OFFSET 24U
/* Data type for mailbox client and channel details */
struct epl_hsp_sm {
struct mbox_client client;
struct mbox_chan *chan;
};
/* Data type for accessing TOP2 HSP */
struct epl_hsp {
struct epl_hsp_sm tx;
struct device dev;
};
/* Data type to store Misc Sw Generic error configuration */
struct epl_misc_sw_err_cfg {
void __iomem *err_code_va;
void __iomem *err_assert_va;
const char *dev_configured;
};
static int device_file_major_number;
static const char device_name[] = "epdaemon";
static struct platform_device *pdev_local;
static struct epl_hsp *epl_hsp_v;
static void __iomem *mission_err_status_va;
static bool isAddrMappOk = true;
static struct epl_misc_sw_err_cfg miscerr_cfg[NUM_SW_GENERIC_ERR];
static void tegra_hsp_tx_empty_notify(struct mbox_client *cl,
void *data, int empty_value)
{
pr_debug("EPL: TX empty callback came\n");
}
static int tegra_hsp_mb_init(struct device *dev)
{
int err;
epl_hsp_v = devm_kzalloc(dev, sizeof(*epl_hsp_v), GFP_KERNEL);
if (!epl_hsp_v)
return -ENOMEM;
epl_hsp_v->tx.client.dev = dev;
epl_hsp_v->tx.client.tx_block = true;
epl_hsp_v->tx.client.tx_tout = TIMEOUT;
epl_hsp_v->tx.client.tx_done = tegra_hsp_tx_empty_notify;
epl_hsp_v->tx.chan = mbox_request_channel_byname(&epl_hsp_v->tx.client,
"epl-tx");
if (IS_ERR(epl_hsp_v->tx.chan)) {
err = PTR_ERR(epl_hsp_v->tx.chan);
dev_err(dev, "failed to get tx mailbox: %d\n", err);
return err;
}
return 0;
}
static ssize_t device_file_ioctl(
struct file *fp, unsigned int cmd, unsigned long arg)
{
uint32_t lData[MAX_LEN];
int ret;
if (copy_from_user(lData, (uint8_t *)arg,
MAX_LEN * sizeof(uint32_t)))
return -EACCES;
switch (cmd) {
case EPL_REPORT_ERROR_CMD:
ret = mbox_send_message(epl_hsp_v->tx.chan,
(void *) lData);
break;
default:
return -EINVAL;
}
return ret;
}
int epl_get_misc_ec_err_status(struct device *dev, uint8_t err_number, bool *status)
{
int ret = -EINVAL;
if (dev && status && (err_number < NUM_SW_GENERIC_ERR)) {
uint32_t mission_err_status = 0U;
uint32_t mask = 0U;
const char *dev_str;
if (miscerr_cfg[err_number].dev_configured == NULL || isAddrMappOk == false)
return -ENODEV;
dev_str = dev_driver_string(dev);
if (strcmp(dev_str, miscerr_cfg[err_number].dev_configured) != 0)
return -EACCES;
mask = (1U << ((ERROR_INDEX_OFFSET + err_number) % 32U));
mission_err_status = readl(mission_err_status_va);
if ((mission_err_status & mask) != 0U)
*status = false;
else
*status = true;
ret = 0;
}
return ret;
}
EXPORT_SYMBOL_GPL(epl_get_misc_ec_err_status);
int epl_report_misc_ec_error(struct device *dev, uint8_t err_number,
uint32_t sw_error_code)
{
int ret = -EINVAL;
bool status = false;
ret = epl_get_misc_ec_err_status(dev, err_number, &status);
if (ret != 0)
return ret;
if (status == false)
return -EAGAIN;
/* Updating error code */
writel(sw_error_code, miscerr_cfg[err_number].err_code_va);
/* triggering SW generic error */
writel(0x1U, miscerr_cfg[err_number].err_assert_va);
return 0;
}
EXPORT_SYMBOL_GPL(epl_report_misc_ec_error);
int epl_report_error(struct epl_error_report_frame error_report)
{
int ret = -EINVAL;
if (epl_hsp_v == NULL)
return -ENODEV;
ret = mbox_send_message(epl_hsp_v->tx.chan, (void *)&error_report);
return ret < 0 ? ret : 0;
}
EXPORT_SYMBOL_GPL(epl_report_error);
static int __maybe_unused epl_client_suspend(struct device *dev)
{
pr_debug("tegra-epl: suspend called\n");
return 0;
}
static int __maybe_unused epl_client_resume(struct device *dev)
{
pr_debug("tegra-epl: resume called\n");
return 0;
}
static SIMPLE_DEV_PM_OPS(epl_client_pm, epl_client_suspend, epl_client_resume);
static const struct of_device_id epl_client_dt_match[] = {
{ .compatible = "nvidia,tegra234-epl-client"},
{}
};
MODULE_DEVICE_TABLE(of, epl_client_dt_match);
/* File operations */
static const struct file_operations epl_driver_fops = {
.owner = THIS_MODULE,
.unlocked_ioctl = device_file_ioctl,
};
static int epl_register_device(void)
{
int result = 0;
struct class *dev_class;
result = register_chrdev(0, device_name, &epl_driver_fops);
if (result < 0) {
pr_err("%s> register_chrdev code = %i\n", device_name, result);
return result;
}
device_file_major_number = result;
dev_class = class_create(THIS_MODULE, device_name);
if (dev_class == NULL) {
pr_err("%s> Could not create class for device\n", device_name);
goto class_fail;
}
if ((device_create(dev_class, NULL,
MKDEV(device_file_major_number, 0),
NULL, device_name)) == NULL) {
pr_err("%s> Could not create device node\n", device_name);
goto device_failure;
}
return 0;
device_failure:
class_destroy(dev_class);
class_fail:
unregister_chrdev(device_file_major_number, device_name);
return -1;
}
static void epl_unregister_device(void)
{
if (device_file_major_number != 0)
unregister_chrdev(device_file_major_number, device_name);
}
static int epl_client_probe(struct platform_device *pdev)
{
int ret = 0;
struct device *dev = &pdev->dev;
const struct device_node *np = dev->of_node;
int iterator = 0;
char name[32] = "client-misc-sw-generic-err";
epl_register_device();
ret = tegra_hsp_mb_init(dev);
pdev_local = pdev;
for (iterator = 0; iterator < NUM_SW_GENERIC_ERR; iterator++) {
name[26] = (char)(iterator+48U);
name[27] = '\0';
if (of_property_read_string(np, name, &miscerr_cfg[iterator].dev_configured) == 0) {
pr_info("Misc Sw Generic Err #%d configured to client %s\n",
iterator, miscerr_cfg[iterator].dev_configured);
/* Mapping registers to process address space */
miscerr_cfg[iterator].err_code_va =
devm_platform_ioremap_resource(pdev, (iterator * 2));
miscerr_cfg[iterator].err_assert_va =
devm_platform_ioremap_resource(pdev, (iterator * 2) + 1);
if (IS_ERR(miscerr_cfg[iterator].err_code_va) ||
IS_ERR(miscerr_cfg[iterator].err_assert_va)) {
isAddrMappOk = false;
ret = -1;
dev_err(&pdev->dev, "error in mapping misc err register for err #%d\n",
iterator);
}
} else {
pr_info("Misc Sw Generic Err %d not configured for any client\n", iterator);
}
}
mission_err_status_va = devm_platform_ioremap_resource(pdev, (NUM_SW_GENERIC_ERR * 2) + 1);
if (IS_ERR(mission_err_status_va)) {
isAddrMappOk = false;
dev_err(&pdev->dev, "error in mapping mission error status register\n");
return PTR_ERR(mission_err_status_va);
}
return ret;
}
static int epl_client_remove(struct platform_device *pdev)
{
epl_unregister_device();
return 0;
}
static struct platform_driver epl_client = {
.driver = {
.name = "epl_client",
.probe_type = PROBE_PREFER_ASYNCHRONOUS,
.of_match_table = of_match_ptr(epl_client_dt_match),
.pm = pm_ptr(&epl_client_pm),
},
.probe = epl_client_probe,
.remove = epl_client_remove,
};
module_platform_driver(epl_client);
MODULE_DESCRIPTION("tegra: Error Propagation Library driver");
MODULE_AUTHOR("Prashant Shaw <pshaw@nvidia.com>");
MODULE_LICENSE("GPL v2");

83
include/linux/tegra-epl.h
View File

@@ -1,83 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0
*
* Copyright (c) 2021-2022, NVIDIA CORPORATION, All rights reserved.
*/
#ifndef _TEGRA_EPL_H_
#define _TEGRA_EPL_H_
#include <uapi/linux/tegra-epl.h>
/**
* @brief Error report frame
*/
struct epl_error_report_frame {
/* Error code indicates error reported by corresponding reporter_id */
uint32_t error_code;
/* Extra information for SEH to understand error */
uint32_t error_attribute;
/* LSB 32-bit TSC counter when error is detected */
uint32_t timestamp;
/* Indicates source of error */
uint16_t reporter_id;
};
/**
* @brief API to check if SW error can be reported via Misc EC
* by reading and checking Misc EC error status register value.
*
* @param[in] dev pointer to the device structure for the kernel driver
* from where API is called.
* @param[in] err_number Generic SW error number for which status needs to
* enquired - [0 to 4].
* @param[out] status out param updated by API as follows:
* true - SW error can be reported
* false - SW error can not be reported because previous error
* is still active. Client needs to retry later.
*
* @returns
* 0 (success)
* -EINVAL (On invalid arguments)
* -ENODEV (On device driver not loaded or Misc EC not configured)
* -EACCESS (On client not allowed to report error via given Misc EC)
* -EAGAIN (On Misc EC busy, client should retry)
*/
int epl_get_misc_ec_err_status(struct device *dev, uint8_t err_number, bool *status);
/**
* @brief API to report SW error to FSI using Misc Generic SW error lines connected to
* the Misc error collator.
*
* @param[in] dev pointer to the device structure for the kernel driver
* from where API is called.
* @param[in] err_number Generic SW error number through which error
* needs to be reported.
* @param[in] sw_error_code Client Defined Error Code, which will be
* forwarded to the application on FSI.
*
* @returns
* 0 (success)
* -EINVAL (On invalid arguments)
* -ENODEV (On device driver not loaded or Misc EC not configured)
* -EACCESS (On client not allowed to report error via given Misc EC)
* -EAGAIN (On Misc EC busy, client should retry)
*/
int epl_report_misc_ec_error(struct device *dev, uint8_t err_number, uint32_t sw_error_code);
/**
* @brief API to report SW error via TOP2 HSP
*
* @param[in] error_report Error frame to be reported
*
* @return
* 0 (Success)
* -ENODEV (On device driver not loaded or not configured)
* -ETIME (On timeout)
*/
int epl_report_error(struct epl_error_report_frame error_report);
#endif /* _TEGRA_EPL_H_ */

14
include/uapi/linux/tegra-epl.h
View File

@@ -1,14 +0,0 @@
/* SPDX-License-Identifier: (GPL-2.0 WITH Linux-syscall-note)
*
* Copyright (c) 2021-2022, NVIDIA CORPORATION, All rights reserved.
*/
#ifndef _UAPI_TEGRA_EPL_H_
#define _UAPI_TEGRA_EPL_H_
#include <linux/ioctl.h>
/* ioctl call macros */
#define EPL_REPORT_ERROR_CMD _IOWR('q', 1, uint8_t *)
#endif /* _UAPI_TEGRA_EPL_H_ */