From 2318f8689a696f88d6421077d27dd8a92359a793 Mon Sep 17 00:00:00 2001 From: Sheetal Tigadoli Date: Thu, 30 Jan 2025 17:57:45 +0000 Subject: [PATCH] devicetree:bindings:nvpps: Add ptp_tsc_sync_trig_interval param to doc. Add ptp_tsc_sync_trig_interval param to nvpps doc. This is used to define the sync trigger interval Bug 5042311 Bug 4899241 Signed-off-by: Sheetal Tigadoli Change-Id: I881d4a57af857345adfc3e854ea06bb00e3d3a6f Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3294330 (cherry picked from commit 9c14041a4f394a203f0b8f4a8afdf9053011c14a) Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3293843 Reviewed-by: Amlan Kundu GVS: buildbot_gerritrpt --- Documentation/devicetree/bindings/nvpps/nvpps.txt | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/nvpps/nvpps.txt b/Documentation/devicetree/bindings/nvpps/nvpps.txt index 0b1cbec9..87be217b 100644 --- a/Documentation/devicetree/bindings/nvpps/nvpps.txt +++ b/Documentation/devicetree/bindings/nvpps/nvpps.txt @@ -39,6 +39,12 @@ Optional properties: Max value(16777215) correspond to approx 16.77ms - ptp_tsc_sync_dis: boolean flag to indicate if nvpps should disable PTP TSC sync logic. The default behaviour is to keep PTP TSC sync logic enabled. +- ptp_tsc_sync_trig_interval: Defines interval(in terms of PPS edge count) at which PTP-TSC sync + alignment should be triggered eg: if value 3 is provided, then an attempt is + made to sync TSC with PTP(if not synchronized) on every 3rd PPS edge. + Supported min & max values are 1 & 8 respectively and by default, value + of 1 is used to trigger TSC sync on every PPS edge. + - reg: specifies start address and registers count details of TSC module. It is only applicable for Orin. - nvpps-gpios: specifies GPIO number for PPS input signal. - timestamps: specifies timestamp for the GPIO provided by HTE.